help
Enable this option if you are working on the sconfig
device tree parser and made changes to sconfig.l and
- sconfig.y.
+ sconfig.y.
Otherwise, say N.
config USE_OPTION_TABLE
Enable this option if coreboot shall read options from the "CMOS"
NVRAM instead of using hard coded values.
+config COMPRESS_RAMSTAGE
+ bool "Compress ramstage with LZMA"
+ default y
+ help
+ Compress ramstage to save memory in the flash image. Note
+ that decompression might slow down booting if the boot flash
+ is connected through a slow Link (i.e. SPI)
+
+config INCLUDE_CONFIG_FILE
+ bool "Include the coreboot config file into the ROM image"
+ default y
+ help
+ Include in CBFS the coreboot config file that was used to compile the ROM image
+
endmenu
source src/mainboard/Kconfig
source src/console/Kconfig
+# This should default to N and be set by SuperI/O drivers that have an UART
+config HAVE_UART_IO_MAPPED
+ bool
+ default y
+
+config HAVE_UART_MEMORY_MAPPED
+ bool
+ default n
+
config HAVE_ACPI_RESUME
bool
default n
bool
default HAVE_PIRQ_TABLE
+config GENERATE_SMBIOS_TABLES
+ bool
+ default y
+
menu "System tables"
config WRITE_HIGH_TABLES
If unsure, say Y.
+config GENERATE_SMBIOS_TABLES
+ depends on ARCH_X86
+ bool "Generate SMBIOS tables"
+ default y
+ help
+ Generate SMBIOS tables for this board.
+
+ If unsure, say Y.
+
endmenu
menu "Payload"
See http://coreboot.org/Payloads for more information.
+config PAYLOAD_FILO
+ bool "FILO"
+ help
+ Select this option if you want to build a coreboot image
+ with a FILO payload. If you don't know what this is
+ about, just leave it enabled.
+
+ See http://coreboot.org/Payloads for more information.
+
endchoice
choice
Newest SeaBIOS version
endchoice
+choice
+ prompt "FILO version"
+ default FILO_STABLE
+ depends on PAYLOAD_FILO
+
+config FILO_STABLE
+ bool "0.6.0"
+ help
+ Stable FILO version
+config FILO_MASTER
+ bool "HEAD"
+ help
+ Newest FILO version
+endchoice
+
config PAYLOAD_FILE
string "Payload path and filename"
depends on PAYLOAD_ELF
depends on PAYLOAD_SEABIOS
default "payloads/external/SeaBIOS/seabios/out/bios.bin.elf"
+config PAYLOAD_FILE
+ depends on PAYLOAD_FILO
+ default "payloads/external/FILO/filo/build/filo.elf"
+
# TODO: Defined if no payload? Breaks build?
config COMPRESSED_PAYLOAD_LZMA
bool "Use LZMA compression for payloads"
default y
- depends on PAYLOAD_ELF || PAYLOAD_SEABIOS
+ depends on PAYLOAD_ELF || PAYLOAD_SEABIOS || PAYLOAD_FILO
help
In order to reduce the size payloads take up in the ROM chip
coreboot can compress them using the LZMA algorithm.
If unsure, say N.
endif
+config DEBUG_ACPI
+ def_bool n
+
+# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
+# printk(BIOS_DEBUG, ...) calls.
+if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
+config DEBUG_ACPI
+ bool "Output verbose ACPI debug messages"
+ default n
+ help
+ This option enables additional ACPI related debug messages.
+
+ Note: This option will slightly increase the size of the coreboot image.
+
+ If unsure, say N.
+endif
+
config REALMODE_DEBUG
def_bool n
depends on PCI_OPTION_ROM_RUN_REALMODE
Put llshell() in your (romstage) code to start the shell.
See src/arch/x86/llshell/llshell.inc for details.
+config TRACE
+ bool "Trace function calls"
+ default n
+ help
+ If enabled, every function will print information to console once
+ the function is entered. The syntax is ~0xaaaabbbb(0xccccdddd)
+ the 0xaaaabbbb is the actual function and 0xccccdddd is EIP
+ of calling function. Please note some printk releated functions
+ are omitted from trace to have good looking console dumps.
endmenu
config LIFT_BSP_APIC_ID