Enable this option if coreboot shall read options from the "CMOS"
NVRAM instead of using hard coded values.
+config COMPRESS_RAMSTAGE
+ bool "Compress ramstage with LZMA"
+ default y
+ help
+ Compress ramstage to save memory in the flash image. Note
+ that decompression might slow down booting if the boot flash
+ is connected through a slow Link (i.e. SPI)
+
endmenu
source src/mainboard/Kconfig
source src/superio/Kconfig
comment "Devices"
source src/devices/Kconfig
+comment "Embedded Controllers"
+source src/ec/Kconfig
endmenu
int
default 0
-config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
- hex
- default 0x0
-
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
- hex
- default 0x0
config PCI_ROM_RUN
bool
default n
bool
default n
-config ATI_RAGE_XL
+source src/console/Kconfig
+
+# This should default to N and be set by SuperI/O drivers that have an UART
+config HAVE_UART_IO_MAPPED
bool
+ default y
-source src/console/Kconfig
+config HAVE_UART_MEMORY_MAPPED
+ bool
+ default n
config HAVE_ACPI_RESUME
bool
choice
prompt "Add a payload"
- default PAYLOAD_NONE
+ default PAYLOAD_NONE if !ARCH_X86
+ default PAYLOAD_SEABIOS if ARCH_X86
config PAYLOAD_NONE
bool "None"
You will be able to specify the location and file name of the
payload image later.
+config PAYLOAD_SEABIOS
+ bool "SeaBIOS"
+ depends on ARCH_X86
+ help
+ Select this option if you want to build a coreboot image
+ with a SeaBIOS payload. If you don't know what this is
+ about, just leave it enabled.
+
+ See http://coreboot.org/Payloads for more information.
+
+config PAYLOAD_FILO
+ bool "FILO"
+ help
+ Select this option if you want to build a coreboot image
+ with a FILO payload. If you don't know what this is
+ about, just leave it enabled.
+
+ See http://coreboot.org/Payloads for more information.
+
+endchoice
+
+choice
+ prompt "SeaBIOS version"
+ default SEABIOS_STABLE
+ depends on PAYLOAD_SEABIOS
+
+config SEABIOS_STABLE
+ bool "stable"
+ help
+ Stable SeaBIOS version
+config SEABIOS_MASTER
+ bool "master"
+ help
+ Newest SeaBIOS version
+endchoice
+
+choice
+ prompt "FILO version"
+ default FILO_STABLE
+ depends on PAYLOAD_FILO
+
+config FILO_STABLE
+ bool "0.6.0"
+ help
+ Stable FILO version
+config FILO_MASTER
+ bool "HEAD"
+ help
+ Newest FILO version
endchoice
-config FALLBACK_PAYLOAD_FILE
+config PAYLOAD_FILE
string "Payload path and filename"
depends on PAYLOAD_ELF
default "payload.elf"
help
The path and filename of the ELF executable file to use as payload.
+config PAYLOAD_FILE
+ depends on PAYLOAD_SEABIOS
+ default "payloads/external/SeaBIOS/seabios/out/bios.bin.elf"
+
+config PAYLOAD_FILE
+ depends on PAYLOAD_FILO
+ default "payloads/external/FILO/filo/build/filo.elf"
+
# TODO: Defined if no payload? Breaks build?
config COMPRESSED_PAYLOAD_LZMA
bool "Use LZMA compression for payloads"
default y
- depends on PAYLOAD_ELF
+ depends on PAYLOAD_ELF || PAYLOAD_SEABIOS || PAYLOAD_FILO
help
In order to reduce the size payloads take up in the ROM chip
coreboot can compress them using the LZMA algorithm.
You will be able to specify the location and file name of the
image later.
-config FALLBACK_VGA_BIOS_FILE
+config VGA_BIOS_FILE
string "VGA BIOS path and filename"
depends on VGA_BIOS
default "vgabios.bin"
help
The path and filename of the file to use as VGA BIOS.
-config FALLBACK_VGA_BIOS_ID
+config VGA_BIOS_ID
string "VGA device PCI IDs"
depends on VGA_BIOS
default "1106,3230"
You will be able to specify the location and file name of the
image later.
-config FALLBACK_MBI_FILE
+config MBI_FILE
string "Intel MBI path and filename"
depends on INTEL_MBI
default "mbi.bin"
This option shows a graphical bootsplash screen. The grapics are
loaded from the CBFS file bootsplash.jpg.
-config FALLBACK_BOOTSPLASH_FILE
+config BOOTSPLASH_FILE
string "Bootsplash path and filename"
depends on BOOTSPLASH
default "bootsplash.jpg"