Enables the use of ccache for faster builds.
Requires ccache in path.
+config SCONFIG_GENPARSER
+ bool "Generate SCONFIG parser using flex and bison"
+ default n
+ depends on EXPERT
+ help
+ Enable this option if you are working on the sconfig
+ device tree parser and made changes to sconfig.l and
+ sconfig.y.
+ Otherwise, say N.
+
+config USE_OPTION_TABLE
+ bool "Use CMOS for configuration values"
+ default n
+ depends on HAVE_OPTION_TABLE
+ help
+ Enable this option if coreboot shall read options from the "CMOS"
+ NVRAM instead of using hard coded values.
+
endmenu
source src/mainboard/Kconfig
endmenu
+menu "Generic Drivers"
+source src/drivers/Kconfig
+endmenu
+
config PCI_BUS_SEGN_BITS
int
default 0
hex
default 0x4000
-config DEBUG
- bool
- default n
-
-config USE_PRINTK_IN_CAR
- bool
- default n
-
-config USE_OPTION_TABLE
- bool "Use CMOS for configuration values"
- default n
-
config MAX_CPUS
int
default 1
bool
default n
+config HAVE_ACPI_SLIC
+ bool
+ default n
+
config ACPI_SSDTX_NUM
int
default 0
bool
default n
+config USE_OPTION_TABLE
+ bool
+ default n
+
config HAVE_OPTION_TABLE
bool
- default y
+ default n
help
This variable specifies whether a given board has a cmos.layout
file containing NVRAM/CMOS bit definitions.
- It defaults to 'y' but can be changed to 'n' in mainboard/*/Kconfig.
+ It defaults to 'n' but can be selected in mainboard/*/Kconfig.
config PIRQ_ROUTE
bool
#
# endmenu
-#TODO Remove this option or make it useful.
-config HAVE_LOW_TABLES
- bool
- default y
- help
- This Option is unused in the code. Since two boards try to set it to
- 'n', they may be broken. We either need to make the option useful or
- get rid of it. The broken boards are:
- asus/m2v-mx_se
- supermicro/h8dme
-
-config HAVE_HIGH_TABLES
- bool
- default y
- help
- This variable specifies whether a given northbridge has high table
- support.
- It is set in northbridge/*/Kconfig.
- Whether or not the high tables are actually written by coreboot is
- configurable by the user via WRITE_HIGH_TABLES.
-
config HAVE_ACPI_TABLES
bool
help
bool
default HAVE_PIRQ_TABLE
-config WRITE_HIGH_TABLES
- bool
- default HAVE_HIGH_TABLES
-
menu "System tables"
config WRITE_HIGH_TABLES
bool "Write 'high' tables to avoid being overwritten in F segment"
- depends on HAVE_HIGH_TABLES
default y
config MULTIBOOT
depends on BOOTSPLASH
default "bootsplash.jpg"
help
- The path and filename of the file to use as graphical bootsplash
- screen. The file format has to be jpg.
+ The path and filename of the file to use as graphical bootsplash
+ screen. The file format has to be jpg.
# TODO: Turn this into a "choice".
config FRAMEBUFFER_VESA_MODE
If enabled, you will be able to set breakpoints for gdb debugging.
See src/arch/i386/lib/c_start.S for details.
+config HAVE_DEBUG_RAM_SETUP
+ def_bool n
+
config DEBUG_RAM_SETUP
bool "Output verbose RAM init debug messages"
default n
- depends on (NORTHBRIDGE_AMD_AMDFAM10 \
- || NORTHBRIDGE_AMD_AMDK8 \
- || NORTHBRIDGE_VIA_CN700 \
- || NORTHBRIDGE_VIA_CX700 \
- || NORTHBRIDGE_VIA_VX800 \
- || NORTHBRIDGE_INTEL_E7501 \
- || NORTHBRIDGE_INTEL_I440BX \
- || NORTHBRIDGE_INTEL_I82810 \
- || NORTHBRIDGE_INTEL_I82830 \
- || NORTHBRIDGE_INTEL_I945)
+ depends on HAVE_DEBUG_RAM_SETUP
help
This option enables additional RAM init related debug messages.
It is recommended to enable this when debugging issues on your
If unsure, say N.
+config HAVE_DEBUG_CAR
+ def_bool n
+
+config DEBUG_CAR
+ bool "Output verbose Cache-as-RAM debug messages"
+ default n
+ depends on HAVE_DEBUG_CAR
+ help
+ This option enables additional CAR related debug messages.
+
+config DEBUG_PIRQ
+ bool "Check PIRQ table consistency"
+ default n
+ depends on GENERATE_PIRQ_TABLE
+ help
+ If unsure, say N.
+
+config HAVE_DEBUG_SMBUS
+ def_bool n
+
config DEBUG_SMBUS
bool "Output verbose SMBus debug messages"
default n
- depends on (SOUTHBRIDGE_VIA_VT8237R \
- || NORTHBRIDGE_VIA_VX800 \
- || NORTHBRIDGE_VIA_CX700 \
- || NORTHBRIDGE_AMD_AMDK8 \
- || NORTHBRIDGE_AMD_AMDFAM10 \
- || SOUTHBRIDGE_VIA_VT8231)
+ depends on HAVE_DEBUG_SMBUS
help
This option enables additional SMBus (and SPD) debug messages.
If unsure, say N.
+config DEBUG_SMM_RELOCATION
+ bool "Debug SMM relocation code"
+ default n
+ depends on HAVE_SMI_HANDLER
+ help
+ This option enables additional SMM handler relocation related
+ debug messages.
+
+ Note: This option will increase the size of the coreboot image.
+
+ If unsure, say N.
+
+config REALMODE_DEBUG
+ bool "Enable debug messages for option ROM execution"
+ default n
+ depends on PCI_OPTION_ROM_RUN_REALMODE
+ help
+ This option enables additional x86emu related debug messages.
+
+ Note: This option will increase the time to emulate a ROM.
+
+ If unsure, say N.
+
config X86EMU_DEBUG
bool "Output verbose x86emu debug messages"
default n
depends on X86EMU_DEBUG
help
Print _all_ opcodes that are executed by x86emu.
-
+
WARNING: This will produce a LOT of output and take a long time.
Note: This option will increase the size of the coreboot image.
bool
default n
+config RAMINIT_SYSINFO
+ bool
+ default n
+
config ENABLE_APIC_EXT_ID
bool
default n
config WARNINGS_ARE_ERRORS
bool
- default n
+ default y
config ID_SECTION_OFFSET
hex
projects / coreboot.git / blobdiff