mainmenu "Coreboot Configuration"
+menu "General setup"
+
+config EXPERT
+ bool "Expert mode"
+ help
+ This allows you to select certain advanced configuration options.
+
+ Warning: Only enable this option if you really know what you are
+ doing! You have been warned!
+
+config LOCALVERSION
+ string "Local version string"
+ help
+ Append an extra string to the end of the coreboot version.
+
+ This can be useful if, for instance, you want to append the
+ respective board's hostname or some other identifying string to
+ the coreboot version number, so that you can easily distinguish
+ boot logs of different boards from each other.
+
+endmenu
+
source src/mainboard/Kconfig
source src/arch/i386/Kconfig
source src/arch/ppc/Kconfig
-source src/devices/Kconfig
+
+menu "Chipset"
+
+comment "CPU"
+source src/cpu/Kconfig
+comment "Northbridge"
source src/northbridge/Kconfig
+comment "Southbridge"
source src/southbridge/Kconfig
+comment "Super I/O"
source src/superio/Kconfig
-source src/cpu/Kconfig
+comment "Devices"
+source src/devices/Kconfig
-config CBFS
- bool
- default y
+endmenu
config PCI_BUS_SEGN_BITS
- bool
- default n
+ int
+ default 0
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
hex
- default 0
+ default 0x0
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
hex
- default 0
+ default 0x0
config CPU_ADDR_BITS
int
config HEAP_SIZE
hex
- default 0x2000
+ default 0x4000
config COREBOOT_V2
bool
bool
default n
-config LB_MEM_TOPK
- int
- default 2048
-
-config COMPRESSED_PAYLOAD_LZMA
- bool
- default y
+config RAMTOP
+ hex
+ default 0x200000
-config COMPRESSED_PAYLOAD_NRV2B
+config ATI_RAGE_XL
bool
- default n
source src/console/Kconfig
bool
default y
+config HAVE_FAILOVER_BOOT
+ bool
+ default n
+
+config USE_FAILOVER_IMAGE
+ bool
+ default n
+
config HAVE_HARD_RESET
bool
default n
config HAVE_INIT_TIMER
bool
- default n
+ default y
config HAVE_MAINBOARD_RESOURCES
bool
config HAVE_MOVNTI
bool
- default y
+ default n
config HAVE_OPTION_TABLE
bool
default y
+ help
+ This variable specifies whether a given board has a cmos.layout
+ file containing NVRAM/CMOS bit definitions.
+ It defaults to 'y' but can be changed to 'n' in mainboard/*/Kconfig.
config PIRQ_ROUTE
bool
bool
default n
+# TODO: Can probably be removed once all chipsets have kconfig options for it.
+config VIDEO_MB
+ int
+ default 0
+
config USE_WATCHDOG_ON_BOOT
bool
default n
# TODO
# menu "Drivers"
-#
+#
# endmenu
-menu "Generated System Tables"
-
+#TODO Remove this option or make it useful.
config HAVE_LOW_TABLES
bool
default y
+ help
+ This Option is unused in the code. Since two boards try to set it to
+ 'n', they may be broken. We either need to make the option useful or
+ get rid of it. The broken boards are:
+ asus/m2v-mx_se
+ supermicro/h8dme
config HAVE_HIGH_TABLES
+ bool
+ default n
+ help
+ This variable specifies whether a given northbridge has high table
+ support.
+ It is set in northbridge/*/Kconfig.
+ Whether or not the high tables are actually written by coreboot is
+ configurable by the user via WRITE_HIGH_TABLES.
+
+config HAVE_ACPI_TABLES
+ bool
+ help
+ This variable specifies whether a given board has ACPI table support.
+ It is usually set in mainboard/*/Kconfig.
+ Whether or not the ACPI tables are actually generated by coreboot
+ is configurable by the user via GENERATE_ACPI_TABLES.
+
+config HAVE_MP_TABLE
+ bool
+ help
+ This variable specifies whether a given board has MP table support.
+ It is usually set in mainboard/*/Kconfig.
+ Whether or not the MP table is actually generated by coreboot
+ is configurable by the user via GENERATE_MP_TABLE.
+
+config HAVE_PIRQ_TABLE
+ bool
+ help
+ This variable specifies whether a given board has PIRQ table support.
+ It is usually set in mainboard/*/Kconfig.
+ Whether or not the PIRQ table is actually generated by coreboot
+ is configurable by the user via GENERATE_PIRQ_TABLE.
+
+#These Options are here to avoid "undefined" warnings.
+#The actual selection and help texts are in the following menu.
+
+config GENERATE_ACPI_TABLES
+ bool
+ default HAVE_ACPI_TABLES
+
+config GENERATE_MP_TABLE
+ bool
+ default HAVE_MP_TABLE
+
+config GENERATE_PIRQ_TABLE
+ bool
+ default HAVE_PIRQ_TABLE
+
+config WRITE_HIGH_TABLES
+ bool
+ default HAVE_HIGH_TABLES
+
+menu "System tables"
+
+config WRITE_HIGH_TABLES
bool "Write 'high' tables to avoid being overwritten in F segment"
+ depends on HAVE_HIGH_TABLES
default y
config MULTIBOOT
- bool "Add Multiboot tables (for grub2)"
+ bool "Generate Multiboot tables (for GRUB2)"
default n
-config HAVE_ACPI_TABLES
+config GENERATE_ACPI_TABLES
+ depends on HAVE_ACPI_TABLES
bool "Generate ACPI tables"
- default n
+ default y
+ help
+ Generate ACPI tables for this board.
-config HAVE_MP_TABLE
+ If unsure, say Y.
+
+config GENERATE_MP_TABLE
+ depends on HAVE_MP_TABLE
bool "Generate an MP table"
- default n
+ default y
+ help
+ Generate an MP table (conforming to the Intel MultiProcessor
+ specification 1.4) for this board.
-config HAVE_PIRQ_TABLE
+ If unsure, say Y.
+
+config GENERATE_PIRQ_TABLE
+ depends on HAVE_PIRQ_TABLE
bool "Generate a PIRQ table"
- default n
+ default y
+ help
+ Generate a PIRQ table for this board.
+
+ If unsure, say Y.
endmenu
menu "Payload"
-config COMPRESSED_PAYLOAD_LZMA
- bool "Use LZMA compression for payloads"
- default yes
-
choice
- prompt "Payload type"
+ prompt "Add a payload"
default PAYLOAD_NONE
+config PAYLOAD_NONE
+ bool "None"
+ help
+ Select this option if you want to create an "empty" coreboot
+ ROM image for a certain mainboard, i.e. a coreboot ROM image
+ which does not yet contain a payload.
+
+ For such an image to be useful, you have to use 'cbfstool'
+ to add a payload to the ROM image later.
+
config PAYLOAD_ELF
- bool "An ELF executable payload file"
+ bool "An ELF executable payload"
help
Select this option if you have a payload image (an ELF file)
which coreboot should run as soon as the basic hardware
You will be able to specify the location and file name of the
payload image later.
-config PAYLOAD_NONE
- bool "No payload"
- help
- Select this option if you want to create an "empty" coreboot
- ROM image for a certain mainboard, i.e. a coreboot ROM image
- which does not yet contain a payload.
-
- For such an image to be useful, you have to use the 'cbfs' tool
- to add a payload to the ROM image later.
endchoice
help
The path and filename of the ELF executable file to use as payload.
+# TODO: Defined if no payload? Breaks build?
+config COMPRESSED_PAYLOAD_LZMA
+ bool "Use LZMA compression for payloads"
+ default y
+ depends on PAYLOAD_ELF
+ help
+ In order to reduce the size payloads take up in the ROM chip
+ coreboot can compress them using the LZMA algorithm.
+
+config COMPRESSED_PAYLOAD_NRV2B
+ bool
+ default n
+
endmenu
menu "VGA BIOS"
depends on VGA_BIOS
default "1106,3230"
help
- The ID that would associate your VGA BIOS to your video card.
- (PCI VendorID, PCI Device ID)
+ The comma-separated PCI vendor and device ID that would associate
+ your VGA BIOS to your video card.
+
+ Example: 1106,3230
+
+ In the above example 1106 is the PCI vendor ID (in hex, but without
+ the "0x" prefix) and 3230 specifies the PCI device ID of the
+ video card (also in hex, without "0x" prefix).
endmenu
+menu "Debugging"
+
+# TODO: Better help text and detailed instructions.
config GDB_STUB
bool "GDB debugging support"
default y
If enabled, you will be able to set breakpoints for gdb debugging.
See src/arch/i386/lib/c_start.S for details.
+endmenu
+
+config LIFT_BSP_APIC_ID
+ bool
+ default n
+
+# These probably belong somewhere else, but they are needed somewhere.
+config AP_CODE_IN_CAR
+ bool
+ default n
+
+config USE_INIT
+ bool
+ default n
+
+config ENABLE_APIC_EXT_ID
+ bool
+ default n