ram: reducing instr- and dataram

[calu.git] / progs / dt_inc.s

diff --git a/progs/dt_inc.s b/progs/dt_inc.s
index 50165b9a7054e944fca1c4d1dbd02ee7202df1df..d680464490e414bc3f52f77425306556bd034287 100644 (file)
--- a/progs/dt_inc.s
+++ b/progs/dt_inc.s
@@ -31,6 +31,10 @@ int2hex:
        .define INT_GLOBAL_BIT, 0x01
        .define INT_UART_REC_BIT, 0x02
 
+       .define TIMER_BASE, 0x2040
+       .define TIMER_STCFG, 0x0
+       .define TIMER_VAL, 0x4
+
 u_recv_byte:
        ldw r3, UART_STATUS(r10)
        andx r3, UART_RECV_NEW
@@ -49,15 +53,12 @@ u_send_byte:
 u_send_uint:
        addi r8, r1, 0
        ;usb_sendbuffersafe ("0x", 2);
-       xor r1, r1, r1
        ldi r1, 0x30
        call u_send_byte
-       xor r1, r1, r1
        ldi r1, 0x78
        call u_send_byte
        ;j = 0
        xor r7, r7, r7
-       xor r6, r6, r6
        ldi r6, int2hex@lo
        ldih r6, int2hex@hi
 u_send_uint_loop:
@@ -89,7 +90,6 @@ u_send_string_int:
        br u_send_string_int
 
 u_send_newline:
-       xor r1, r1, r1
        ldi r1, 0x0a
        call u_send_byte
        ldi r1, 0x0d
@@ -97,7 +97,6 @@ u_send_newline:
        ret
 
 u_init:
-       xor r10, r10, r10
        ldi r10, UART_BASE@lo
        ldih r10, UART_BASE@hi
        ret
@@ -106,3 +105,29 @@ sseg_displ:
        ldi r2, SSEG_BASE
        stw r1, 0(r2)
        ret
+
+t_init:
+       ldis r11, TIMER_BASE@lo
+       ldih r11, TIMER_BASE@hi
+       ret
+
+t_start:
+       ldis r1, 0x1
+       stw r1, TIMER_STCFG(r11)
+       ret
+
+t_stop:
+       ldis r1, 0x0
+       stw r1, TIMER_STCFG(r11)
+       ret
+
+t_valget:
+       ldw r0, TIMER_VAL(r11)
+       ret
+
+t_valset:
+       stw r1, TIMER_VAL(r11)
+       ret
+
+;for deepjit: start for programarea
+prog_start: