Clone a tag rather than SeaBIOS stable branch HEAD

[coreboot.git] / payloads / libpayload / include / pci.h

diff --git a/payloads/libpayload/include/pci.h b/payloads/libpayload/include/pci.h
index df88e098ab5272be56707a71bd9dd4521d33c218..2490f6cb4cc2aba38c57e316898afb422b0b823c 100644 (file)
--- a/payloads/libpayload/include/pci.h
+++ b/payloads/libpayload/include/pci.h
@@ -2,6 +2,7 @@
  * This file is part of the libpayload project.
  *
  * Copyright (C) 2008 Advanced Micro Devices, Inc.
+ * Copyright (C) 2008 coresystems GmbH
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -30,32 +31,44 @@
 #ifndef _PCI_H
 #define _PCI_H
 
-typedef unsigned short pcidev_t;
+#include <arch/types.h>
+typedef u32 pcidev_t;
 
 #define REG_VENDOR_ID   0x00
-#define REG_DEVICE_ID   0x04
+#define REG_COMMAND     0x04
+#define REG_CLASS_DEV   0x0A
 #define REG_HEADER_TYPE 0x0E
 #define REG_PRIMARY_BUS 0x18
+#define REG_SUBSYS_VENDOR_ID 0x2C
+#define REG_SUBSYS_ID   0x2E
+
+#define REG_COMMAND_BM  (1 << 2)
 
 #define HEADER_TYPE_NORMAL  0
 #define HEADER_TYPE_BRIDGE  1
 #define HEADER_TYPE_CARDBUS 2
 
-#define PCIDEV(_b, _d) ((((_b) & 0xFF) << 8) | ((_d) & 0xFF))
+#define PCI_ADDR(_bus, _dev, _fn, _reg) \
+(0x80000000 | (_bus << 16) | (_dev << 11) | (_fn << 8) | (_reg & ~3))
+
+#define PCI_DEV(_bus, _dev, _fn) \
+(0x80000000 | (_bus << 16) | (_dev << 11) | (_fn << 8))
 
-#define PCIDEV_BUS(_d) (((_d) >> 8) & 0xFF)
-#define PCIDEV_DEVFN(_d) ((_d) & 0xFF)
+#define PCI_BUS(_d)  ((_d >> 16) & 0xff)
+#define PCI_SLOT(_d) ((_d >> 11) & 0x1f)
+#define PCI_FUNC(_d) ((_d >> 8) & 0x7)
 
-#define PCI_ADDR(_bus, _dev, _reg) \
-(0x80000000 | (_bus << 16) | (_dev << 8) | (_reg & ~3))
+u8 pci_read_config8(u32 device, u16 reg);
+u16 pci_read_config16(u32 device, u16 reg);
+u32 pci_read_config32(u32 device, u16 reg);
 
-void pci_read_dword(unsigned int bus, unsigned int devfn,
-                   unsigned int reg, unsigned int *val);
+void pci_write_config8(u32 device, u16 reg, u8 val);
+void pci_write_config16(u32 device, u16 reg, u16 val);
+void pci_write_config32(u32 device, u16 reg, u32 val);
 
-void pci_read_byte(unsigned int bus, unsigned int devfn,
-                  unsigned int reg, unsigned char *val);
+int pci_find_device(u16 vid, u16 did, pcidev_t *dev);
+u32 pci_read_resource(pcidev_t dev, int bar);
 
-int pci_find_device(unsigned short vid, unsigned short did, pcidev_t *dev);
-unsigned int pci_read_resource(pcidev_t dev, int bar);
+void pci_set_bus_master(pcidev_t dev);
 
 #endif