*/
#include <arch/io.h>
+#include <pci.h>
+#include <libpayload.h>
#include "coreinfo.h"
+#ifdef CONFIG_MODULE_PCI
+
struct pci_devices {
- unsigned short device;
+ pcidev_t device;
unsigned int id;
};
-static struct pci_devices devices[64];
+#define MAX_PCI_DEVICES 64
+static struct pci_devices devices[MAX_PCI_DEVICES];
static int devices_index;
-#define REG_VENDOR_ID 0x00
-#define REG_HEADER_TYPE 0x0e
-#define REG_PRIMARY_BUS 0x18
-
-#define HEADER_TYPE_NORMAL 0
-#define HEADER_TYPE_BRIDGE 1
-#define HEADER_TYPE_CARDBUS 2
-
-#define PCI_ADDR(_bus, _dev, _reg) \
- (0x80000000 | (_bus << 16) | (_dev << 8) | (_reg & ~3))
-
/* Number of entries to show in the list */
#define MENU_VISIBLE 16
quicksort(&(list[index]), len - index);
}
-static void pci_read_dword(unsigned int bus, unsigned int devfn,
- unsigned int reg, unsigned int *val)
-{
- outl(PCI_ADDR(bus, devfn, reg), 0xcf8);
- *val = inl(0xcfc);
-}
-
-static void pci_read_byte(unsigned int bus, unsigned int devfn,
- unsigned int reg, unsigned char *val)
-{
- outl(PCI_ADDR(bus, devfn, reg), 0xcf8);
- *val = inb(0xcfc + (reg & 3));
-}
-
-static int show_config_space(WINDOW *win, int row, int col, int index)
+static void show_config_space(WINDOW *win, int row, int col, int index)
{
- unsigned char cspace[64];
- int bus, devfn;
+ unsigned char cspace[256];
+ pcidev_t dev;
int i, x, y;
- bus = (devices[index].device >> 8) & 0xff;
- devfn = devices[index].device & 0xff;
+ dev = devices[index].device;
- for (i = 0; i < 64; i += 4)
- pci_read_dword(bus, devfn, i, ((int *)&cspace[i]));
+ for (i = 0; i < 256; i ++)
+ cspace[i] = pci_read_config8(dev, i);
- for (y = 0; y < 4; y++) {
+ for (y = 0; y < 16; y++) {
for (x = 0; x < 16; x++)
mvwprintw(win, row + y, col + (x * 3), "%2.2X ",
cspace[(y * 16) + x]);
}
}
-int pci_module_redraw(WINDOW *win)
+static int pci_module_redraw(WINDOW *win)
{
- unsigned int bus, devfn, func;
+ unsigned int bus, slot, func;
int i, last;
print_module_title(win, "PCI Device List");
continue;
}
- bus = (devices[item].device >> 8) & 0xff;
- devfn = (devices[item].device & 0xff) / 8;
- func = (devices[item].device & 0xff) % 8;
+ bus = PCI_BUS(devices[item].device);
+ slot = PCI_SLOT(devices[item].device);
+ func = PCI_FUNC(devices[item].device);
if (item == menu_selected)
wattrset(win, COLOR_PAIR(3) | A_BOLD);
else
wattrset(win, COLOR_PAIR(2));
- mvwprintw(win, 2 + i, 1, "%X:%2.2X.%2.2X %X:%X ",
- bus, devfn, func,
+ mvwprintw(win, 2 + i, 1, "%X:%2.2X.%2.2X %04X:%04X ",
+ bus, slot, func,
devices[item].id & 0xffff,
(devices[item].id >> 16) & 0xffff);
if (i == 0) {
if (item != 0)
- mvwprintw(win, 2 + i, 19, "\30");
+ mvwaddch(win, 2 + i, 19, ACS_UARROW);
}
if (i == MENU_VISIBLE - 1) {
if ((item + 1) < devices_index)
- mvwprintw(win, 2 + i, 19, "\31");
+ mvwaddch(win, 2 + i, 19, ACS_DARROW);
}
}
wmove(win, 3, 25);
for (i = 0; i < 48; i++)
- waddch(win, (i == 0) ? '\332' : '\304');
+ waddch(win, (i == 0) ? ACS_ULCORNER : ACS_HLINE);
- for (i = 0; i < 4; i++) {
+ for (i = 0; i < 16; i++) {
mvwprintw(win, 4 + i, 23, "%2.2X", i * 16);
wmove(win, 4 + i, 25);
- waddch(win, '\263');
+ waddch(win, ACS_VLINE);
}
show_config_space(win, 4, 26, menu_selected);
static void pci_scan_bus(int bus)
{
- int devfn, func;
+ int slot, func;
unsigned int val;
unsigned char hdr;
- for (devfn = 0; devfn < 0x100;) {
- for (func = 0; func < 8; func++, devfn++) {
- pci_read_dword(bus, devfn, REG_VENDOR_ID, &val);
+ for (slot = 0; slot < 0x20; slot++) {
+ for (func = 0; func < 8; func++) {
+ pcidev_t dev = PCI_DEV(bus, slot, func);
+
+ val = pci_read_config32(dev, REG_VENDOR_ID);
/* Nobody home. */
if (val == 0xffffffff || val == 0x00000000 ||
continue;
/* FIXME: Remove this arbitrary limitation. */
- if (devices_index >= 64)
+ if (devices_index >= MAX_PCI_DEVICES)
return;
devices[devices_index].device =
- ((bus & 0xff) << 8) | (devfn & 0xff);
+ PCI_DEV(bus, slot, func);
devices[devices_index++].id = val;
/* If this is a bridge, then follow it. */
- pci_read_byte(bus, devfn, REG_HEADER_TYPE, &hdr);
+ hdr = pci_read_config8(dev, REG_HEADER_TYPE);
hdr &= 0x7f;
if (hdr == HEADER_TYPE_BRIDGE ||
hdr == HEADER_TYPE_CARDBUS) {
unsigned int busses;
- pci_read_dword(bus, devfn, REG_PRIMARY_BUS,
- &busses);
+ busses = pci_read_config32(dev, REG_PRIMARY_BUS);
pci_scan_bus((busses >> 8) & 0xff);
quicksort(devices, devices_index);
}
-int pci_module_handle(int key)
+static int pci_module_handle(int key)
{
int ret = 0;
return ret;
}
-int pci_module_init(void)
+static int pci_module_init(void)
{
- unsigned int val;
- int bus = 0;
-
pci_scan_bus(0);
-
return 0;
}
.redraw = pci_module_redraw,
.handle = pci_module_handle,
};
+
+#else
+
+struct coreinfo_module pci_module = {
+};
+
+#endif
projects / coreboot.git / blobdiff