#include <signal.h>
#endif
+#define MONO_CONTEXT_OFFSET(field, index, field_type) \
+ "i" (offsetof (MonoContext, field) + (index) * sizeof (field_type))
+
+#if defined(__APPLE__)
+typedef struct __darwin_xmm_reg MonoContextSimdReg;
+#endif
+
/*
* General notes about mono-context.
* Each arch defines a MonoContext struct with all GPR regs + IP/PC.
# define SC_ESI esi
#endif
+#include <mono/arch/x86/x86-codegen.h>
+
typedef struct {
mgreg_t eax;
mgreg_t ebx;
mgreg_t esi;
mgreg_t edi;
mgreg_t eip;
+#ifdef __APPLE__
+ MonoContextSimdReg fregs [X86_XMM_NREG];
+#endif
} MonoContext;
#define MONO_CONTEXT_SET_IP(ctx,ip) do { (ctx)->eip = (mgreg_t)(ip); } while (0);
} \
} while (0)
#else
-#define MONO_CONTEXT_GET_CURRENT(ctx) \
+
+#define MONO_CONTEXT_GET_CURRENT_GREGS(ctx) \
__asm__ __volatile__( \
- "movl $0x0, 0x00(%0)\n" \
- "mov %%ebx, 0x04(%0)\n" \
- "mov %%ecx, 0x08(%0)\n" \
- "mov %%edx, 0x0c(%0)\n" \
- "mov %%ebp, 0x10(%0)\n" \
- "mov %%esp, 0x14(%0)\n" \
- "mov %%esi, 0x18(%0)\n" \
- "mov %%edi, 0x1c(%0)\n" \
+ "movl $0x0, %c[eax](%0)\n" \
+ "mov %%ebx, %c[ebx](%0)\n" \
+ "mov %%ecx, %c[ecx](%0)\n" \
+ "mov %%edx, %c[edx](%0)\n" \
+ "mov %%ebp, %c[ebp](%0)\n" \
+ "mov %%esp, %c[esp](%0)\n" \
+ "mov %%esi, %c[esi](%0)\n" \
+ "mov %%edi, %c[edi](%0)\n" \
"call 1f\n" \
"1: pop 0x20(%0)\n" \
: \
- : "a" (&(ctx)) \
+ : "a" (&(ctx)), \
+ [eax] MONO_CONTEXT_OFFSET (eax, 0, mgreg_t), \
+ [ebx] MONO_CONTEXT_OFFSET (ebx, 0, mgreg_t), \
+ [ecx] MONO_CONTEXT_OFFSET (ecx, 0, mgreg_t), \
+ [edx] MONO_CONTEXT_OFFSET (edx, 0, mgreg_t), \
+ [ebp] MONO_CONTEXT_OFFSET (ebp, 0, mgreg_t), \
+ [esp] MONO_CONTEXT_OFFSET (esp, 0, mgreg_t), \
+ [esi] MONO_CONTEXT_OFFSET (esi, 0, mgreg_t), \
+ [edi] MONO_CONTEXT_OFFSET (edi, 0, mgreg_t) \
: "memory")
+
+#ifdef UCONTEXT_REG_XMM
+#define MONO_CONTEXT_GET_CURRENT_FREGS(ctx) \
+ do { \
+ __asm__ __volatile__ ( \
+ "movups %%xmm0, %c[xmm0](%0)\n" \
+ "movups %%xmm1, %c[xmm1](%0)\n" \
+ "movups %%xmm2, %c[xmm2](%0)\n" \
+ "movups %%xmm3, %c[xmm3](%0)\n" \
+ "movups %%xmm4, %c[xmm4](%0)\n" \
+ "movups %%xmm5, %c[xmm5](%0)\n" \
+ "movups %%xmm6, %c[xmm6](%0)\n" \
+ "movups %%xmm7, %c[xmm7](%0)\n" \
+ : \
+ : "a" (&(ctx)), \
+ [xmm0] MONO_CONTEXT_OFFSET (fregs, X86_XMM0, MonoContextSimdReg), \
+ [xmm1] MONO_CONTEXT_OFFSET (fregs, X86_XMM1, MonoContextSimdReg), \
+ [xmm2] MONO_CONTEXT_OFFSET (fregs, X86_XMM2, MonoContextSimdReg), \
+ [xmm3] MONO_CONTEXT_OFFSET (fregs, X86_XMM3, MonoContextSimdReg), \
+ [xmm4] MONO_CONTEXT_OFFSET (fregs, X86_XMM4, MonoContextSimdReg), \
+ [xmm5] MONO_CONTEXT_OFFSET (fregs, X86_XMM5, MonoContextSimdReg), \
+ [xmm6] MONO_CONTEXT_OFFSET (fregs, X86_XMM6, MonoContextSimdReg), \
+ [xmm7] MONO_CONTEXT_OFFSET (fregs, X86_XMM7, MonoContextSimdReg), \
+ } while (0)
+#else
+#define MONO_CONTEXT_GET_CURRENT_FREGS(ctx)
+#endif
+
+#define MONO_CONTEXT_GET_CURRENT(ctx) \
+ do { \
+ MONO_CONTEXT_GET_CURRENT_GREGS(ctx); \
+ MONO_CONTEXT_GET_CURRENT_FREGS(ctx); \
+ } while (0)
+
#endif
#define MONO_ARCH_HAS_MONO_CONTEXT 1
typedef struct {
mgreg_t gregs [AMD64_NREG];
+#ifdef __APPLE__
+ MonoContextSimdReg fregs [AMD64_XMM_NREG];
+#else
double fregs [AMD64_XMM_NREG];
+#endif
} MonoContext;
#define MONO_CONTEXT_SET_IP(ctx,ip) do { (ctx)->gregs [AMD64_RIP] = (mgreg_t)(ip); } while (0);
: "rdx", "memory")
#else
-#define MONO_CONTEXT_GET_CURRENT(ctx) \
- __asm__ __volatile__( \
- "movq $0x0, 0x00(%0)\n" \
- "movq %%rcx, 0x08(%0)\n" \
- "movq %%rdx, 0x10(%0)\n" \
- "movq %%rbx, 0x18(%0)\n" \
- "movq %%rsp, 0x20(%0)\n" \
- "movq %%rbp, 0x28(%0)\n" \
- "movq %%rsi, 0x30(%0)\n" \
- "movq %%rdi, 0x38(%0)\n" \
- "movq %%r8, 0x40(%0)\n" \
- "movq %%r9, 0x48(%0)\n" \
- "movq %%r10, 0x50(%0)\n" \
- "movq %%r11, 0x58(%0)\n" \
- "movq %%r12, 0x60(%0)\n" \
- "movq %%r13, 0x68(%0)\n" \
- "movq %%r14, 0x70(%0)\n" \
- "movq %%r15, 0x78(%0)\n" \
- /* "leaq (%%rip), %%rdx\n" is not understood by icc */ \
- ".byte 0x48, 0x8d, 0x15, 0x00, 0x00, 0x00, 0x00\n" \
- "movq %%rdx, 0x80(%0)\n" \
- : \
- : "a" (&(ctx)) \
- : "rdx", "memory")
+#define MONO_CONTEXT_GET_CURRENT_GREGS(ctx) \
+ do { \
+ __asm__ __volatile__( \
+ "movq $0x0, %c[rax](%0)\n" \
+ "movq %%rcx, %c[rcx](%0)\n" \
+ "movq %%rdx, %c[rdx](%0)\n" \
+ "movq %%rbx, %c[rbx](%0)\n" \
+ "movq %%rsp, %c[rsp](%0)\n" \
+ "movq %%rbp, %c[rbp](%0)\n" \
+ "movq %%rsi, %c[rsi](%0)\n" \
+ "movq %%rdi, %c[rdi](%0)\n" \
+ "movq %%r8, %c[r8](%0)\n" \
+ "movq %%r9, %c[r9](%0)\n" \
+ "movq %%r10, %c[r10](%0)\n" \
+ "movq %%r11, %c[r11](%0)\n" \
+ "movq %%r12, %c[r12](%0)\n" \
+ "movq %%r13, %c[r13](%0)\n" \
+ "movq %%r14, %c[r14](%0)\n" \
+ "movq %%r15, %c[r15](%0)\n" \
+ /* "leaq (%%rip), %%rdx\n" is not understood by icc */ \
+ ".byte 0x48, 0x8d, 0x15, 0x00, 0x00, 0x00, 0x00\n" \
+ "movq %%rdx, %c[rip](%0)\n" \
+ : \
+ : "a" (&(ctx)), \
+ [rax] MONO_CONTEXT_OFFSET (gregs, AMD64_RAX, mgreg_t), \
+ [rcx] MONO_CONTEXT_OFFSET (gregs, AMD64_RCX, mgreg_t), \
+ [rdx] MONO_CONTEXT_OFFSET (gregs, AMD64_RDX, mgreg_t), \
+ [rbx] MONO_CONTEXT_OFFSET (gregs, AMD64_RBX, mgreg_t), \
+ [rsp] MONO_CONTEXT_OFFSET (gregs, AMD64_RSP, mgreg_t), \
+ [rbp] MONO_CONTEXT_OFFSET (gregs, AMD64_RBP, mgreg_t), \
+ [rsi] MONO_CONTEXT_OFFSET (gregs, AMD64_RSI, mgreg_t), \
+ [rdi] MONO_CONTEXT_OFFSET (gregs, AMD64_RDI, mgreg_t), \
+ [r8] MONO_CONTEXT_OFFSET (gregs, AMD64_R8, mgreg_t), \
+ [r9] MONO_CONTEXT_OFFSET (gregs, AMD64_R9, mgreg_t), \
+ [r10] MONO_CONTEXT_OFFSET (gregs, AMD64_R10, mgreg_t), \
+ [r11] MONO_CONTEXT_OFFSET (gregs, AMD64_R11, mgreg_t), \
+ [r12] MONO_CONTEXT_OFFSET (gregs, AMD64_R12, mgreg_t), \
+ [r13] MONO_CONTEXT_OFFSET (gregs, AMD64_R13, mgreg_t), \
+ [r14] MONO_CONTEXT_OFFSET (gregs, AMD64_R14, mgreg_t), \
+ [r15] MONO_CONTEXT_OFFSET (gregs, AMD64_R15, mgreg_t), \
+ [rip] MONO_CONTEXT_OFFSET (gregs, AMD64_RIP, mgreg_t) \
+ : "rdx", "memory"); \
+ } while (0)
+
+#ifdef UCONTEXT_REG_XMM
+#define MONO_CONTEXT_GET_CURRENT_FREGS(ctx) \
+ do { \
+ __asm__ __volatile__ ( \
+ "movups %%xmm0, %c[xmm0](%0)\n" \
+ "movups %%xmm1, %c[xmm1](%0)\n" \
+ "movups %%xmm2, %c[xmm2](%0)\n" \
+ "movups %%xmm3, %c[xmm3](%0)\n" \
+ "movups %%xmm4, %c[xmm4](%0)\n" \
+ "movups %%xmm5, %c[xmm5](%0)\n" \
+ "movups %%xmm6, %c[xmm6](%0)\n" \
+ "movups %%xmm7, %c[xmm7](%0)\n" \
+ "movups %%xmm8, %c[xmm8](%0)\n" \
+ "movups %%xmm9, %c[xmm9](%0)\n" \
+ "movups %%xmm10, %c[xmm10](%0)\n" \
+ "movups %%xmm11, %c[xmm11](%0)\n" \
+ "movups %%xmm12, %c[xmm12](%0)\n" \
+ "movups %%xmm12, %c[xmm12](%0)\n" \
+ "movups %%xmm14, %c[xmm14](%0)\n" \
+ "movups %%xmm15, %c[xmm15](%0)\n" \
+ : \
+ : "a" (&(ctx)), \
+ [xmm0] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM0, MonoContextSimdReg), \
+ [xmm1] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM1, MonoContextSimdReg), \
+ [xmm2] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM2, MonoContextSimdReg), \
+ [xmm3] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM3, MonoContextSimdReg), \
+ [xmm4] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM4, MonoContextSimdReg), \
+ [xmm5] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM5, MonoContextSimdReg), \
+ [xmm6] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM6, MonoContextSimdReg), \
+ [xmm7] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM7, MonoContextSimdReg), \
+ [xmm8] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM8, MonoContextSimdReg), \
+ [xmm9] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM9, MonoContextSimdReg), \
+ [xmm10] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM10, MonoContextSimdReg), \
+ [xmm11] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM11, MonoContextSimdReg), \
+ [xmm12] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM12, MonoContextSimdReg), \
+ [xmm13] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM13, MonoContextSimdReg), \
+ [xmm14] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM14, MonoContextSimdReg), \
+ [xmm15] MONO_CONTEXT_OFFSET (fregs, AMD64_XMM15, MonoContextSimdReg)); \
+ } while (0)
+#else
+#define MONO_CONTEXT_GET_CURRENT_FREGS(ctx)
+#endif
+
+#define MONO_CONTEXT_GET_CURRENT(ctx) \
+ do { \
+ MONO_CONTEXT_GET_CURRENT_GREGS(ctx); \
+ MONO_CONTEXT_GET_CURRENT_FREGS(ctx); \
+ } while (0)
#endif
#define MONO_ARCH_HAS_MONO_CONTEXT 1
#if defined(HOST_WATCHOS)
#define MONO_CONTEXT_GET_CURRENT(ctx) do { \
- int _dummy; \
+ gpointer _dummy; \
ctx.regs [ARMREG_SP] = &_dummy; \
} while (0);
"push {r0}\n" \
"push {r1}\n" \
"mov r0, %0\n" \
- "ldr r1, [sp, #4]\n" \
- "str r1, [r0]!\n" \
- "ldr r1, [sp, #0]\n" \
- "str r1, [r0]!\n" \
+ "ldr r1, [sp, #4]\n" \
+ "str r1, [r0], #4\n" \
+ "ldr r1, [sp, #0]\n" \
+ "str r1, [r0], #4\n" \
"stmia r0!, {r2-r12}\n" \
- "str sp, [r0]!\n" \
- "str lr, [r0]!\n" \
+ "str sp, [r0], #4\n" \
+ "str lr, [r0], #4\n" \
"mov r1, pc\n" \
- "str r1, [r0]!\n" \
+ "str r1, [r0], #4\n" \
"pop {r1}\n" \
"pop {r0}\n" \
: \
mgreg_t regs [32];
double fregs [32];
mgreg_t pc;
+ /*
+ * fregs might not be initialized if this context was created from a
+ * ucontext.
+ */
+ mgreg_t has_fregs;
} MonoContext;
#define MONO_CONTEXT_SET_IP(ctx,ip) do { (ctx)->pc = (mgreg_t)ip; } while (0)
thread_port_t self = mach_thread_self (); \
kern_return_t ret = thread_get_state (self, state_flavor, (thread_state_t) &thread_state, &state_count); \
g_assert (ret == 0); \
- mono_mach_arch_thread_state_to_mono_context ((thread_state_t)&thread_state, &ctx); \
+ mono_mach_arch_thread_states_to_mono_context ((thread_state_t)&thread_state, (thread_state_t)NULL, &ctx); \
mach_port_deallocate (current_task (), self); \
} while (0);
"stp x24, x25, [x16], #16\n" \
"stp x26, x27, [x16], #16\n" \
"stp x28, x29, [x16], #16\n" \
- "stp x30, xzr, [x16]\n" \
+ "stp x30, xzr, [x16], #8\n" \
"mov x30, sp\n" \
- "str x30, [x16, #8]\n" \
+ "str x30, [x16], #8\n" \
+ "stp d0, d1, [x16], #16\n" \
+ "stp d2, d3, [x16], #16\n" \
+ "stp d4, d5, [x16], #16\n" \
+ "stp d6, d7, [x16], #16\n" \
+ "stp d8, d9, [x16], #16\n" \
+ "stp d10, d11, [x16], #16\n" \
+ "stp d12, d13, [x16], #16\n" \
+ "stp d14, d15, [x16], #16\n" \
+ "stp d16, d17, [x16], #16\n" \
+ "stp d18, d19, [x16], #16\n" \
+ "stp d20, d21, [x16], #16\n" \
+ "stp d22, d23, [x16], #16\n" \
+ "stp d24, d25, [x16], #16\n" \
+ "stp d26, d27, [x16], #16\n" \
+ "stp d28, d29, [x16], #16\n" \
+ "stp d30, d31, [x16], #16\n" \
: \
: "r" (&ctx.regs) \
- : "x30", "memory" \
+ : "x16", "x30", "memory" \
); \
__asm__ __volatile__( \
"adr %0, L0%=\n" \
#define MONO_CONTEXT_SET_SP(ctx,sp) do { (ctx)->sc_sp = (gulong)sp; } while (0);
#define MONO_CONTEXT_GET_IP(ctx) ((gpointer)((ctx)->sc_ir))
-#define MONO_CONTEXT_GET_BP(ctx) ((gpointer)((ctx)->regs [ppc_r31-13]))
+#define MONO_CONTEXT_GET_BP(ctx) ((gpointer)((ctx)->regs [ppc_r31]))
#define MONO_CONTEXT_GET_SP(ctx) ((gpointer)((ctx)->sc_sp))
#define MONO_CONTEXT_GET_CURRENT(ctx) \
#define MONO_CONTEXT_SET_SP(ctx,sp) do { (ctx)->sc_sp = (mgreg_t)sp; } while (0);
#define MONO_CONTEXT_GET_IP(ctx) ((gpointer)((ctx)->sc_ir))
-#define MONO_CONTEXT_GET_BP(ctx) ((gpointer)((ctx)->regs [ppc_r31-13]))
+#define MONO_CONTEXT_GET_BP(ctx) ((gpointer)((ctx)->regs [ppc_r31]))
#define MONO_CONTEXT_GET_SP(ctx) ((gpointer)((ctx)->sc_sp))
#define MONO_CONTEXT_GET_CURRENT(ctx) \
__asm__ __volatile__( \
- "std 0, 0(%0)\n" \
- "std 1, 4(%0)\n" \
- "std 0, 4*0+8(%0)\n" \
- "std 1, 4*1+8(%0)\n" \
- "std 2, 4*2+8(%0)\n" \
- "std 3, 4*3+8(%0)\n" \
- "std 4, 4*4+8(%0)\n" \
- "std 5, 4*5+8(%0)\n" \
- "std 6, 4*6+8(%0)\n" \
- "std 7, 4*7+8(%0)\n" \
- "std 8, 4*8+8(%0)\n" \
- "std 9, 4*9+8(%0)\n" \
- "std 10, 4*10+8(%0)\n" \
- "std 11, 4*11+8(%0)\n" \
- "std 12, 4*12+8(%0)\n" \
- "std 13, 4*13+8(%0)\n" \
- "std 14, 4*14+8(%0)\n" \
- "std 15, 4*15+8(%0)\n" \
- "std 16, 4*16+8(%0)\n" \
- "std 17, 4*17+8(%0)\n" \
- "std 18, 4*18+8(%0)\n" \
- "std 19, 4*19+8(%0)\n" \
- "std 20, 4*20+8(%0)\n" \
- "std 21, 4*21+8(%0)\n" \
- "std 22, 4*22+8(%0)\n" \
- "std 23, 4*23+8(%0)\n" \
- "std 24, 4*24+8(%0)\n" \
- "std 25, 4*25+8(%0)\n" \
- "std 26, 4*26+8(%0)\n" \
- "std 27, 4*27+8(%0)\n" \
- "std 28, 4*28+8(%0)\n" \
- "std 29, 4*29+8(%0)\n" \
- "std 30, 4*30+8(%0)\n" \
- "std 31, 4*31+8(%0)\n" \
+ "stw 0, 0(%0)\n" \
+ "stw 1, 4(%0)\n" \
+ "stw 0, 4*0+8(%0)\n" \
+ "stw 1, 4*1+8(%0)\n" \
+ "stw 2, 4*2+8(%0)\n" \
+ "stw 3, 4*3+8(%0)\n" \
+ "stw 4, 4*4+8(%0)\n" \
+ "stw 5, 4*5+8(%0)\n" \
+ "stw 6, 4*6+8(%0)\n" \
+ "stw 7, 4*7+8(%0)\n" \
+ "stw 8, 4*8+8(%0)\n" \
+ "stw 9, 4*9+8(%0)\n" \
+ "stw 10, 4*10+8(%0)\n" \
+ "stw 11, 4*11+8(%0)\n" \
+ "stw 12, 4*12+8(%0)\n" \
+ "stw 13, 4*13+8(%0)\n" \
+ "stw 14, 4*14+8(%0)\n" \
+ "stw 15, 4*15+8(%0)\n" \
+ "stw 16, 4*16+8(%0)\n" \
+ "stw 17, 4*17+8(%0)\n" \
+ "stw 18, 4*18+8(%0)\n" \
+ "stw 19, 4*19+8(%0)\n" \
+ "stw 20, 4*20+8(%0)\n" \
+ "stw 21, 4*21+8(%0)\n" \
+ "stw 22, 4*22+8(%0)\n" \
+ "stw 23, 4*23+8(%0)\n" \
+ "stw 24, 4*24+8(%0)\n" \
+ "stw 25, 4*25+8(%0)\n" \
+ "stw 26, 4*26+8(%0)\n" \
+ "stw 27, 4*27+8(%0)\n" \
+ "stw 28, 4*28+8(%0)\n" \
+ "stw 29, 4*29+8(%0)\n" \
+ "stw 30, 4*30+8(%0)\n" \
+ "stw 31, 4*31+8(%0)\n" \
"stfd 0, 8*0+4*32+8(%0)\n" \
"stfd 1, 8*1+4*32+8(%0)\n" \
"stfd 2, 8*2+4*32+8(%0)\n" \
"stfd 30, 8*30+4*32+8(%0)\n" \
"stfd 31, 8*31+4*32+8(%0)\n" \
: : "r" (&(ctx)) \
- : "memory" \
+ : "memory", "r0" \
)
#endif
#elif ((defined(__mips__) && !defined(MONO_CROSS_COMPILE)) || (defined(TARGET_MIPS))) && SIZEOF_REGISTER == 4 /* defined(__ia64__) */
+#define MONO_ARCH_HAS_MONO_CONTEXT 1
+
#include <mono/arch/mips/mips-codegen.h>
typedef struct {
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