#define DWARF_PC_REG (mono_hw_reg_to_dwarf_reg (AMD64_RIP))
#elif defined(TARGET_ARM)
// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0040a/IHI0040A_aadwarf.pdf
-/* Assign d8..d15 to hregs 16..24 */
+/* Assign d8..d15 to hregs 16..24 (dwarf regs 264..271) */
static int map_hw_reg_to_dwarf_reg [] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 264, 265, 266, 267, 268, 269, 270, 271 };
#define NUM_REGS 272
#define DWARF_DATA_ALIGN (-4)
#define DWARF_PC_REG (mono_hw_reg_to_dwarf_reg (ARMREG_LR))
+#define IS_DOUBLE_REG(dwarf_reg) (((dwarf_reg) >= 264) && ((dwarf_reg) <= 271))
#elif defined(TARGET_ARM64)
#define NUM_REGS 96
#define DWARF_DATA_ALIGN (-8)
72, 73, 74, 75, 76, 77, 78, 79,
};
#elif defined (TARGET_X86)
-#ifdef __APPLE__
/*
- * LLVM seems to generate unwind info where esp is encoded as 5, and ebp as 4, ie see this line:
- * def ESP : RegisterWithSubRegs<"esp", [SP]>, DwarfRegNum<[-2, 5, 4]>;
- * in lib/Target/X86/X86RegisterInfo.td in the llvm sources.
+ * ebp and esp are swapped:
+ * http://lists.cs.uiuc.edu/pipermail/lldb-dev/2014-January/003101.html
*/
static int map_hw_reg_to_dwarf_reg [] = { 0, 1, 2, 3, 5, 4, 6, 7, 8 };
-#else
-static int map_hw_reg_to_dwarf_reg [] = { 0, 1, 2, 3, 4, 5, 6, 7, 8 };
-#endif
/* + 1 is for IP */
#define NUM_REGS X86_NREG + 1
#define DWARF_DATA_ALIGN (-4)
#define DWARF_PC_REG -1
#endif
+#ifndef IS_DOUBLE_REG
+#define IS_DOUBLE_REG(dwarf_reg) 0
+#endif
+
static gboolean dwarf_reg_to_hw_reg_inited;
static int map_dwarf_reg_to_hw_reg [NUM_REGS];
}
/*
- * mono_unwind_ops_encode:
+ * mono_unwind_ops_encode_full:
*
* Encode the unwind ops in UNWIND_OPS into the compact DWARF encoding.
* Return a pointer to malloc'ed memory.
+ * If ENABLE_EXTENSIONS is FALSE, avoid encoding the mono extension
+ * opcode (DW_CFA_mono_advance_loc).
*/
guint8*
-mono_unwind_ops_encode (GSList *unwind_ops, guint32 *out_len)
+mono_unwind_ops_encode_full (GSList *unwind_ops, guint32 *out_len, gboolean enable_extensions)
{
GSList *l;
MonoUnwindOp *op;
*p ++ = op->op;
break;
case DW_CFA_mono_advance_loc:
+ if (!enable_extensions)
+ break;
/* Only one location is supported */
g_assert (op->val == 0);
*p ++ = op->op;
return res;
}
+guint8*
+mono_unwind_ops_encode (GSList *unwind_ops, guint32 *out_len)
+{
+ return mono_unwind_ops_encode_full (unwind_ops, out_len, TRUE);
+}
+
#if 0
#define UNW_DEBUG(stmt) do { stmt; } while (0)
#else
void
mono_unwind_frame (guint8 *unwind_info, guint32 unwind_info_len,
guint8 *start_ip, guint8 *end_ip, guint8 *ip, guint8 **mark_locations,
- mgreg_t *regs, int nregs,
+ mono_unwind_reg_t *regs, int nregs,
mgreg_t **save_locations, int save_locations_len,
guint8 **out_cfa)
{
if (reg_saved [i] && locations [i].loc_type == LOC_OFFSET) {
int hreg = mono_dwarf_reg_to_hw_reg (i);
g_assert (hreg < nregs);
- regs [hreg] = *(mgreg_t*)(cfa_val + locations [i].offset);
+ if (IS_DOUBLE_REG (i))
+ regs [hreg] = *(guint64*)(cfa_val + locations [i].offset);
+ else
+ regs [hreg] = *(mgreg_t*)(cfa_val + locations [i].offset);
if (save_locations && hreg < save_locations_len)
save_locations [hreg] = (mgreg_t*)(cfa_val + locations [i].offset);
}
GSList*
mono_unwind_get_cie_program (void)
{
-#if defined(TARGET_AMD64) || defined(TARGET_X86) || defined(TARGET_POWERPC)
+#if defined(TARGET_AMD64) || defined(TARGET_X86) || defined(TARGET_POWERPC) || defined(TARGET_ARM)
return mono_arch_get_cie_program ();
#else
return NULL;