* Modified for SPARC:
* Christopher Taylor (ct@gentoo.org)
* Mark Crichton (crichton@gimp.org)
+ * Zoltan Varga (vargaz@freemail.hu)
*
* (C) 2003 Ximian, Inc.
*/
#include "mini.h"
#include <string.h>
+#include <pthread.h>
+#include <unistd.h>
+
+#ifndef __linux__
+#include <sys/systeminfo.h>
+#include <thread.h>
+#endif
+
+#include <unistd.h>
+#include <sys/mman.h>
#include <mono/metadata/appdomain.h>
#include <mono/metadata/debug-helpers.h>
+#include <mono/metadata/tokentype.h>
+#include <mono/utils/mono-math.h>
#include "mini-sparc.h"
#include "inssel.h"
+#include "trace.h"
#include "cpu-sparc.h"
-int mono_exc_esp_offset = 0;
-
-const char*
-mono_arch_regname (int reg) {
- static const char * rnames[] = {
- "sparc_g0", "sparc_g1", "sparc_g2", "sparc_g3", "sparc_g4",
- "sparc_g5", "sparc_g6", "sparc_g7", "sparc_o0", "sparc_o1",
- "sparc_o2", "sparc_o3", "sparc_o4", "sparc_o5", "sparc_sp",
- "sparc_call", "sparc_l0", "sparc_l1", "sparc_l2", "sparc_l3",
- "sparc_l4", "sparc_l5", "sparc_l6", "sparc_l7", "sparc_i0",
- "sparc_i1", "sparc_i2", "sparc_i3", "sparc_i4", "sparc_i5",
- "sparc_fp", "sparc_retadr"
- };
- if (reg >= 0 && reg < 32)
- return rnames [reg];
- return "unknown";
-}
-
-typedef struct {
- guint16 size;
- guint16 offset;
- guint8 pad;
-} MonoJitArgumentInfo;
-
/*
- * arch_get_argument_info:
- * @csig: a method signature
- * @param_count: the number of parameters to consider
- * @arg_info: an array to store the result infos
- *
- * Gathers information on parameters such as size, alignment and
- * padding. arg_info should be large enought to hold param_count + 1 entries.
+ * Sparc V9 means two things:
+ * - the instruction set
+ * - the ABI
*
- * Returns the size of the activation frame.
+ * V9 instructions are only usable if the underlying processor is 64 bit. Most Sparc
+ * processors in use are 64 bit processors. The V9 ABI is only usable if the
+ * mono executable is a 64 bit executable. So it would make sense to use the 64 bit
+ * instructions without using the 64 bit ABI.
*/
-static int
-arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
-{
- int k, frame_size = 0;
- int size, align, pad;
- int offset = 8;
- if (MONO_TYPE_ISSTRUCT (csig->ret)) {
- frame_size += sizeof (gpointer);
- offset += 4;
- }
+/*
+ * Register usage:
+ * - %i0..%i<n> hold the incoming arguments, these are never written by JITted
+ * code. Unused input registers are used for global register allocation.
+ * - %o0..%o5 and %l7 is used for local register allocation and passing arguments
+ * - %l0..%l6 is used for global register allocation
+ * - %o7 and %g1 is used as scratch registers in opcodes
+ * - all floating point registers are used for local register allocation except %f0.
+ * Only double precision registers are used.
+ * In 64 bit mode:
+ * - fp registers %d0..%d30 are used for parameter passing, and %d32..%d62 are
+ * used for local allocation.
+ */
- arg_info [0].offset = offset;
+/*
+ * Alignment:
+ * - doubles and longs must be stored in dword aligned locations
+ */
- if (csig->hasthis) {
- frame_size += sizeof (gpointer);
- offset += 4;
- }
+/*
+ * The following things are not implemented or do not work:
+ * - some fp arithmetic corner cases
+ * The following tests in mono/mini are expected to fail:
+ * - test_0_simple_double_casts
+ * This test casts (guint64)-1 to double and then back to guint64 again.
+ * Under x86, it returns 0, while under sparc it returns -1.
+ *
+ * In addition to this, the runtime requires the trunc function, or its
+ * solaris counterpart, aintl, to do some double->int conversions. If this
+ * function is not available, it is emulated somewhat, but the results can be
+ * strange.
+ */
- arg_info [0].size = frame_size;
+/*
+ * SPARCV9 FIXME:
+ * - optimize sparc_set according to the memory model
+ * - when non-AOT compiling, compute patch targets immediately so we don't
+ * have to emit the 6 byte template.
+ * - varags
+ * - struct arguments/returns
+ */
- for (k = 0; k < param_count; k++) {
-
- if (csig->pinvoke)
- size = mono_type_native_stack_size (csig->params [k], &align);
- else
- size = mono_type_stack_size (csig->params [k], &align);
-
- /* ignore alignment for now */
- align = 1;
-
- frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
- arg_info [k].pad = pad;
- frame_size += size;
- arg_info [k + 1].pad = 0;
- arg_info [k + 1].size = size;
- offset += pad;
- arg_info [k + 1].offset = offset;
- offset += size;
- }
+/*
+ * SPARCV9 ISSUES:
+ * - sparc_call_simple can't be used in a lot of places since the displacement
+ * might not fit into an imm30.
+ * - g1 can't be used in a lot of places since it is used as a scratch reg in
+ * sparc_set.
+ * - sparc_f0 can't be used as a scratch register on V9
+ * - the %d34..%d62 fp registers are encoded as: %dx = %f(x - 32 + 1), ie.
+ * %d36 = %f5.
+ * - ldind.i4/u4 needs to sign extend/clear out upper word -> slows things down
+ * - ins->dreg can't be used as a scatch register in r4 opcodes since it might
+ * be a double precision register which has no single precision part.
+ * - passing/returning structs is hard to implement, because:
+ * - the spec is very hard to understand
+ * - it requires knowledge about the fields of structure, needs to handle
+ * nested structures etc.
+ */
- align = MONO_ARCH_FRAME_ALIGNMENT;
- frame_size += pad = (align - (frame_size & (align - 1))) & (align - 1);
- arg_info [k].pad = pad;
+/*
+ * Possible optimizations:
+ * - delay slot scheduling
+ * - allocate large constants to registers
+ * - add more mul/div/rem optimizations
+ */
- return frame_size;
-}
+#ifndef __linux__
+#define MONO_SPARC_THR_TLS 1
+#endif
-static int indent_level = 0;
+/*
+ * There was a 64 bit bug in glib-2.2: g_bit_nth_msf (0, -1) would return 32,
+ * causing infinite loops in dominator computation. So glib-2.4 is required.
+ */
+#ifdef SPARCV9
+#if GLIB_MAJOR_VERSION == 2 && GLIB_MINOR_VERSION < 4
+#error "glib 2.4 or later is required for 64 bit mode."
+#endif
+#endif
-static void indent (int diff) {
- int v = indent_level;
- while (v-- > 0) {
- printf (". ");
- }
- indent_level += diff;
-}
+#define NOT_IMPLEMENTED do { g_assert_not_reached (); } while (0)
-static void
-enter_method (MonoMethod *method, char *ebp)
-{
- int i, j;
- MonoClass *class;
- MonoObject *o;
- MonoJitArgumentInfo *arg_info;
- MonoMethodSignature *sig;
- char *fname;
+#define ALIGN_TO(val,align) (((val) + ((align) - 1)) & ~((align) - 1))
- fname = mono_method_full_name (method, TRUE);
- indent (1);
- printf ("ENTER: %s(", fname);
- g_free (fname);
-
- if (((int)ebp & (MONO_ARCH_FRAME_ALIGNMENT - 1)) != 0) {
- g_error ("unaligned stack detected (%p)", ebp);
- }
+#define SIGNAL_STACK_SIZE (64 * 1024)
- sig = method->signature;
+#define STACK_BIAS MONO_SPARC_STACK_BIAS
- arg_info = alloca (sizeof (MonoJitArgumentInfo) * (sig->param_count + 1));
+#ifdef SPARCV9
- arch_get_argument_info (sig, sig->param_count, arg_info);
+/* %g1 is used by sparc_set */
+#define GP_SCRATCH_REG sparc_g4
+/* %f0 is used for parameter passing */
+#define FP_SCRATCH_REG sparc_f30
+#define ARGS_OFFSET (STACK_BIAS + 128)
- if (MONO_TYPE_ISSTRUCT (method->signature->ret)) {
- g_assert (!method->signature->ret->byref);
+#else
- printf ("VALUERET:%p, ", *((gpointer *)(ebp + 8)));
- }
+#define FP_SCRATCH_REG sparc_f0
+#define ARGS_OFFSET 68
+#define GP_SCRATCH_REG sparc_g1
- if (method->signature->hasthis) {
- gpointer *this = (gpointer *)(ebp + arg_info [0].offset);
- if (method->klass->valuetype) {
- printf ("value:%p, ", *this);
- } else {
- o = *((MonoObject **)this);
+#endif
- if (o) {
- class = o->vtable->klass;
+/* Whenever the CPU supports v9 instructions */
+static gboolean sparcv9 = FALSE;
- if (class == mono_defaults.string_class) {
- printf ("this:[STRING:%p:%s], ", o, mono_string_to_utf8 ((MonoString *)o));
- } else {
- printf ("this:%p[%s.%s], ", o, class->name_space, class->name);
- }
- } else
- printf ("this:NULL, ");
- }
- }
+/* Whenever this is a 64bit executable */
+#if SPARCV9
+static gboolean v64 = TRUE;
+#else
+static gboolean v64 = FALSE;
+#endif
- for (i = 0; i < method->signature->param_count; ++i) {
- gpointer *cpos = (gpointer *)(ebp + arg_info [i + 1].offset);
- int size = arg_info [i + 1].size;
+static gpointer mono_arch_get_lmf_addr (void);
- MonoType *type = method->signature->params [i];
-
- if (type->byref) {
- printf ("[BYREF:%p], ", *cpos);
- } else switch (type->type) {
-
- case MONO_TYPE_I:
- case MONO_TYPE_U:
- printf ("%p, ", (gpointer)*((int *)(cpos)));
- break;
- case MONO_TYPE_BOOLEAN:
- case MONO_TYPE_CHAR:
- case MONO_TYPE_I1:
- case MONO_TYPE_U1:
- case MONO_TYPE_I2:
- case MONO_TYPE_U2:
- case MONO_TYPE_I4:
- case MONO_TYPE_U4:
- printf ("%d, ", *((int *)(cpos)));
- break;
- case MONO_TYPE_STRING: {
- MonoString *s = *((MonoString **)cpos);
- if (s) {
- g_assert (((MonoObject *)s)->vtable->klass == mono_defaults.string_class);
- printf ("[STRING:%p:%s], ", s, mono_string_to_utf8 (s));
- } else
- printf ("[STRING:null], ");
- break;
- }
- case MONO_TYPE_CLASS:
- case MONO_TYPE_OBJECT: {
- o = *((MonoObject **)cpos);
- if (o) {
- class = o->vtable->klass;
-
- if (class == mono_defaults.string_class) {
- printf ("[STRING:%p:%s], ", o, mono_string_to_utf8 ((MonoString *)o));
- } else if (class == mono_defaults.int32_class) {
- printf ("[INT32:%p:%d], ", o, *(gint32 *)((char *)o + sizeof (MonoObject)));
- } else
- printf ("[%s.%s:%p], ", class->name_space, class->name, o);
- } else {
- printf ("%p, ", *((gpointer *)(cpos)));
- }
- break;
- }
- case MONO_TYPE_PTR:
- case MONO_TYPE_FNPTR:
- case MONO_TYPE_ARRAY:
- case MONO_TYPE_SZARRAY:
- printf ("%p, ", *((gpointer *)(cpos)));
- break;
- case MONO_TYPE_I8:
- printf ("%lld, ", *((gint64 *)(cpos)));
- break;
- case MONO_TYPE_R4:
- printf ("%f, ", *((float *)(cpos)));
- break;
- case MONO_TYPE_R8:
- printf ("%f, ", *((double *)(cpos)));
- break;
- case MONO_TYPE_VALUETYPE:
- printf ("[");
- for (j = 0; j < size; j++)
- printf ("%02x,", *((guint8*)cpos +j));
- printf ("], ");
- break;
- default:
- printf ("XX, ");
- }
- }
+static int
+mono_spillvar_offset_float (MonoCompile *cfg, int spillvar);
- printf (")\n");
+const char*
+mono_arch_regname (int reg) {
+ static const char * rnames[] = {
+ "sparc_g0", "sparc_g1", "sparc_g2", "sparc_g3", "sparc_g4",
+ "sparc_g5", "sparc_g6", "sparc_g7", "sparc_o0", "sparc_o1",
+ "sparc_o2", "sparc_o3", "sparc_o4", "sparc_o5", "sparc_sp",
+ "sparc_call", "sparc_l0", "sparc_l1", "sparc_l2", "sparc_l3",
+ "sparc_l4", "sparc_l5", "sparc_l6", "sparc_l7", "sparc_i0",
+ "sparc_i1", "sparc_i2", "sparc_i3", "sparc_i4", "sparc_i5",
+ "sparc_fp", "sparc_retadr"
+ };
+ if (reg >= 0 && reg < 32)
+ return rnames [reg];
+ return "unknown";
}
-static void
-leave_method (MonoMethod *method, ...)
-{
- MonoType *type;
- char *fname;
- va_list ap;
-
- va_start(ap, method);
-
- fname = mono_method_full_name (method, TRUE);
- indent (-1);
- printf ("LEAVE: %s", fname);
- g_free (fname);
-
- type = method->signature->ret;
-
-handle_enum:
- switch (type->type) {
- case MONO_TYPE_VOID:
- break;
- case MONO_TYPE_BOOLEAN: {
- int eax = va_arg (ap, int);
- if (eax)
- printf ("TRUE:%d", eax);
- else
- printf ("FALSE");
-
- break;
- }
- case MONO_TYPE_CHAR:
- case MONO_TYPE_I1:
- case MONO_TYPE_U1:
- case MONO_TYPE_I2:
- case MONO_TYPE_U2:
- case MONO_TYPE_I4:
- case MONO_TYPE_U4:
- case MONO_TYPE_I:
- case MONO_TYPE_U: {
- int eax = va_arg (ap, int);
- printf ("EAX=%d", eax);
- break;
- }
- case MONO_TYPE_STRING: {
- MonoString *s = va_arg (ap, MonoString *);
-;
- if (s) {
- g_assert (((MonoObject *)s)->vtable->klass == mono_defaults.string_class);
- printf ("[STRING:%p:%s]", s, mono_string_to_utf8 (s));
- } else
- printf ("[STRING:null], ");
- break;
- }
- case MONO_TYPE_CLASS:
- case MONO_TYPE_OBJECT: {
- MonoObject *o = va_arg (ap, MonoObject *);
-
- if (o) {
- if (o->vtable->klass == mono_defaults.boolean_class) {
- printf ("[BOOLEAN:%p:%d]", o, *((guint8 *)o + sizeof (MonoObject)));
- } else if (o->vtable->klass == mono_defaults.int32_class) {
- printf ("[INT32:%p:%d]", o, *((gint32 *)((char *)o + sizeof (MonoObject))));
- } else if (o->vtable->klass == mono_defaults.int64_class) {
- printf ("[INT64:%p:%lld]", o, *((gint64 *)((char *)o + sizeof (MonoObject))));
- } else
- printf ("[%s.%s:%p]", o->vtable->klass->name_space, o->vtable->klass->name, o);
- } else
- printf ("[OBJECT:%p]", o);
-
- break;
- }
- case MONO_TYPE_PTR:
- case MONO_TYPE_FNPTR:
- case MONO_TYPE_ARRAY:
- case MONO_TYPE_SZARRAY: {
- gpointer p = va_arg (ap, gpointer);
- printf ("result=%p", p);
- break;
- }
- case MONO_TYPE_I8: {
- gint64 l = va_arg (ap, gint64);
- printf ("lresult=%lld", l);
- break;
- }
- case MONO_TYPE_R8: {
- double f = va_arg (ap, double);
- printf ("FP=%f\n", f);
- break;
- }
- case MONO_TYPE_VALUETYPE:
- if (type->data.klass->enumtype) {
- type = type->data.klass->enum_basetype;
- goto handle_enum;
- } else {
- guint8 *p = va_arg (ap, gpointer);
- int j, size, align;
- size = mono_type_size (type, &align);
- printf ("[");
- for (j = 0; p && j < size; j++)
- printf ("%02x,", p [j]);
- printf ("]");
- }
- break;
- default:
- printf ("(unknown return type %x)", method->signature->ret->type);
- }
+const char*
+mono_arch_fregname (int reg) {
+ static const char *rnames [] = {
+ "sparc_f0", "sparc_f1", "sparc_f2", "sparc_f3", "sparc_f4",
+ "sparc_f5", "sparc_f6", "sparc_f7", "sparc_f8", "sparc_f9",
+ "sparc_f10", "sparc_f11", "sparc_f12", "sparc_f13", "sparc_f14",
+ "sparc_f15", "sparc_f16", "sparc_f17", "sparc_f18", "sparc_f19",
+ "sparc_f20", "sparc_f21", "sparc_f22", "sparc_f23", "sparc_f24",
+ "sparc_f25", "sparc_f26", "sparc_f27", "sparc_f28", "sparc_f29",
+ "sparc_f30", "sparc_f31"
+ };
- printf ("\n");
+ if (reg >= 0 && reg < 32)
+ return rnames [reg];
+ else
+ return "unknown";
}
/*
void
mono_arch_cpu_init (void)
{
+ guint32 dummy;
+ /* make sure sparcv9 is initialized for embedded use */
+ mono_arch_cpu_optimizazions(&dummy);
}
/*
guint32
mono_arch_cpu_optimizazions (guint32 *exclude_mask)
{
+ char buf [1024];
guint32 opts = 0;
+
*exclude_mask = 0;
+
+#ifndef __linux__
+ if (!sysinfo (SI_ISALIST, buf, 1024))
+ g_assert_not_reached ();
+#else
+ /* From glibc. If the getpagesize is 8192, we're on sparc64, which
+ * (in)directly implies that we're a v9 or better.
+ * Improvements to this are greatly accepted...
+ * Also, we don't differentiate between v7 and v8. I sense SIGILL
+ * sniffing in my future.
+ */
+ if (getpagesize() == 8192)
+ strcpy (buf, "sparcv9");
+ else
+ strcpy (buf, "sparcv8");
+#endif
+
+ /*
+ * On some processors, the cmov instructions are even slower than the
+ * normal ones...
+ */
+ if (strstr (buf, "sparcv9")) {
+ opts |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
+ sparcv9 = TRUE;
+ }
+ else
+ *exclude_mask |= MONO_OPT_CMOV | MONO_OPT_FCMOV;
+
return opts;
}
-static gboolean
-is_regsize_var (MonoType *t) {
- if (t->byref)
- return TRUE;
- switch (t->type) {
- case MONO_TYPE_I4:
- case MONO_TYPE_U4:
- case MONO_TYPE_I:
- case MONO_TYPE_U:
- return TRUE;
- case MONO_TYPE_OBJECT:
- case MONO_TYPE_STRING:
- case MONO_TYPE_CLASS:
- case MONO_TYPE_SZARRAY:
- case MONO_TYPE_ARRAY:
- return FALSE;
- case MONO_TYPE_VALUETYPE:
- if (t->data.klass->enumtype)
- return is_regsize_var (t->data.klass->enum_basetype);
- return FALSE;
- }
- return FALSE;
+static void
+mono_sparc_break (void)
+{
}
-GList *
-mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
+#ifdef __GNUC__
+#define flushi(addr) __asm__ __volatile__ ("iflush %0"::"r"(addr):"memory")
+#else /* assume Sun's compiler */
+static void flushi(void *addr)
{
- GList *vars = NULL;
- int i;
+ asm("flush %i0");
+}
+#endif
- for (i = 0; i < cfg->num_varinfo; i++) {
- MonoInst *ins = cfg->varinfo [i];
- MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
+#ifndef __linux__
+void sync_instruction_memory(caddr_t addr, int len);
+#endif
- /* unused vars */
- if (vmv->range.first_use.abs_pos > vmv->range.last_use.abs_pos)
- continue;
+void
+mono_arch_flush_icache (guint8 *code, gint size)
+{
+#ifndef __linux__
+ /* Hopefully this is optimized based on the actual CPU */
+ sync_instruction_memory (code, size);
+#else
+ guint64 *p = (guint64*)code;
+ guint64 *end = (guint64*)(code + ((size + 8) /8));
- if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode != OP_LOCAL && ins->opcode != OP_ARG))
- continue;
+ /*
+ * FIXME: Flushing code in dword chunks in _slow_.
+ */
+ while (p < end)
+#ifdef __GNUC__
+ __asm__ __volatile__ ("iflush %0"::"r"(p++));
+#else
+ flushi (p ++);
+#endif
+#endif
+}
- /* we can only allocate 32 bit values */
- if (is_regsize_var (ins->inst_vtype)) {
- g_assert (MONO_VARINFO (cfg, i)->reg == -1);
- g_assert (i == vmv->idx);
- vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
- }
+/*
+ * mono_sparc_flushw:
+ *
+ * Flush all register windows to memory. Every register window is saved to
+ * a 16 word area on the stack pointed to by its %sp register.
+ */
+void
+mono_sparc_flushw (void)
+{
+ static guint32 start [64];
+ static int inited = 0;
+ guint32 *code;
+ static void (*flushw) (void);
+
+ if (!inited) {
+ code = start;
+
+ sparc_save_imm (code, sparc_sp, -160, sparc_sp);
+ sparc_flushw (code);
+ sparc_ret (code);
+ sparc_restore_simple (code);
+
+ g_assert ((code - start) < 64);
+
+ flushw = (gpointer)start;
+
+ inited = 1;
}
- return vars;
+ flushw ();
}
-GList *
-mono_arch_get_global_int_regs (MonoCompile *cfg)
+void
+mono_arch_flush_register_windows (void)
{
- GList *regs = NULL;
- int i, top = 32;
- if (cfg->flags & MONO_CFG_HAS_ALLOCA)
- top = 31;
- for (i = 13; i < top; ++i)
- regs = g_list_prepend (regs, GUINT_TO_POINTER (i));
-
- return regs;
+ mono_sparc_flushw ();
}
-#define flushi(addr) __asm__ __volatile__ ("flush %0"::"r"(addr):"memory")
-
-void
-mono_arch_flush_icache (guint8 *code, gint size)
+gboolean
+mono_arch_is_inst_imm (gint64 imm)
{
- guint i;
+ return sparc_is_imm13 (imm);
+}
- for (i = 0; i < (size/2); i++)
- flushi(code + (i*8));
+gboolean
+mono_sparc_is_v9 (void) {
+ return sparcv9;
+}
+gboolean
+mono_sparc_is_sparc64 (void) {
+ return v64;
}
-#define NOT_IMPLEMENTED(x) \
- g_error ("FIXME: %s is not yet implemented. (trampoline)", x);
-
-#define PROLOG_INS 8
-#define CALL_INS 2
-#define EPILOG_INS 6
-#define FLOAT_REGS 8
-#define GENERAL_REGS 8
-#ifdef __APPLE__
-#define MINIMAL_STACK_SIZE 10
-#define ALWAYS_ON_STACK(s) s
-#define FP_ALSO_IN_REG(s) s
-#define RET_ADDR_OFFSET 8
-#define STACK_PARAM_OFFSET 24
-#else
-#define MINIMAL_STACK_SIZE 5
-#define ALWAYS_ON_STACK(s)
-#define FP_ALSO_IN_REG(s) s
-#define ALIGN_DOUBLES
-#define RET_ADDR_OFFSET 4
-#define STACK_PARAM_OFFSET 8
-#endif
+typedef enum {
+ ArgInIReg,
+ ArgInIRegPair,
+ ArgInSplitRegStack,
+ ArgInFReg,
+ ArgInFRegPair,
+ ArgOnStack,
+ ArgOnStackPair,
+ ArgInFloatReg, /* V9 only */
+ ArgInDoubleReg /* V9 only */
+} ArgStorage;
typedef struct {
gint16 offset;
+ /* This needs to be offset by %i0 or %o0 depending on caller/callee */
gint8 reg;
- gint8 regtype; /* 0 general, 1 basereg, 2 floating point register */
+ ArgStorage storage;
+ guint32 vt_offset; /* for valuetypes */
} ArgInfo;
typedef struct {
int nargs;
guint32 stack_usage;
+ guint32 reg_usage;
ArgInfo ret;
+ ArgInfo sig_cookie;
ArgInfo args [1];
} CallInfo;
#define DEBUG(a)
+/* %o0..%o5 */
+#define PARAM_REGS 6
+
static void inline
-add_general (guint *gr, guint *stack_size, ArgInfo *ainfo, gboolean simple)
+add_general (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean pair)
{
- if (simple) {
- if (*gr >= 3 + GENERAL_REGS) {
- ainfo->offset = *stack_size;
- ainfo->reg = sparc_sp; /* in the caller */
- ainfo->regtype = 1;
- *stack_size += 4;
- } else {
- ALWAYS_ON_STACK (*stack_size += 4);
+ ainfo->offset = *stack_size;
+
+ if (!pair) {
+ if (*gr >= PARAM_REGS) {
+ ainfo->storage = ArgOnStack;
+ }
+ else {
+ ainfo->storage = ArgInIReg;
ainfo->reg = *gr;
+ (*gr) ++;
}
- } else {
- if (*gr >= 3 + GENERAL_REGS - 1) {
- ainfo->offset = *stack_size;
- ainfo->reg = sparc_sp; /* in the caller */
- ainfo->regtype = 1;
- *stack_size += 8;
-#ifdef ALIGN_DOUBLES
- *stack_size += (*stack_size % 8);
-#endif
- } else {
- ALWAYS_ON_STACK (*stack_size += 8);
+
+ /* Allways reserve stack space for parameters passed in registers */
+ (*stack_size) += sizeof (gpointer);
+ }
+ else {
+ if (*gr < PARAM_REGS - 1) {
+ /* A pair of registers */
+ ainfo->storage = ArgInIRegPair;
ainfo->reg = *gr;
+ (*gr) += 2;
+ }
+ else if (*gr >= PARAM_REGS) {
+ /* A pair of stack locations */
+ ainfo->storage = ArgOnStackPair;
}
-#ifdef ALIGN_DOUBLES
- if ((*gr) & 1)
+ else {
+ ainfo->storage = ArgInSplitRegStack;
+ ainfo->reg = *gr;
(*gr) ++;
-#endif
- (*gr) ++;
+ }
+
+ (*stack_size) += 2 * sizeof (gpointer);
+ }
+}
+
+#ifdef SPARCV9
+
+#define FLOAT_PARAM_REGS 32
+
+static void inline
+add_float (guint32 *gr, guint32 *stack_size, ArgInfo *ainfo, gboolean single)
+{
+ ainfo->offset = *stack_size;
+
+ if (single) {
+ if (*gr >= FLOAT_PARAM_REGS) {
+ ainfo->storage = ArgOnStack;
+ }
+ else {
+ /* A single is passed in an even numbered fp register */
+ ainfo->storage = ArgInFloatReg;
+ ainfo->reg = *gr + 1;
+ (*gr) += 2;
+ }
+ }
+ else {
+ if (*gr < FLOAT_PARAM_REGS) {
+ /* A double register */
+ ainfo->storage = ArgInDoubleReg;
+ ainfo->reg = *gr;
+ (*gr) += 2;
+ }
+ else {
+ ainfo->storage = ArgOnStack;
+ }
}
- (*gr) ++;
+
+ (*stack_size) += sizeof (gpointer);
}
+#endif
+
+/*
+ * get_call_info:
+ *
+ * Obtain information about a call according to the calling convention.
+ * For V8, see the "System V ABI, Sparc Processor Supplement" Sparc V8 version
+ * document for more information.
+ * For V9, see the "Low Level System Information (64-bit psABI)" chapter in
+ * the 'Sparc Compliance Definition 2.4' document.
+ */
static CallInfo*
-calculate_sizes (MonoMethodSignature *sig, gboolean is_pinvoke)
+get_call_info (MonoMethodSignature *sig, gboolean is_pinvoke)
{
- guint i, fr, gr;
+ guint32 i, gr, fr;
int n = sig->hasthis + sig->param_count;
- guint32 simpletype;
guint32 stack_size = 0;
- CallInfo *cinfo = g_malloc0 (sizeof (CallInfo) + sizeof (ArgInfo) * n);
+ CallInfo *cinfo;
+
+ cinfo = g_malloc0 (sizeof (CallInfo) + (sizeof (ArgInfo) * n));
+
+ gr = 0;
+ fr = 0;
+
+#ifdef SPARCV9
+ if (MONO_TYPE_ISSTRUCT ((sig->ret))) {
+ /* The address of the return value is passed in %o0 */
+ add_general (&gr, &stack_size, &cinfo->ret, FALSE);
+ cinfo->ret.reg += sparc_i0;
+ }
+#endif
- fr = 1;
- gr = 3;
+ /* this */
+ if (sig->hasthis)
+ add_general (&gr, &stack_size, cinfo->args + 0, FALSE);
- /* FIXME: handle returning a struct */
+ if ((sig->call_convention == MONO_CALL_VARARG) && (n == 0)) {
+ gr = PARAM_REGS;
- n = 0;
- if (sig->hasthis) {
- add_general (&gr, &stack_size, cinfo->args + n, TRUE);
- n++;
+ /* Emit the signature cookie just before the implicit arguments */
+ add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
}
- DEBUG(printf("params: %d\n", sig->param_count));
+
for (i = 0; i < sig->param_count; ++i) {
- DEBUG(printf("param %d: ", i));
+ ArgInfo *ainfo = &cinfo->args [sig->hasthis + i];
+
+ if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
+ gr = PARAM_REGS;
+
+ /* Emit the signature cookie just before the implicit arguments */
+ add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
+ }
+
+ DEBUG(printf("param %d: ", i));
if (sig->params [i]->byref) {
- DEBUG(printf("byref\n"));
- add_general (&gr, &stack_size, cinfo->args + n, TRUE);
- n++;
+ DEBUG(printf("byref\n"));
+
+ add_general (&gr, &stack_size, ainfo, FALSE);
continue;
}
- simpletype = sig->params [i]->type;
- enum_calc_size:
- switch (simpletype) {
+ switch (mono_type_get_underlying_type (sig->params [i])->type) {
case MONO_TYPE_BOOLEAN:
- case MONO_TYPE_CHAR:
case MONO_TYPE_I1:
case MONO_TYPE_U1:
+ add_general (&gr, &stack_size, ainfo, FALSE);
+ /* the value is in the ls byte */
+ ainfo->offset += sizeof (gpointer) - 1;
+ break;
case MONO_TYPE_I2:
case MONO_TYPE_U2:
+ case MONO_TYPE_CHAR:
+ add_general (&gr, &stack_size, ainfo, FALSE);
+ /* the value is in the ls word */
+ ainfo->offset += sizeof (gpointer) - 2;
+ break;
case MONO_TYPE_I4:
case MONO_TYPE_U4:
+ add_general (&gr, &stack_size, ainfo, FALSE);
+ /* the value is in the ls dword */
+ ainfo->offset += sizeof (gpointer) - 4;
+ break;
case MONO_TYPE_I:
case MONO_TYPE_U:
case MONO_TYPE_PTR:
+ case MONO_TYPE_FNPTR:
case MONO_TYPE_CLASS:
case MONO_TYPE_OBJECT:
case MONO_TYPE_STRING:
case MONO_TYPE_SZARRAY:
case MONO_TYPE_ARRAY:
- add_general (&gr, &stack_size, cinfo->args + n, TRUE);
- n++;
- break;
- case MONO_TYPE_VALUETYPE: {
- gint size;
- if (sig->params [i]->data.klass->enumtype) {
- simpletype = sig->params [i]->data.klass->enum_basetype->type;
- goto enum_calc_size;
- }
-#if 0
- size = mono_class_value_size (sig->params [i]->data.klass, NULL);
- if (size != 4) {
- DEBUG(printf ("copy %d bytes struct on stack\n",
- mono_class_value_size (sig->params [i]->data.klass, NULL)));
- *stack_size += (size + 3) & (~3);
- if (gr > 3 + GENERAL_REGS) {
- *stack_size += 4;
- }
- } else {
- DEBUG(printf ("load %d bytes struct\n",
- mono_class_value_size (sig->params [i]->data.klass, NULL)));
- add_general (&gr, stack_size, code_size, TRUE);
- }
+ add_general (&gr, &stack_size, ainfo, FALSE);
+ break;
+ case MONO_TYPE_VALUETYPE:
+#ifdef SPARCV9
+ if (sig->pinvoke)
+ NOT_IMPLEMENTED;
#endif
- g_assert_not_reached ();
+ add_general (&gr, &stack_size, ainfo, FALSE);
+ break;
+ case MONO_TYPE_TYPEDBYREF:
+ add_general (&gr, &stack_size, ainfo, FALSE);
break;
- }
case MONO_TYPE_U8:
case MONO_TYPE_I8:
- add_general (&gr, &stack_size, cinfo->args + n, FALSE);
- n++;
+#ifdef SPARCV9
+ add_general (&gr, &stack_size, ainfo, FALSE);
+#else
+ add_general (&gr, &stack_size, ainfo, TRUE);
+#endif
break;
case MONO_TYPE_R4:
- if (fr < 7) {
- fr ++;
- FP_ALSO_IN_REG (gr ++);
- ALWAYS_ON_STACK (stack_size += 4);
- } else {
- NOT_IMPLEMENTED ("R4 arg");
- }
- n++;
+#ifdef SPARCV9
+ add_float (&fr, &stack_size, ainfo, TRUE);
+ gr ++;
+#else
+ /* single precision values are passed in integer registers */
+ add_general (&gr, &stack_size, ainfo, FALSE);
+#endif
break;
case MONO_TYPE_R8:
- if (fr < 7) {
- fr ++;
- FP_ALSO_IN_REG (gr += 2);
- ALWAYS_ON_STACK (stack_size += 8);
- } else {
- NOT_IMPLEMENTED ("R8 arg");
- }
- n++;
+#ifdef SPARCV9
+ add_float (&fr, &stack_size, ainfo, FALSE);
+ gr ++;
+#else
+ /* double precision values are passed in a pair of registers */
+ add_general (&gr, &stack_size, ainfo, TRUE);
+#endif
break;
default:
- g_error ("Can't trampoline 0x%x", sig->params [i]->type);
+ g_assert_not_reached ();
}
}
+ if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
+ gr = PARAM_REGS;
+
+ /* Emit the signature cookie just before the implicit arguments */
+ add_general (&gr, &stack_size, &cinfo->sig_cookie, FALSE);
+ }
+
+ /* return value */
{
- simpletype = sig->ret->type;
-enum_retvalue:
- switch (simpletype) {
+ switch (mono_type_get_underlying_type (sig->ret)->type) {
case MONO_TYPE_BOOLEAN:
case MONO_TYPE_I1:
case MONO_TYPE_U1:
case MONO_TYPE_U4:
case MONO_TYPE_I:
case MONO_TYPE_U:
+ case MONO_TYPE_PTR:
+ case MONO_TYPE_FNPTR:
case MONO_TYPE_CLASS:
case MONO_TYPE_OBJECT:
case MONO_TYPE_SZARRAY:
case MONO_TYPE_ARRAY:
case MONO_TYPE_STRING:
+ cinfo->ret.storage = ArgInIReg;
cinfo->ret.reg = sparc_i0;
+ if (gr < 1)
+ gr = 1;
break;
case MONO_TYPE_U8:
case MONO_TYPE_I8:
+#ifdef SPARCV9
+ cinfo->ret.storage = ArgInIReg;
cinfo->ret.reg = sparc_i0;
+ if (gr < 1)
+ gr = 1;
+#else
+ cinfo->ret.storage = ArgInIRegPair;
+ cinfo->ret.reg = sparc_i0;
+ if (gr < 2)
+ gr = 2;
+#endif
break;
case MONO_TYPE_R4:
case MONO_TYPE_R8:
+ cinfo->ret.storage = ArgInFReg;
cinfo->ret.reg = sparc_f0;
- cinfo->ret.regtype = 2;
break;
case MONO_TYPE_VALUETYPE:
- if (sig->ret->data.klass->enumtype) {
- simpletype = sig->ret->data.klass->enum_basetype->type;
- goto enum_retvalue;
+ if (v64) {
+ if (sig->pinvoke)
+ NOT_IMPLEMENTED;
+ else
+ /* Already done */
+ ;
+ }
+ else
+ cinfo->ret.storage = ArgOnStack;
+ break;
+ case MONO_TYPE_TYPEDBYREF:
+ if (v64) {
+ if (sig->pinvoke)
+ /* Same as a valuetype with size 24 */
+ NOT_IMPLEMENTED;
+ else
+ /* Already done */
+ ;
}
+ else
+ cinfo->ret.storage = ArgOnStack;
break;
case MONO_TYPE_VOID:
break;
}
}
- /* align stack size to 16 */
- DEBUG (printf (" stack size: %d (%d)\n", (stack_size + 15) & ~15, stack_size));
- stack_size = (stack_size + 15) & ~15;
-
cinfo->stack_usage = stack_size;
+ cinfo->reg_usage = gr;
return cinfo;
}
+static gboolean
+is_regsize_var (MonoType *t) {
+ if (t->byref)
+ return TRUE;
+ switch (mono_type_get_underlying_type (t)->type) {
+ case MONO_TYPE_BOOLEAN:
+ case MONO_TYPE_CHAR:
+ case MONO_TYPE_I1:
+ case MONO_TYPE_U1:
+ case MONO_TYPE_I2:
+ case MONO_TYPE_U2:
+ case MONO_TYPE_I4:
+ case MONO_TYPE_U4:
+ case MONO_TYPE_I:
+ case MONO_TYPE_U:
+ return TRUE;
+ case MONO_TYPE_OBJECT:
+ case MONO_TYPE_STRING:
+ case MONO_TYPE_CLASS:
+ case MONO_TYPE_SZARRAY:
+ case MONO_TYPE_ARRAY:
+ return TRUE;
+ case MONO_TYPE_VALUETYPE:
+ return FALSE;
+#ifdef SPARCV9
+ case MONO_TYPE_I8:
+ case MONO_TYPE_U8:
+ return TRUE;
+#endif
+ }
+ return FALSE;
+}
+
+GList *
+mono_arch_get_allocatable_int_vars (MonoCompile *cfg)
+{
+ GList *vars = NULL;
+ int i;
+
+ /*
+ * FIXME: If an argument is allocated to a register, then load it from the
+ * stack in the prolog.
+ */
+
+ for (i = 0; i < cfg->num_varinfo; i++) {
+ MonoInst *ins = cfg->varinfo [i];
+ MonoMethodVar *vmv = MONO_VARINFO (cfg, i);
+
+ /* unused vars */
+ if (vmv->range.first_use.abs_pos >= vmv->range.last_use.abs_pos)
+ continue;
+
+ /* FIXME: Make arguments on stack allocateable to registers */
+ if (ins->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT) || (ins->opcode == OP_REGVAR) || (ins->opcode == OP_ARG))
+ continue;
+
+ if (is_regsize_var (ins->inst_vtype)) {
+ g_assert (MONO_VARINFO (cfg, i)->reg == -1);
+ g_assert (i == vmv->idx);
+
+ vars = mono_varlist_insert_sorted (cfg, vars, vmv, FALSE);
+ }
+ }
+
+ return vars;
+}
+
+GList *
+mono_arch_get_global_int_regs (MonoCompile *cfg)
+{
+ GList *regs = NULL;
+ int i;
+ MonoMethodSignature *sig;
+ CallInfo *cinfo;
+
+ sig = mono_method_signature (cfg->method);
+
+ cinfo = get_call_info (sig, FALSE);
+
+ /* Use unused input registers */
+ for (i = cinfo->reg_usage; i < 6; ++i)
+ regs = g_list_prepend (regs, GUINT_TO_POINTER (sparc_i0 + i));
+
+ /* Use %l0..%l6 as global registers */
+ for (i = sparc_l0; i < sparc_l7; ++i)
+ regs = g_list_prepend (regs, GUINT_TO_POINTER (i));
+
+ g_free (cinfo);
+
+ return regs;
+}
+
+/*
+ * mono_arch_regalloc_cost:
+ *
+ * Return the cost, in number of memory references, of the action of
+ * allocating the variable VMV into a register during global register
+ * allocation.
+ */
+guint32
+mono_arch_regalloc_cost (MonoCompile *cfg, MonoMethodVar *vmv)
+{
+ return 0;
+}
/*
* Set var information according to the calling convention. sparc version.
MonoMethodHeader *header;
MonoInst *inst;
int i, offset, size, align, curinst;
- int frame_reg = sparc_sp;
-
- if (m->flags & MONO_CFG_HAS_ALLOCA)
- frame_reg = sparc_l7;
- m->frame_reg = frame_reg;
+ CallInfo *cinfo;
- header = ((MonoMethodNormal *)m->method)->header;
+ header = mono_method_get_header (m->method);
- sig = m->method->signature;
-
- offset = 0;
- curinst = 0;
- if (MONO_TYPE_ISSTRUCT (sig->ret)) {
- m->ret->opcode = OP_REGVAR;
- m->ret->inst_c0 = sparc_i0;
- } else {
- /* FIXME: handle long and FP values */
- switch (sig->ret->type) {
- case MONO_TYPE_VOID:
- break;
- default:
+ sig = mono_method_signature (m->method);
+
+ cinfo = get_call_info (sig, FALSE);
+
+ if (sig->ret->type != MONO_TYPE_VOID) {
+ switch (cinfo->ret.storage) {
+ case ArgInIReg:
+ case ArgInFReg:
+ case ArgInIRegPair:
m->ret->opcode = OP_REGVAR;
- m->ret->inst_c0 = sparc_i0;
+ m->ret->inst_c0 = cinfo->ret.reg;
+ break;
+ case ArgOnStack:
+#ifdef SPARCV9
+ g_assert_not_reached ();
+#else
+ /* valuetypes */
+ m->ret->opcode = OP_REGOFFSET;
+ m->ret->inst_basereg = sparc_fp;
+ m->ret->inst_offset = 64;
+#endif
break;
+ default:
+ NOT_IMPLEMENTED;
}
+ m->ret->dreg = m->ret->inst_c0;
}
- /* local vars are at a positive offset from the stack pointer */
- /*
- * also note that if the function uses alloca, we use sparc_l7
- * to point at the local variables.
- */
- offset = 24; /* linkage area */
- /* align the offset to 16 bytes: not sure this is needed here */
- //offset += 16 - 1;
- //offset &= ~(16 - 1);
- /* add parameter area size for called functions */
- offset += m->param_area;
- offset += 16 - 1;
- offset &= ~(16 - 1);
+ /*
+ * We use the ABI calling conventions for managed code as well.
+ * Exception: valuetypes are never returned in registers on V9.
+ * FIXME: Use something more optimized.
+ */
- /* FIXME: check how to handle this stuff... reserve space to save LMF and caller saved registers */
- offset += sizeof (MonoLMF);
+ /* Locals are allocated backwards from %fp */
+ m->frame_reg = sparc_fp;
+ offset = 0;
-#if 0
- /* this stuff should not be needed on ppc and the new jit,
- * because a call on ppc to the handlers doesn't change the
- * stack pointer and the jist doesn't manipulate the stack pointer
- * for operations involving valuetypes.
+ /*
+ * Reserve a stack slot for holding information used during exception
+ * handling.
*/
- /* reserve space to store the esp */
- offset += sizeof (gpointer);
+ if (header->num_clauses)
+ offset += sizeof (gpointer) * 2;
- /* this is a global constant */
- mono_exc_esp_offset = offset;
-#endif
+ if (m->method->save_lmf) {
+ offset += sizeof (MonoLMF);
+ m->arch.lmf_offset = offset;
+ }
curinst = m->locals_start;
for (i = curinst; i < m->num_varinfo; ++i) {
inst = m->varinfo [i];
- if (inst->opcode == OP_REGVAR)
+
+ if (inst->opcode == OP_REGVAR) {
+ //g_print ("allocating local %d to %s\n", i, mono_arch_regname (inst->dreg));
+ continue;
+ }
+
+ if (inst->flags & MONO_INST_IS_DEAD)
continue;
/* inst->unused indicates native sized value types, this is used by the
* pinvoke wrappers when they call functions returning structure */
- if (inst->unused && MONO_TYPE_ISSTRUCT (inst->inst_vtype))
+ if (inst->unused && MONO_TYPE_ISSTRUCT (inst->inst_vtype) && inst->inst_vtype->type != MONO_TYPE_TYPEDBYREF)
size = mono_class_native_size (inst->inst_vtype->data.klass, &align);
else
- size = mono_type_size (inst->inst_vtype, &align);
+ size = mono_type_stack_size (inst->inst_vtype, &align);
+
+ /*
+ * This is needed since structures containing doubles must be doubleword
+ * aligned.
+ * FIXME: Do this only if needed.
+ */
+ if (MONO_TYPE_ISSTRUCT (inst->inst_vtype))
+ align = 8;
+
+ /*
+ * variables are accessed as negative offsets from %fp, so increase
+ * the offset before assigning it to a variable
+ */
+ offset += size;
offset += align - 1;
offset &= ~(align - 1);
- inst->inst_offset = offset;
inst->opcode = OP_REGOFFSET;
- inst->inst_basereg = frame_reg;
- offset += size;
- //g_print ("allocating local %d to %d\n", i, inst->inst_offset);
+ inst->inst_basereg = sparc_fp;
+ inst->inst_offset = STACK_BIAS + -offset;
+
+ //g_print ("allocating local %d to [%s - %d]\n", i, mono_arch_regname (inst->inst_basereg), - inst->inst_offset);
}
- curinst = 0;
- if (sig->hasthis) {
- inst = m->varinfo [curinst];
- if (inst->opcode != OP_REGVAR) {
- inst->opcode = OP_REGOFFSET;
- inst->inst_basereg = frame_reg;
- offset += sizeof (gpointer) - 1;
- offset &= ~(sizeof (gpointer) - 1);
- inst->inst_offset = offset;
- offset += sizeof (gpointer);
- }
- curinst++;
+ if (sig->call_convention == MONO_CALL_VARARG) {
+ m->sig_cookie = cinfo->sig_cookie.offset + ARGS_OFFSET;
}
- for (i = 0; i < sig->param_count; ++i) {
- inst = m->varinfo [curinst];
+ for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
+ inst = m->varinfo [i];
if (inst->opcode != OP_REGVAR) {
+ ArgInfo *ainfo = &cinfo->args [i];
+ gboolean inreg = TRUE;
+ MonoType *arg_type;
+ ArgStorage storage;
+
+ if (sig->hasthis && (i == 0))
+ arg_type = &mono_defaults.object_class->byval_arg;
+ else
+ arg_type = sig->params [i - sig->hasthis];
+
+#ifndef SPARCV9
+ if (!arg_type->byref && ((arg_type->type == MONO_TYPE_R4)
+ || (arg_type->type == MONO_TYPE_R8)))
+ /*
+ * Since float arguments are passed in integer registers, we need to
+ * save them to the stack in the prolog.
+ */
+ inreg = FALSE;
+#endif
+
+ /* FIXME: Allocate volatile arguments to registers */
+ if (inst->flags & (MONO_INST_VOLATILE|MONO_INST_INDIRECT))
+ inreg = FALSE;
+
+ if (MONO_TYPE_ISSTRUCT (arg_type))
+ /* FIXME: this isn't needed */
+ inreg = FALSE;
+
inst->opcode = OP_REGOFFSET;
- inst->inst_basereg = frame_reg;
- size = mono_type_size (sig->params [i], &align);
- offset += align - 1;
- offset &= ~(align - 1);
- inst->inst_offset = offset;
- offset += size;
- }
- curinst++;
+
+ if (!inreg)
+ storage = ArgOnStack;
+ else
+ storage = ainfo->storage;
+
+ switch (storage) {
+ case ArgInIReg:
+ case ArgInIRegPair:
+ inst->opcode = OP_REGVAR;
+ inst->dreg = sparc_i0 + ainfo->reg;
+ break;
+ case ArgInFloatReg:
+ case ArgInDoubleReg:
+ /*
+ * Since float regs are volatile, we save the arguments to
+ * the stack in the prolog.
+ * FIXME: Avoid this if the method contains no calls.
+ */
+ case ArgOnStack:
+ case ArgOnStackPair:
+ case ArgInSplitRegStack:
+ /* Split arguments are saved to the stack in the prolog */
+ inst->opcode = OP_REGOFFSET;
+ /* in parent frame */
+ inst->inst_basereg = sparc_fp;
+ inst->inst_offset = ainfo->offset + ARGS_OFFSET;
+
+ if (!arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
+ /*
+ * It is very hard to load doubles from non-doubleword aligned
+ * memory locations. So if the offset is misaligned, we copy the
+ * argument to a stack location in the prolog.
+ */
+ if ((inst->inst_offset - STACK_BIAS) % 8) {
+ inst->inst_basereg = sparc_fp;
+ offset += 8;
+ align = 8;
+ offset += align - 1;
+ offset &= ~(align - 1);
+ inst->inst_offset = STACK_BIAS + -offset;
+
+ }
+ }
+ break;
+ default:
+ NOT_IMPLEMENTED;
+ }
+
+ if (MONO_TYPE_ISSTRUCT (arg_type)) {
+ /* Add a level of indirection */
+ /*
+ * It would be easier to add OP_LDIND_I here, but ldind_i instructions
+ * are destructively modified in a lot of places in inssel.brg.
+ */
+ MonoInst *indir;
+ MONO_INST_NEW (m, indir, 0);
+ *indir = *inst;
+ inst->opcode = OP_SPARC_INARG_VT;
+ inst->inst_left = indir;
+ }
+ }
}
- /* align the offset to 16 bytes */
- offset += 16 - 1;
- offset &= ~(16 - 1);
+ /*
+ * spillvars are stored between the normal locals and the storage reserved
+ * by the ABI.
+ */
- /* change sign? */
m->stack_offset = offset;
+ /* Add a properly aligned dword for use by int<->float conversion opcodes */
+ m->spill_count ++;
+ mono_spillvar_offset_float (m, 0);
+
+ g_free (cinfo);
}
-/* Fixme: we need an alignment solution for enter_method and mono_arch_call_opcode,
- * currently alignment in mono_arch_call_opcode is computed without arch_get_argument_info
- */
+static MonoInst *
+make_group (MonoCompile *cfg, MonoInst *left, int basereg, int offset)
+{
+ MonoInst *group;
+
+ MONO_INST_NEW (cfg, group, OP_GROUP);
+ group->inst_left = left;
+ group->inst_basereg = basereg;
+ group->inst_imm = offset;
+
+ return group;
+}
/*
* take the arguments and generate the arch-specific
* instructions to properly call the function in call.
* This includes pushing, moving arguments to the right register
* etc.
- * Issue: who does the spilling if needed, and when?
*/
MonoCallInst*
mono_arch_call_opcode (MonoCompile *cfg, MonoBasicBlock* bb, MonoCallInst *call, int is_virtual) {
MonoInst *arg, *in;
MonoMethodSignature *sig;
- int i, n, type;
- MonoType *ptype;
+ int i, n;
CallInfo *cinfo;
ArgInfo *ainfo;
+ guint32 extra_space = 0;
sig = call->signature;
n = sig->param_count + sig->hasthis;
- cinfo = calculate_sizes (sig, sig->pinvoke);
+ cinfo = get_call_info (sig, sig->pinvoke);
for (i = 0; i < n; ++i) {
ainfo = cinfo->args + i;
+
+ if ((sig->call_convention == MONO_CALL_VARARG) && (i == sig->sentinelpos)) {
+ /* Emit the signature cookie just before the first implicit argument */
+ MonoInst *sig_arg;
+ MonoMethodSignature *tmp_sig;
+
+ /*
+ * mono_ArgIterator_Setup assumes the signature cookie is
+ * passed first and all the arguments which were before it are
+ * passed on the stack after the signature. So compensate by
+ * passing a different signature.
+ */
+ tmp_sig = mono_metadata_signature_dup (call->signature);
+ tmp_sig->param_count -= call->signature->sentinelpos;
+ tmp_sig->sentinelpos = 0;
+ memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
+
+ /* FIXME: Add support for signature tokens to AOT */
+ cfg->disable_aot = TRUE;
+ /* We allways pass the signature on the stack for simplicity */
+ MONO_INST_NEW (cfg, arg, OP_SPARC_OUTARG_MEM);
+ arg->inst_right = make_group (cfg, (MonoInst*)call, sparc_sp, ARGS_OFFSET + cinfo->sig_cookie.offset);
+ MONO_INST_NEW (cfg, sig_arg, OP_ICONST);
+ sig_arg->inst_p0 = tmp_sig;
+ arg->inst_left = sig_arg;
+ arg->type = STACK_PTR;
+ /* prepend, so they get reversed */
+ arg->next = call->out_args;
+ call->out_args = arg;
+ }
+
if (is_virtual && i == 0) {
- /* the argument will be attached to the call instrucion */
+ /* the argument will be attached to the call instruction */
in = call->args [i];
} else {
MONO_INST_NEW (cfg, arg, OP_OUTARG);
/* prepend, we'll need to reverse them later */
arg->next = call->out_args;
call->out_args = arg;
- if (ainfo->regtype == 0) {
- arg->unused = ainfo->reg;
+
+ if ((i >= sig->hasthis) && (MONO_TYPE_ISSTRUCT(sig->params [i - sig->hasthis]))) {
+ MonoInst *inst;
+ gint align;
+ guint32 offset, pad;
+ guint32 size;
+
+#ifdef SPARCV9
+ if (sig->pinvoke)
+ NOT_IMPLEMENTED;
+#endif
+
+ if (sig->params [i - sig->hasthis]->type == MONO_TYPE_TYPEDBYREF) {
+ size = sizeof (MonoTypedRef);
+ align = sizeof (gpointer);
+ }
+ else
+ if (sig->pinvoke)
+ size = mono_type_native_stack_size (&in->klass->byval_arg, &align);
+ else
+ size = mono_type_stack_size (&in->klass->byval_arg, &align);
+
+ /*
+ * We use OP_OUTARG_VT to copy the valuetype to a stack location, then
+ * use the normal OUTARG opcodes to pass the address of the location to
+ * the callee.
+ */
+ MONO_INST_NEW (cfg, inst, OP_OUTARG_VT);
+ inst->inst_left = in;
+
+ /* The first 6 argument locations are reserved */
+ if (cinfo->stack_usage < 6 * sizeof (gpointer))
+ cinfo->stack_usage = 6 * sizeof (gpointer);
+
+ offset = ALIGN_TO ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage, align);
+ pad = offset - ((ARGS_OFFSET - STACK_BIAS) + cinfo->stack_usage);
+
+ inst->inst_c1 = STACK_BIAS + offset;
+ inst->unused = size;
+ arg->inst_left = inst;
+
+ cinfo->stack_usage += size;
+ cinfo->stack_usage += pad;
+ }
+
+ arg->inst_right = make_group (cfg, (MonoInst*)call, sparc_sp, ARGS_OFFSET + ainfo->offset);
+
+ switch (ainfo->storage) {
+ case ArgInIReg:
+ case ArgInFReg:
+ case ArgInIRegPair:
+ if (ainfo->storage == ArgInIRegPair)
+ arg->opcode = OP_SPARC_OUTARG_REGPAIR;
+ arg->unused = sparc_o0 + ainfo->reg;
call->used_iregs |= 1 << ainfo->reg;
- } else if (ainfo->regtype == 1) {
- g_assert_not_reached ();
- } else if (ainfo->regtype == 2) {
- arg->opcode = OP_OUTARG_R8;
- arg->unused = ainfo->reg;
- call->used_fregs |= 1 << ainfo->reg;
- } else {
- g_assert_not_reached ();
+
+ if ((i >= sig->hasthis) && !sig->params [i - sig->hasthis]->byref && ((sig->params [i - sig->hasthis]->type == MONO_TYPE_R8) || (sig->params [i - sig->hasthis]->type == MONO_TYPE_R4))) {
+ /* An fp value is passed in an ireg */
+
+ if (arg->opcode == OP_SPARC_OUTARG_REGPAIR)
+ arg->opcode = OP_SPARC_OUTARG_REGPAIR_FLOAT;
+ else
+ arg->opcode = OP_SPARC_OUTARG_FLOAT;
+
+ /*
+ * The OUTARG (freg) implementation needs an extra dword to store
+ * the temporary value.
+ */
+ extra_space += 8;
+ }
+ break;
+ case ArgOnStack:
+ arg->opcode = OP_SPARC_OUTARG_MEM;
+ break;
+ case ArgOnStackPair:
+ arg->opcode = OP_SPARC_OUTARG_MEMPAIR;
+ break;
+ case ArgInSplitRegStack:
+ arg->opcode = OP_SPARC_OUTARG_SPLIT_REG_STACK;
+ arg->unused = sparc_o0 + ainfo->reg;
+ call->used_iregs |= 1 << ainfo->reg;
+ break;
+ case ArgInFloatReg:
+ arg->opcode = OP_SPARC_OUTARG_FLOAT_REG;
+ arg->unused = sparc_f0 + ainfo->reg;
+ break;
+ case ArgInDoubleReg:
+ arg->opcode = OP_SPARC_OUTARG_DOUBLE_REG;
+ arg->unused = sparc_f0 + ainfo->reg;
+ break;
+ default:
+ NOT_IMPLEMENTED;
}
}
}
+
/*
* Reverse the call->out_args list.
*/
prev = list;
list = next;
}
+ call->out_args = prev;
}
- call->stack_usage = cinfo->stack_usage;
- cfg->param_area = MAX (cfg->param_area, cinfo->stack_usage);
+ call->stack_usage = cinfo->stack_usage + extra_space;
+ call->out_ireg_args = NULL;
+ call->out_freg_args = NULL;
+ cfg->param_area = MAX (cfg->param_area, call->stack_usage);
cfg->flags |= MONO_CFG_HAS_CALLS;
- /*
- * should set more info in call, such as the stack space
- * used by the args that needs to be added back to esp
- */
g_free (cinfo);
return call;
}
-/*
- * Allow tracing to work with this interface (with an optional argument)
- */
-
-/*
- * This may be needed on some archs or for debugging support.
- */
-void
-mono_arch_instrument_mem_needs (MonoMethod *method, int *stack, int *code)
-{
- /* no stack room needed now (may be needed for FASTCALL-trace support) */
- *stack = 0;
- /* split prolog-epilog requirements? */
- *code = 50; /* max bytes needed: check this number */
-}
-
-void*
-mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
-{
- guchar *code = p;
-#if 0
- /* if some args are passed in registers, we need to save them here */
- x86_push_reg (code, X86_EBP);
- x86_push_imm (code, cfg->method);
- mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
- x86_call_code (code, 0);
- x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
-#endif
- return code;
-}
-
-enum {
- SAVE_NONE,
- SAVE_STRUCT,
- SAVE_ONE,
- SAVE_TWO,
- SAVE_FP
-};
-
-void*
-mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
+/* Map opcode to the sparc condition codes */
+static inline SparcCond
+opcode_to_sparc_cond (int opcode)
{
- guchar *code = p;
- int arg_size = 0, save_mode = SAVE_NONE;
- MonoMethod *method = cfg->method;
- int rtype = method->signature->ret->type;
-
-handle_enum:
- switch (rtype) {
- case MONO_TYPE_VOID:
- /* special case string .ctor icall */
- if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
- save_mode = SAVE_ONE;
- else
- save_mode = SAVE_NONE;
- break;
- case MONO_TYPE_I8:
- case MONO_TYPE_U8:
- save_mode = SAVE_TWO;
- break;
- case MONO_TYPE_R4:
- case MONO_TYPE_R8:
- save_mode = SAVE_FP;
- break;
- case MONO_TYPE_VALUETYPE:
- if (method->signature->ret->data.klass->enumtype) {
- rtype = method->signature->ret->data.klass->enum_basetype->type;
- goto handle_enum;
- }
- save_mode = SAVE_STRUCT;
- break;
- default:
- save_mode = SAVE_ONE;
- break;
- }
-
- switch (save_mode) {
- case SAVE_TWO:
- //x86_push_reg (code, X86_EDX);
- //x86_push_reg (code, X86_EAX);
- if (enable_arguments) {
- //x86_push_reg (code, X86_EDX);
- //x86_push_reg (code, X86_EAX);
- arg_size = 8;
- }
- break;
- case SAVE_ONE:
- //x86_push_reg (code, X86_EAX);
- if (enable_arguments) {
- //x86_push_reg (code, X86_EAX);
- arg_size = 4;
- }
- break;
- case SAVE_FP:
- //x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
- ///x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
- if (enable_arguments) {
- //x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
- //x86_fst_membase (code, X86_ESP, 0, TRUE, TRUE);
- arg_size = 8;
- }
- break;
- case SAVE_STRUCT:
- if (enable_arguments) {
- //x86_push_membase (code, X86_EBP, 8);
- arg_size = 4;
- }
- break;
- case SAVE_NONE:
- default:
- break;
- }
-
- /*x86_push_imm (code, method);
- mono_add_patch_info (cfg, code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
- x86_call_code (code, 0);
- x86_alu_reg_imm (code, X86_ADD, X86_ESP, arg_size + 4);
- */
-
- switch (save_mode) {
- case SAVE_TWO:
- //x86_pop_reg (code, X86_EAX);
- //x86_pop_reg (code, X86_EDX);
- break;
- case SAVE_ONE:
- //x86_pop_reg (code, X86_EAX);
- break;
- case SAVE_FP:
- //x86_fld_membase (code, X86_ESP, 0, TRUE);
- //x86_alu_reg_imm (code, X86_ADD, X86_ESP, 8);
- break;
- case SAVE_NONE:
+ switch (opcode) {
+ case OP_FBGE:
+ return sparc_fbge;
+ case OP_FBLE:
+ return sparc_fble;
+ case OP_FBEQ:
+ case OP_FCEQ:
+ return sparc_fbe;
+ case OP_FBLT:
+ case OP_FCLT:
+ case OP_FCLT_UN:
+ return sparc_fbl;
+ case OP_FBGT:
+ case OP_FCGT:
+ case OP_FCGT_UN:
+ return sparc_fbg;
+ case CEE_BEQ:
+ case OP_IBEQ:
+ case OP_CEQ:
+ case OP_ICEQ:
+ case OP_COND_EXC_EQ:
+ return sparc_be;
+ case CEE_BNE_UN:
+ case OP_COND_EXC_NE_UN:
+ case OP_IBNE_UN:
+ return sparc_bne;
+ case CEE_BLT:
+ case OP_IBLT:
+ case OP_CLT:
+ case OP_ICLT:
+ case OP_COND_EXC_LT:
+ return sparc_bl;
+ case CEE_BLT_UN:
+ case OP_IBLT_UN:
+ case OP_CLT_UN:
+ case OP_ICLT_UN:
+ case OP_COND_EXC_LT_UN:
+ return sparc_blu;
+ case CEE_BGT:
+ case OP_IBGT:
+ case OP_CGT:
+ case OP_ICGT:
+ case OP_COND_EXC_GT:
+ return sparc_bg;
+ case CEE_BGT_UN:
+ case OP_IBGT_UN:
+ case OP_CGT_UN:
+ case OP_ICGT_UN:
+ case OP_COND_EXC_GT_UN:
+ return sparc_bgu;
+ case CEE_BGE:
+ case OP_IBGE:
+ case OP_COND_EXC_GE:
+ return sparc_bge;
+ case CEE_BGE_UN:
+ case OP_IBGE_UN:
+ case OP_COND_EXC_GE_UN:
+ return sparc_beu;
+ case CEE_BLE:
+ case OP_IBLE:
+ case OP_COND_EXC_LE:
+ return sparc_ble;
+ case CEE_BLE_UN:
+ case OP_IBLE_UN:
+ case OP_COND_EXC_LE_UN:
+ return sparc_bleu;
+ case OP_COND_EXC_OV:
+ case OP_COND_EXC_IOV:
+ return sparc_bvs;
+ case OP_COND_EXC_C:
+ case OP_COND_EXC_IC:
+ return sparc_bcs;
+ case OP_COND_EXC_NO:
+ case OP_COND_EXC_NC:
+ NOT_IMPLEMENTED;
default:
- break;
+ g_assert_not_reached ();
+ return sparc_be;
}
-
- return code;
}
-#define EMIT_COND_BRANCH(ins,cond) \
+#define COMPUTE_DISP(ins) \
if (ins->flags & MONO_INST_BRLABEL) { \
- if (ins->inst_i0->inst_c0) { \
- } else { \
- mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
+ if (ins->inst_i0->inst_c0) \
+ disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2; \
+ else { \
+ disp = 0; \
+ mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_LABEL, ins->inst_i0); \
} \
} else { \
- if (0 && ins->inst_true_bb->native_offset) { \
- } else { \
- mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
+ if (ins->inst_true_bb->native_offset) \
+ disp = (ins->inst_true_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2; \
+ else { \
+ disp = 0; \
+ mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
} \
}
+#ifdef SPARCV9
+#define DEFAULT_ICC sparc_xcc_short
+#else
+#define DEFAULT_ICC sparc_icc_short
+#endif
+
+#ifdef SPARCV9
+#define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) \
+ do { \
+ gint32 disp; \
+ guint32 predict; \
+ COMPUTE_DISP(ins); \
+ predict = (disp != 0) ? 1 : 0; \
+ g_assert (sparc_is_imm19 (disp)); \
+ sparc_branchp (code, (annul), cond, icc, (predict), disp); \
+ if (filldelay) sparc_nop (code); \
+ } while (0)
+#define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_ICC ((ins), (cond), (annul), (filldelay), (sparc_xcc_short))
+#define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) \
+ do { \
+ gint32 disp; \
+ guint32 predict; \
+ COMPUTE_DISP(ins); \
+ predict = (disp != 0) ? 1 : 0; \
+ g_assert (sparc_is_imm19 (disp)); \
+ sparc_fbranch (code, (annul), cond, disp); \
+ if (filldelay) sparc_nop (code); \
+ } while (0)
+#else
+#define EMIT_COND_BRANCH_ICC(ins,cond,annul,filldelay,icc) g_assert_not_reached ()
+#define EMIT_COND_BRANCH_GENERAL(ins,bop,cond,annul,filldelay) \
+ do { \
+ gint32 disp; \
+ COMPUTE_DISP(ins); \
+ g_assert (sparc_is_imm22 (disp)); \
+ sparc_ ## bop (code, (annul), cond, disp); \
+ if (filldelay) sparc_nop (code); \
+ } while (0)
+#define EMIT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),branch,(cond),annul,filldelay)
+#define EMIT_FLOAT_COND_BRANCH(ins,cond,annul,filldelay) EMIT_COND_BRANCH_GENERAL((ins),fbranch,(cond),annul,filldelay)
+#endif
+
+#define EMIT_COND_BRANCH_PREDICTED(ins,cond,annul,filldelay) \
+ do { \
+ gint32 disp; \
+ guint32 predict; \
+ COMPUTE_DISP(ins); \
+ predict = (disp != 0) ? 1 : 0; \
+ g_assert (sparc_is_imm19 (disp)); \
+ sparc_branchp (code, (annul), (cond), DEFAULT_ICC, (predict), disp); \
+ if (filldelay) sparc_nop (code); \
+ } while (0)
+
+#define EMIT_COND_BRANCH_BPR(ins,bop,predict,annul,filldelay) \
+ do { \
+ gint32 disp; \
+ COMPUTE_DISP(ins); \
+ g_assert (sparc_is_imm22 (disp)); \
+ sparc_ ## bop (code, (annul), (predict), ins->sreg1, disp); \
+ if (filldelay) sparc_nop (code); \
+ } while (0)
+
/* emit an exception if condition is fail */
-#define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name) \
- do { \
- mono_add_patch_info (cfg, code - cfg->native_code, \
- MONO_PATCH_INFO_EXC, exc_name); \
- x86_branch32 (code, cond, 0, signed); \
+/*
+ * We put the exception throwing code out-of-line, at the end of the method
+ */
+#define EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,filldelay,icc) do { \
+ mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code, \
+ MONO_PATCH_INFO_EXC, sexc_name); \
+ if (sparcv9) { \
+ sparc_branchp (code, 0, (cond), (icc), 0, 0); \
+ } \
+ else { \
+ sparc_branch (code, 0, cond, 0); \
+ } \
+ if (filldelay) sparc_nop (code); \
} while (0);
-#define EMIT_FPCOMPARE(code) do { \
- x86_fcompp (code); \
- x86_fnstsw (code); \
- x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4500); \
-} while (0);
+#define EMIT_COND_SYSTEM_EXCEPTION(ins,cond,sexc_name) EMIT_COND_SYSTEM_EXCEPTION_GENERAL(ins,cond,sexc_name,TRUE,DEFAULT_ICC)
+
+#define EMIT_COND_SYSTEM_EXCEPTION_BPR(ins,bop,sexc_name) do { \
+ mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code, \
+ MONO_PATCH_INFO_EXC, sexc_name); \
+ sparc_ ## bop (code, FALSE, FALSE, ins->sreg1, 0); \
+ sparc_nop (code); \
+} while (0);
+
+#define EMIT_ALU_IMM(ins,op,setcc) do { \
+ if (sparc_is_imm13 ((ins)->inst_imm)) \
+ sparc_ ## op ## _imm (code, (setcc), (ins)->sreg1, ins->inst_imm, (ins)->dreg); \
+ else { \
+ sparc_set (code, ins->inst_imm, sparc_o7); \
+ sparc_ ## op (code, (setcc), (ins)->sreg1, sparc_o7, (ins)->dreg); \
+ } \
+} while (0);
+
+#define EMIT_LOAD_MEMBASE(ins,op) do { \
+ if (sparc_is_imm13 (ins->inst_offset)) \
+ sparc_ ## op ## _imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg); \
+ else { \
+ sparc_set (code, ins->inst_offset, sparc_o7); \
+ sparc_ ## op (code, ins->inst_basereg, sparc_o7, ins->dreg); \
+ } \
+} while (0);
+
+/* max len = 5 */
+#define EMIT_STORE_MEMBASE_IMM(ins,op) do { \
+ guint32 sreg; \
+ if (ins->inst_imm == 0) \
+ sreg = sparc_g0; \
+ else { \
+ sparc_set (code, ins->inst_imm, sparc_o7); \
+ sreg = sparc_o7; \
+ } \
+ if (!sparc_is_imm13 (ins->inst_offset)) { \
+ sparc_set (code, ins->inst_offset, GP_SCRATCH_REG); \
+ sparc_ ## op (code, sreg, ins->inst_destbasereg, GP_SCRATCH_REG); \
+ } \
+ else \
+ sparc_ ## op ## _imm (code, sreg, ins->inst_destbasereg, ins->inst_offset); \
+ } while (0);
+
+#define EMIT_STORE_MEMBASE_REG(ins,op) do { \
+ if (!sparc_is_imm13 (ins->inst_offset)) { \
+ sparc_set (code, ins->inst_offset, sparc_o7); \
+ sparc_ ## op (code, ins->sreg1, ins->inst_destbasereg, sparc_o7); \
+ } \
+ else \
+ sparc_ ## op ## _imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset); \
+ } while (0);
+
+#define EMIT_CALL() do { \
+ if (v64) { \
+ sparc_set_template (code, sparc_o7); \
+ sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7); \
+ } \
+ else { \
+ sparc_call_simple (code, 0); \
+ } \
+ sparc_nop (code); \
+} while (0);
+
+/*
+ * A call template is 7 instructions long, so we want to avoid it if possible.
+ */
+static guint32*
+emit_call (MonoCompile *cfg, guint32 *code, guint32 patch_type, gconstpointer data)
+{
+ gpointer target;
+
+ /* FIXME: This only works if the target method is already compiled */
+ if (0 && v64 && !cfg->compile_aot) {
+ MonoJumpInfo patch_info;
+
+ patch_info.type = patch_type;
+ patch_info.data.target = data;
+
+ target = mono_resolve_patch_target (cfg->method, cfg->domain, NULL, &patch_info, FALSE);
+
+ /* FIXME: Add optimizations if the target is close enough */
+ sparc_set (code, target, sparc_o7);
+ sparc_jmpl (code, sparc_o7, sparc_g0, sparc_o7);
+ sparc_nop (code);
+ }
+ else {
+ mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, patch_type, data);
+ EMIT_CALL ();
+ }
+
+ return code;
+}
static void
peephole_pass (MonoCompile *cfg, MonoBasicBlock *bb)
MonoInst *ins, *last_ins = NULL;
ins = bb->code;
- /* short circuit this for now */
- return;
-
while (ins) {
switch (ins->opcode) {
}
}
break;
+#ifndef SPARCV9
case OP_LOAD_MEMBASE:
case OP_LOADI4_MEMBASE:
/*
#endif
}
break;
+#endif
case OP_LOADU1_MEMBASE:
case OP_LOADI1_MEMBASE:
if (last_ins && (last_ins->opcode == OP_STOREI1_MEMBASE_REG) &&
}
}
break;
+ case OP_STOREI4_MEMBASE_IMM:
+ /* Convert pairs of 0 stores to a dword 0 store */
+ /* Used when initializing temporaries */
+ /* We know sparc_fp is dword aligned */
+ if (last_ins && (last_ins->opcode == OP_STOREI4_MEMBASE_IMM) &&
+ (ins->inst_destbasereg == last_ins->inst_destbasereg) &&
+ (ins->inst_destbasereg == sparc_fp) &&
+ (ins->inst_offset < 0) &&
+ ((ins->inst_offset % 8) == 0) &&
+ ((ins->inst_offset == last_ins->inst_offset - 4)) &&
+ (ins->inst_imm == 0) &&
+ (last_ins->inst_imm == 0)) {
+ if (sparcv9) {
+ last_ins->opcode = OP_STOREI8_MEMBASE_IMM;
+ last_ins->inst_offset = ins->inst_offset;
+ last_ins->next = ins->next;
+ ins = ins->next;
+ continue;
+ }
+ }
+ break;
+ case CEE_BEQ:
+ case CEE_BNE_UN:
+ case CEE_BLT:
+ case CEE_BGT:
+ case CEE_BGE:
+ case CEE_BLE:
+ case OP_COND_EXC_EQ:
+ case OP_COND_EXC_GE:
+ case OP_COND_EXC_GT:
+ case OP_COND_EXC_LE:
+ case OP_COND_EXC_LT:
+ case OP_COND_EXC_NE_UN:
+ /*
+ * Convert compare with zero+branch to BRcc
+ */
+ /*
+ * This only works in 64 bit mode, since it examines all 64
+ * bits of the register.
+ * Only do this if the method is small since BPr only has a 16bit
+ * displacement.
+ */
+ if (v64 && (mono_method_get_header (cfg->method)->code_size < 10000) && last_ins &&
+ (last_ins->opcode == OP_COMPARE_IMM) &&
+ (last_ins->inst_imm == 0)) {
+ MonoInst *next = ins->next;
+ switch (ins->opcode) {
+ case CEE_BEQ:
+ ins->opcode = OP_SPARC_BRZ;
+ break;
+ case CEE_BNE_UN:
+ ins->opcode = OP_SPARC_BRNZ;
+ break;
+ case CEE_BLT:
+ ins->opcode = OP_SPARC_BRLZ;
+ break;
+ case CEE_BGT:
+ ins->opcode = OP_SPARC_BRGZ;
+ break;
+ case CEE_BGE:
+ ins->opcode = OP_SPARC_BRGEZ;
+ break;
+ case CEE_BLE:
+ ins->opcode = OP_SPARC_BRLEZ;
+ break;
+ case OP_COND_EXC_EQ:
+ ins->opcode = OP_SPARC_COND_EXC_EQZ;
+ break;
+ case OP_COND_EXC_GE:
+ ins->opcode = OP_SPARC_COND_EXC_GEZ;
+ break;
+ case OP_COND_EXC_GT:
+ ins->opcode = OP_SPARC_COND_EXC_GTZ;
+ break;
+ case OP_COND_EXC_LE:
+ ins->opcode = OP_SPARC_COND_EXC_LEZ;
+ break;
+ case OP_COND_EXC_LT:
+ ins->opcode = OP_SPARC_COND_EXC_LTZ;
+ break;
+ case OP_COND_EXC_NE_UN:
+ ins->opcode = OP_SPARC_COND_EXC_NEZ;
+ break;
+ default:
+ g_assert_not_reached ();
+ }
+ ins->sreg1 = last_ins->sreg1;
+ *last_ins = *ins;
+ last_ins->next = next;
+ ins = next;
+ continue;
+ }
+ break;
case CEE_CONV_I4:
case CEE_CONV_U4:
case OP_MOVE:
bb->last_ins = last_ins;
}
-#undef DEBUG
-#define DEBUG(a) if (cfg->verbose_level > 1) a
-//#define DEBUG(a)
-#define reg_is_freeable(r) ((r) >= 3 && (r) <= 10)
-
-typedef struct {
- int born_in;
- int killed_in;
- int last_use;
- int prev_use;
-} RegTrack;
-
static const char*const * ins_spec = sparc_desc;
-static void
-print_ins (int i, MonoInst *ins)
+static inline const char*
+get_ins_spec (int opcode)
{
- const char *spec = ins_spec [ins->opcode];
- g_print ("\t%-2d %s", i, mono_inst_name (ins->opcode));
- if (spec [MONO_INST_DEST]) {
- if (ins->dreg >= MONO_MAX_IREGS)
- g_print (" R%d <-", ins->dreg);
- else
- g_print (" %s <-", mono_arch_regname (ins->dreg));
- }
- if (spec [MONO_INST_SRC1]) {
- if (ins->sreg1 >= MONO_MAX_IREGS)
- g_print (" R%d", ins->sreg1);
- else
- g_print (" %s", mono_arch_regname (ins->sreg1));
- }
- if (spec [MONO_INST_SRC2]) {
- if (ins->sreg2 >= MONO_MAX_IREGS)
- g_print (" R%d", ins->sreg2);
- else
- g_print (" %s", mono_arch_regname (ins->sreg2));
- }
- if (spec [MONO_INST_CLOB])
- g_print (" clobbers: %c", spec [MONO_INST_CLOB]);
- g_print ("\n");
+ if (ins_spec [opcode])
+ return ins_spec [opcode];
+ else
+ return ins_spec [CEE_ADD];
}
-static void
-print_regtrack (RegTrack *t, int num)
+static int
+mono_spillvar_offset_float (MonoCompile *cfg, int spillvar)
{
- int i;
- char buf [32];
- const char *r;
+ MonoSpillInfo **si, *info;
+ int i = 0;
+
+ si = &cfg->spill_info_float;
- for (i = 0; i < num; ++i) {
- if (!t [i].born_in)
- continue;
- if (i >= MONO_MAX_IREGS) {
- g_snprintf (buf, sizeof(buf), "R%d", i);
- r = buf;
- } else
- r = mono_arch_regname (i);
- g_print ("liveness: %s [%d - %d]\n", r, t [i].born_in, t[i].last_use);
+ while (i <= spillvar) {
+
+ if (!*si) {
+ *si = info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo));
+ info->next = NULL;
+ cfg->stack_offset += sizeof (double);
+ cfg->stack_offset = ALIGN_TO (cfg->stack_offset, 8);
+ info->offset = - cfg->stack_offset;
+ }
+
+ if (i == spillvar)
+ return MONO_SPARC_STACK_BIAS + (*si)->offset;
+
+ i++;
+ si = &(*si)->next;
}
-}
-typedef struct InstList InstList;
+ g_assert_not_reached ();
+ return 0;
+}
-struct InstList {
- InstList *prev;
- InstList *next;
- MonoInst *data;
-};
+/* FIXME: Strange loads from the stack in basic-float.cs:test_2_rem */
-static inline InstList*
-inst_list_prepend (MonoMemPool *pool, InstList *list, MonoInst *data)
+void
+mono_arch_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
{
- InstList *item = mono_mempool_alloc (pool, sizeof (InstList));
- item->data = data;
- item->prev = NULL;
- item->next = list;
- if (list)
- list->prev = item;
- return item;
+ mono_local_regalloc (cfg, bb);
}
-/*
- * Force the spilling of the variable in the symbolic register 'reg'.
- */
-static int
-get_register_force_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, int reg)
+static void
+sparc_patch (guint32 *code, const gpointer target)
{
- MonoInst *load;
- int i, sel, spill;
-
- sel = cfg->rs->iassign [reg];
- /*i = cfg->rs->isymbolic [sel];
- g_assert (i == reg);*/
- i = reg;
- spill = ++cfg->spill_count;
- cfg->rs->iassign [i] = -spill - 1;
- mono_regstate_free_int (cfg->rs, sel);
- /* we need to create a spill var and insert a load to sel after the current instruction */
- MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
- load->dreg = sel;
- load->inst_basereg = cfg->frame_reg;
- load->inst_offset = mono_spillvar_offset (cfg, spill);
- if (item->prev) {
- while (ins->next != item->prev->data)
- ins = ins->next;
- }
- load->next = ins->next;
- ins->next = load;
- DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%sp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
- i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
- g_assert (i == sel);
+ guint32 *c = code;
+ guint32 ins = *code;
+ guint32 op = ins >> 30;
+ guint32 op2 = (ins >> 22) & 0x7;
+ guint32 rd = (ins >> 25) & 0x1f;
+ guint8* target8 = (guint8*)target;
+ gint64 disp = (target8 - (guint8*)code) >> 2;
+ int reg;
- return sel;
-}
+// g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
-static int
-get_register_spilling (MonoCompile *cfg, InstList *item, MonoInst *ins, guint32 regmask, int reg)
-{
- MonoInst *load;
- int i, sel, spill;
-
- DEBUG (g_print ("start regmask to assign R%d: 0x%08x (R%d <- R%d R%d)\n", reg, regmask, ins->dreg, ins->sreg1, ins->sreg2));
- /* exclude the registers in the current instruction */
- if (reg != ins->sreg1 && (reg_is_freeable (ins->sreg1) || (ins->sreg1 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg1] >= 0))) {
- if (ins->sreg1 >= MONO_MAX_IREGS)
- regmask &= ~ (1 << cfg->rs->iassign [ins->sreg1]);
- else
- regmask &= ~ (1 << ins->sreg1);
- DEBUG (g_print ("excluding sreg1 %s\n", mono_arch_regname (ins->sreg1)));
+ if ((op == 0) && (op2 == 2)) {
+ if (!sparc_is_imm22 (disp))
+ NOT_IMPLEMENTED;
+ /* Bicc */
+ *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
}
- if (reg != ins->sreg2 && (reg_is_freeable (ins->sreg2) || (ins->sreg2 >= MONO_MAX_IREGS && cfg->rs->iassign [ins->sreg2] >= 0))) {
- if (ins->sreg2 >= MONO_MAX_IREGS)
- regmask &= ~ (1 << cfg->rs->iassign [ins->sreg2]);
- else
- regmask &= ~ (1 << ins->sreg2);
- DEBUG (g_print ("excluding sreg2 %s %d\n", mono_arch_regname (ins->sreg2), ins->sreg2));
+ else if ((op == 0) && (op2 == 1)) {
+ if (!sparc_is_imm19 (disp))
+ NOT_IMPLEMENTED;
+ /* BPcc */
+ *code = ((ins >> 19) << 19) | (disp & 0x7ffff);
}
- if (reg != ins->dreg && reg_is_freeable (ins->dreg)) {
- regmask &= ~ (1 << ins->dreg);
- DEBUG (g_print ("excluding dreg %s\n", mono_arch_regname (ins->dreg)));
+ else if ((op == 0) && (op2 == 3)) {
+ if (!sparc_is_imm16 (disp))
+ NOT_IMPLEMENTED;
+ /* BPr */
+ *code &= ~(0x180000 | 0x3fff);
+ *code |= ((disp << 21) & (0x180000)) | (disp & 0x3fff);
}
-
- DEBUG (g_print ("available regmask: 0x%08x\n", regmask));
- g_assert (regmask); /* need at least a register we can free */
- sel = -1;
- /* we should track prev_use and spill the register that's farther */
- for (i = 0; i < MONO_MAX_IREGS; ++i) {
- if (regmask & (1 << i)) {
- sel = i;
- DEBUG (g_print ("selected register %s has assignment %d\n", mono_arch_regname (sel), cfg->rs->iassign [sel]));
- break;
+ else if ((op == 0) && (op2 == 6)) {
+ if (!sparc_is_imm22 (disp))
+ NOT_IMPLEMENTED;
+ /* FBicc */
+ *code = ((ins >> 22) << 22) | (disp & 0x3fffff);
+ }
+ else if ((op == 0) && (op2 == 4)) {
+ guint32 ins2 = code [1];
+
+ if (((ins2 >> 30) == 2) && (((ins2 >> 19) & 0x3f) == 2)) {
+ /* sethi followed by or */
+ guint32 *p = code;
+ sparc_set (p, target8, rd);
+ while (p <= (code + 1))
+ sparc_nop (p);
+ }
+ else if (ins2 == 0x01000000) {
+ /* sethi followed by nop */
+ guint32 *p = code;
+ sparc_set (p, target8, rd);
+ while (p <= (code + 1))
+ sparc_nop (p);
}
+ else if ((sparc_inst_op (ins2) == 3) && (sparc_inst_imm (ins2))) {
+ /* sethi followed by load/store */
+#ifndef SPARCV9
+ guint32 t = (guint32)target8;
+ *code &= ~(0x3fffff);
+ *code |= (t >> 10);
+ *(code + 1) &= ~(0x3ff);
+ *(code + 1) |= (t & 0x3ff);
+#endif
+ }
+ else if (v64 &&
+ (sparc_inst_rd (ins) == sparc_g1) &&
+ (sparc_inst_op (c [1]) == 0) && (sparc_inst_op2 (c [1]) == 4) &&
+ (sparc_inst_op (c [2]) == 2) && (sparc_inst_op3 (c [2]) == 2) &&
+ (sparc_inst_op (c [3]) == 2) && (sparc_inst_op3 (c [3]) == 2))
+ {
+ /* sparc_set */
+ guint32 *p = c;
+ reg = sparc_inst_rd (c [1]);
+ sparc_set (p, target8, reg);
+ while (p < (c + 6))
+ sparc_nop (p);
+ }
+ else if ((sparc_inst_op (ins2) == 2) && (sparc_inst_op3 (ins2) == 0x38) &&
+ (sparc_inst_imm (ins2))) {
+ /* sethi followed by jmpl */
+#ifndef SPARCV9
+ guint32 t = (guint32)target8;
+ *code &= ~(0x3fffff);
+ *code |= (t >> 10);
+ *(code + 1) &= ~(0x3ff);
+ *(code + 1) |= (t & 0x3ff);
+#endif
+ }
+ else
+ NOT_IMPLEMENTED;
}
- i = cfg->rs->isymbolic [sel];
- spill = ++cfg->spill_count;
- cfg->rs->iassign [i] = -spill - 1;
- mono_regstate_free_int (cfg->rs, sel);
- /* we need to create a spill var and insert a load to sel after the current instruction */
- MONO_INST_NEW (cfg, load, OP_LOAD_MEMBASE);
- load->dreg = sel;
- load->inst_basereg = cfg->frame_reg;
- load->inst_offset = mono_spillvar_offset (cfg, spill);
- if (item->prev) {
- while (ins->next != item->prev->data)
- ins = ins->next;
+ else if (op == 01) {
+ gint64 disp = (target8 - (guint8*)code) >> 2;
+
+ if (!sparc_is_imm30 (disp))
+ NOT_IMPLEMENTED;
+ sparc_call_simple (code, target8 - (guint8*)code);
}
- load->next = ins->next;
- ins->next = load;
- DEBUG (g_print ("SPILLED LOAD (%d at 0x%08x(%%sp)) R%d (freed %s)\n", spill, load->inst_offset, i, mono_arch_regname (sel)));
- i = mono_regstate_alloc_int (cfg->rs, 1 << sel);
- g_assert (i == sel);
-
- return sel;
+ else if ((op == 2) && (sparc_inst_op3 (ins) == 0x2) && sparc_inst_imm (ins)) {
+ /* mov imm, reg */
+ g_assert (sparc_is_imm13 (target8));
+ *code &= ~(0x1fff);
+ *code |= (guint32)target8;
+ }
+ else if ((sparc_inst_op (ins) == 2) && (sparc_inst_op3 (ins) == 0x7)) {
+ /* sparc_set case 5. */
+ guint32 *p = c;
+
+ g_assert (v64);
+ reg = sparc_inst_rd (c [3]);
+ sparc_set (p, target, reg);
+ while (p < (c + 6))
+ sparc_nop (p);
+ }
+ else
+ NOT_IMPLEMENTED;
+
+// g_print ("patched with 0x%08x\n", ins);
}
-static MonoInst*
-create_copy_ins (MonoCompile *cfg, int dest, int src, MonoInst *ins)
+/*
+ * mono_sparc_emit_save_lmf:
+ *
+ * Emit the code neccesary to push a new entry onto the lmf stack. Used by
+ * trampolines as well.
+ */
+guint32*
+mono_sparc_emit_save_lmf (guint32 *code, guint32 lmf_offset)
{
- MonoInst *copy;
- MONO_INST_NEW (cfg, copy, OP_MOVE);
- copy->dreg = dest;
- copy->sreg1 = src;
- if (ins) {
- copy->next = ins->next;
- ins->next = copy;
- }
- DEBUG (g_print ("\tforced copy from %s to %s\n", mono_arch_regname (src), mono_arch_regname (dest)));
- return copy;
+ /* Save lmf_addr */
+ sparc_sti_imm (code, sparc_o0, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr));
+ /* Save previous_lmf */
+ sparc_ldi (code, sparc_o0, sparc_g0, sparc_o7);
+ sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf));
+ /* Set new lmf */
+ sparc_add_imm (code, FALSE, sparc_fp, lmf_offset, sparc_o7);
+ sparc_sti (code, sparc_o7, sparc_o0, sparc_g0);
+
+ return code;
+}
+
+guint32*
+mono_sparc_emit_restore_lmf (guint32 *code, guint32 lmf_offset)
+{
+ /* Load previous_lmf */
+ sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, previous_lmf), sparc_l0);
+ /* Load lmf_addr */
+ sparc_ldi_imm (code, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, lmf_addr), sparc_l1);
+ /* *(lmf) = previous_lmf */
+ sparc_sti (code, sparc_l0, sparc_l1, sparc_g0);
+ return code;
}
-static MonoInst*
-create_spilled_store (MonoCompile *cfg, int spill, int reg, int prev_reg, MonoInst *ins)
+static guint32*
+emit_save_sp_to_lmf (MonoCompile *cfg, guint32 *code)
{
- MonoInst *store;
- MONO_INST_NEW (cfg, store, OP_STORE_MEMBASE_REG);
- store->sreg1 = reg;
- store->inst_destbasereg = sparc_sp;
- store->inst_offset = mono_spillvar_offset (cfg, spill);
- if (ins) {
- store->next = ins->next;
- ins->next = store;
+ /*
+ * Since register windows are saved to the current value of %sp, we need to
+ * set the sp field in the lmf before the call, not in the prolog.
+ */
+ if (cfg->method->save_lmf) {
+ gint32 lmf_offset = MONO_SPARC_STACK_BIAS - cfg->arch.lmf_offset;
+
+ /* Save sp */
+ sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
}
- DEBUG (g_print ("SPILLED STORE (%d at 0x%08x(%%sp)) R%d (from %s)\n", spill, store->inst_offset, prev_reg, mono_arch_regname (reg)));
- return store;
+
+ return code;
}
-static void
-insert_before_ins (MonoInst *ins, InstList *item, MonoInst* to_insert)
+static guint32*
+emit_vret_token (MonoInst *ins, guint32 *code)
{
- MonoInst *prev;
- g_assert (item->next);
- prev = item->next->data;
-
- while (prev->next != ins)
- prev = prev->next;
- to_insert->next = ins;
- prev->next = to_insert;
+ MonoCallInst *call = (MonoCallInst*)ins;
+ guint32 size;
+
/*
- * needed otherwise in the next instruction we can add an ins to the
- * end and that would get past this instruction.
+ * The sparc ABI requires that calls to functions which return a structure
+ * contain an additional unimpl instruction which is checked by the callee.
*/
- item->data = to_insert;
+ if (call->signature->pinvoke && MONO_TYPE_ISSTRUCT(call->signature->ret)) {
+ if (call->signature->ret->type == MONO_TYPE_TYPEDBYREF)
+ size = mono_type_stack_size (call->signature->ret, NULL);
+ else
+ size = mono_class_native_size (call->signature->ret->data.klass, NULL);
+ sparc_unimp (code, size & 0xfff);
+ }
+
+ return code;
}
-static int
-alloc_int_reg (MonoCompile *cfg, InstList *curinst, MonoInst *ins, int sym_reg, guint32 allow_mask)
+static guint32*
+emit_move_return_value (MonoInst *ins, guint32 *code)
{
- int val = cfg->rs->iassign [sym_reg];
- if (val < 0) {
- int spill = 0;
- if (val < -1) {
- /* the register gets spilled after this inst */
- spill = -val -1;
- }
- val = mono_regstate_alloc_int (cfg->rs, allow_mask);
- if (val < 0)
- val = get_register_spilling (cfg, curinst, ins, allow_mask, sym_reg);
- cfg->rs->iassign [sym_reg] = val;
- /* add option to store before the instruction for src registers */
- if (spill)
- create_spilled_store (cfg, spill, val, sym_reg, ins);
+ /* Move return value to the target register */
+ /* FIXME: do more things in the local reg allocator */
+ switch (ins->opcode) {
+ case OP_VOIDCALL:
+ case OP_VOIDCALL_REG:
+ case OP_VOIDCALL_MEMBASE:
+ break;
+ case CEE_CALL:
+ case OP_CALL_REG:
+ case OP_CALL_MEMBASE:
+ g_assert (ins->dreg == sparc_o0);
+ break;
+ case OP_LCALL:
+ case OP_LCALL_REG:
+ case OP_LCALL_MEMBASE:
+ /*
+ * ins->dreg is the least significant reg due to the lreg: LCALL rule
+ * in inssel-long32.brg.
+ */
+#ifdef SPARCV9
+ sparc_mov_reg_reg (code, sparc_o0, ins->dreg);
+#else
+ g_assert (ins->dreg == sparc_o1);
+#endif
+ break;
+ case OP_FCALL:
+ case OP_FCALL_REG:
+ case OP_FCALL_MEMBASE:
+#ifdef SPARCV9
+ if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4) {
+ sparc_fmovs (code, sparc_f0, ins->dreg);
+ sparc_fstod (code, ins->dreg, ins->dreg);
+ }
+ else
+ sparc_fmovd (code, sparc_f0, ins->dreg);
+#else
+ sparc_fmovs (code, sparc_f0, ins->dreg);
+ if (((MonoCallInst*)ins)->signature->ret->type == MONO_TYPE_R4)
+ sparc_fstod (code, ins->dreg, ins->dreg);
+ else
+ sparc_fmovs (code, sparc_f1, ins->dreg + 1);
+#endif
+ break;
+ case OP_VCALL:
+ case OP_VCALL_REG:
+ case OP_VCALL_MEMBASE:
+ break;
+ default:
+ NOT_IMPLEMENTED;
}
- cfg->rs->isymbolic [val] = sym_reg;
- return val;
+
+ return code;
}
/*
- * Local register allocation.
- * We first scan the list of instructions and we save the liveness info of
- * each register (when the register is first used, when it's value is set etc.).
- * We also reverse the list of instructions (in the InstList list) because assigning
- * registers backwards allows for more tricks to be used.
+ * emit_load_volatile_arguments:
+ *
+ * Load volatile arguments from the stack to the original input registers.
+ * Required before a tail call.
*/
-void
-mono_arch_local_regalloc (MonoCompile *cfg, MonoBasicBlock *bb)
+static guint32*
+emit_load_volatile_arguments (MonoCompile *cfg, guint32 *code)
{
- MonoInst *ins;
- MonoRegState *rs = cfg->rs;
- int i, val, fpcount;
- RegTrack *reginfo, *reginfof;
- RegTrack *reginfo1, *reginfo2, *reginfod;
- InstList *tmp, *reversed = NULL;
- const char *spec;
- guint32 src1_mask, src2_mask, dest_mask;
+ MonoMethod *method = cfg->method;
+ MonoMethodSignature *sig;
+ MonoInst *inst;
+ CallInfo *cinfo;
+ guint32 i, ireg;
- if (!bb->code)
- return;
- rs->next_vireg = bb->max_ireg;
- rs->next_vfreg = bb->max_freg;
- mono_regstate_assign (rs);
- reginfo = mono_mempool_alloc0 (cfg->mempool, sizeof (RegTrack) * rs->next_vireg);
- reginfof = mono_mempool_alloc0 (cfg->mempool, sizeof (RegTrack) * rs->next_vfreg);
- rs->ifree_mask = 0xdeadbeef; /* FIXME */
+ /* FIXME: Generate intermediate code instead */
- ins = bb->code;
- i = 1;
- fpcount = 0; /* FIXME: track fp stack utilization */
- DEBUG (g_print ("LOCAL regalloc: basic block: %d\n", bb->block_num));
- /* forward pass on the instructions to collect register liveness info */
- while (ins) {
- spec = ins_spec [ins->opcode];
- DEBUG (print_ins (i, ins));
- if (spec [MONO_INST_SRC1]) {
- if (spec [MONO_INST_SRC1] == 'f')
- reginfo1 = reginfof;
- else
- reginfo1 = reginfo;
- reginfo1 [ins->sreg1].prev_use = reginfo1 [ins->sreg1].last_use;
- reginfo1 [ins->sreg1].last_use = i;
- } else {
- ins->sreg1 = -1;
+ sig = mono_method_signature (method);
+
+ cinfo = get_call_info (sig, FALSE);
+
+ /* This is the opposite of the code in emit_prolog */
+
+ for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
+ ArgInfo *ainfo = cinfo->args + i;
+ gint32 stack_offset;
+ MonoType *arg_type;
+ inst = cfg->varinfo [i];
+
+ if (sig->hasthis && (i == 0))
+ arg_type = &mono_defaults.object_class->byval_arg;
+ else
+ arg_type = sig->params [i - sig->hasthis];
+
+ stack_offset = ainfo->offset + ARGS_OFFSET;
+ ireg = sparc_i0 + ainfo->reg;
+
+ if (ainfo->storage == ArgInSplitRegStack) {
+ g_assert (inst->opcode == OP_REGOFFSET);
+
+ if (!sparc_is_imm13 (stack_offset))
+ NOT_IMPLEMENTED;
+ sparc_st_imm (code, inst->inst_basereg, stack_offset, sparc_i5);
}
- if (spec [MONO_INST_SRC2]) {
- if (spec [MONO_INST_SRC2] == 'f')
- reginfo2 = reginfof;
+
+ if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
+ if (ainfo->storage == ArgInIRegPair) {
+ if (!sparc_is_imm13 (inst->inst_offset + 4))
+ NOT_IMPLEMENTED;
+ sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
+ sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
+ }
else
- reginfo2 = reginfo;
- reginfo2 [ins->sreg2].prev_use = reginfo2 [ins->sreg2].last_use;
- reginfo2 [ins->sreg2].last_use = i;
- } else {
- ins->sreg2 = -1;
- }
- if (spec [MONO_INST_DEST]) {
- if (spec [MONO_INST_DEST] == 'f')
- reginfod = reginfof;
+ if (ainfo->storage == ArgInSplitRegStack) {
+ if (stack_offset != inst->inst_offset) {
+ sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_i5);
+ sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
+ sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
+
+ }
+ }
else
- reginfod = reginfo;
- if (spec [MONO_INST_DEST] != 'b') /* it's not just a base register */
- reginfod [ins->dreg].killed_in = i;
- reginfod [ins->dreg].prev_use = reginfod [ins->dreg].last_use;
- reginfod [ins->dreg].last_use = i;
- if (reginfod [ins->dreg].born_in == 0 || reginfod [ins->dreg].born_in > i)
- reginfod [ins->dreg].born_in = i;
- if (spec [MONO_INST_DEST] == 'l') {
- /* result in eax:edx, the virtual register is allocated sequentially */
- reginfod [ins->dreg + 1].prev_use = reginfod [ins->dreg + 1].last_use;
- reginfod [ins->dreg + 1].last_use = i;
- if (reginfod [ins->dreg + 1].born_in == 0 || reginfod [ins->dreg + 1].born_in > i)
- reginfod [ins->dreg + 1].born_in = i;
- }
- } else {
- ins->dreg = -1;
- }
- reversed = inst_list_prepend (cfg->mempool, reversed, ins);
- ++i;
- ins = ins->next;
- }
+ if (ainfo->storage == ArgOnStackPair) {
+ if (stack_offset != inst->inst_offset) {
+ /* stack_offset is not dword aligned, so we need to make a copy */
+ sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, sparc_o7);
+ sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset);
+
+ sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset + 4, sparc_o7);
+ sparc_st_imm (code, sparc_o7, sparc_fp, stack_offset + 4);
- DEBUG (print_regtrack (reginfo, rs->next_vireg));
- DEBUG (print_regtrack (reginfof, rs->next_vfreg));
- tmp = reversed;
- while (tmp) {
- int prev_dreg, prev_sreg1, prev_sreg2;
- dest_mask = src1_mask = src2_mask = 0xdeadbeef; /* FIXME */
- --i;
- ins = tmp->data;
- spec = ins_spec [ins->opcode];
- DEBUG (g_print ("processing:"));
- DEBUG (print_ins (i, ins));
- /* update for use with FP regs... */
- if (spec [MONO_INST_DEST] != 'f' && ins->dreg >= MONO_MAX_IREGS) {
- val = rs->iassign [ins->dreg];
- prev_dreg = ins->dreg;
- if (val < 0) {
- int spill = 0;
- if (val < -1) {
- /* the register gets spilled after this inst */
- spill = -val -1;
- }
- val = mono_regstate_alloc_int (rs, dest_mask);
- if (val < 0)
- val = get_register_spilling (cfg, tmp, ins, dest_mask, ins->dreg);
- rs->iassign [ins->dreg] = val;
- if (spill)
- create_spilled_store (cfg, spill, val, prev_dreg, ins);
- }
- DEBUG (g_print ("\tassigned dreg %s to dest R%d\n", mono_arch_regname (val), ins->dreg));
- rs->isymbolic [val] = prev_dreg;
- ins->dreg = val;
- if (spec [MONO_INST_DEST] == 'l') {
- int hreg = prev_dreg + 1;
- val = rs->iassign [hreg];
- if (val < 0) {
- int spill = 0;
- if (val < -1) {
- /* the register gets spilled after this inst */
- spill = -val -1;
}
- val = mono_regstate_alloc_int (rs, dest_mask);
- if (val < 0)
- val = get_register_spilling (cfg, tmp, ins, dest_mask, hreg);
- rs->iassign [hreg] = val;
- if (spill)
- create_spilled_store (cfg, spill, val, hreg, ins);
}
- DEBUG (g_print ("\tassigned hreg %s to dest R%d\n", mono_arch_regname (val), hreg));
- rs->isymbolic [val] = hreg;
- /* FIXME:? ins->dreg = val; */
- if (ins->dreg == sparc_l1) {
- if (val != sparc_l0)
- create_copy_ins (cfg, val, sparc_l0, ins);
- } else if (ins->dreg == sparc_l0) {
- if (val == sparc_l1) {
- /* swap */
- create_copy_ins (cfg, sparc_l2, sparc_l0, ins);
- create_copy_ins (cfg, sparc_l0, sparc_l1, ins);
- create_copy_ins (cfg, sparc_l1, sparc_l2, ins);
- } else {
- /* two forced copies */
- create_copy_ins (cfg, val, sparc_l0, ins);
- create_copy_ins (cfg, ins->dreg, sparc_l1, ins);
- }
- } else {
- if (val == sparc_l0) {
- create_copy_ins (cfg, ins->dreg, sparc_l1, ins);
- } else {
- /* two forced copies */
- create_copy_ins (cfg, val, sparc_l0, ins);
- create_copy_ins (cfg, ins->dreg, sparc_l1, ins);
+ else
+ g_assert_not_reached ();
+ }
+ else
+ if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
+ /* Argument in register, but need to be saved to stack */
+ if (!sparc_is_imm13 (stack_offset))
+ NOT_IMPLEMENTED;
+ if ((stack_offset - ARGS_OFFSET) & 0x1)
+ /* FIXME: Is this ldsb or ldub ? */
+ sparc_ldsb_imm (code, inst->inst_basereg, stack_offset, ireg);
+ else
+ if ((stack_offset - ARGS_OFFSET) & 0x2)
+ sparc_ldsh_imm (code, inst->inst_basereg, stack_offset, ireg);
+ else
+ if ((stack_offset - ARGS_OFFSET) & 0x4)
+ sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
+ else {
+ if (v64)
+ sparc_ldx_imm (code, inst->inst_basereg, stack_offset, ireg);
+ else
+ sparc_ld_imm (code, inst->inst_basereg, stack_offset, ireg);
}
- }
- if (reg_is_freeable (val) && hreg >= 0 && reginfo [hreg].born_in >= i) {
- DEBUG (g_print ("\tfreeable %s (R%d)\n", mono_arch_regname (val), hreg));
- mono_regstate_free_int (rs, val);
- }
}
- } else {
- prev_dreg = -1;
- }
- if (spec [MONO_INST_DEST] != 'f' && reg_is_freeable (ins->dreg) && prev_dreg >= 0 && reginfo [prev_dreg].born_in >= i) {
- DEBUG (g_print ("\tfreeable %s (R%d) (born in %d)\n", mono_arch_regname (ins->dreg), prev_dreg, reginfo [prev_dreg].born_in));
- mono_regstate_free_int (rs, ins->dreg);
- }
- if (spec [MONO_INST_SRC1] != 'f' && ins->sreg1 >= MONO_MAX_IREGS) {
- val = rs->iassign [ins->sreg1];
- prev_sreg1 = ins->sreg1;
- if (val < 0) {
- int spill = 0;
- if (val < -1) {
- /* the register gets spilled after this inst */
- spill = -val -1;
- }
- if (0 && ins->opcode == OP_MOVE) {
- /*
- * small optimization: the dest register is already allocated
- * but the src one is not: we can simply assign the same register
- * here and peephole will get rid of the instruction later.
- * This optimization may interfere with the clobbering handling:
- * it removes a mov operation that will be added again to handle clobbering.
- * There are also some other issues that should with make testjit.
- */
- mono_regstate_alloc_int (rs, 1 << ins->dreg);
- val = rs->iassign [ins->sreg1] = ins->dreg;
- //g_assert (val >= 0);
- DEBUG (g_print ("\tfast assigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
- } else {
- //g_assert (val == -1); /* source cannot be spilled */
- val = mono_regstate_alloc_int (rs, src1_mask);
- if (val < 0)
- val = get_register_spilling (cfg, tmp, ins, src1_mask, ins->sreg1);
- rs->iassign [ins->sreg1] = val;
- DEBUG (g_print ("\tassigned sreg1 %s to R%d\n", mono_arch_regname (val), ins->sreg1));
- }
- if (spill) {
- MonoInst *store = create_spilled_store (cfg, spill, val, prev_sreg1, NULL);
- insert_before_ins (ins, tmp, store);
- }
+ else if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
+ /* Argument in regpair, but need to be saved to stack */
+ if (!sparc_is_imm13 (inst->inst_offset + 4))
+ NOT_IMPLEMENTED;
+ sparc_ld_imm (code, inst->inst_basereg, inst->inst_offset, ireg);
+ sparc_st_imm (code, inst->inst_basereg, inst->inst_offset + 4, ireg + 1);
}
- rs->isymbolic [val] = prev_sreg1;
- ins->sreg1 = val;
- } else {
- prev_sreg1 = -1;
- }
- if (spec [MONO_INST_SRC2] != 'f' && ins->sreg2 >= MONO_MAX_IREGS) {
- val = rs->iassign [ins->sreg2];
- prev_sreg2 = ins->sreg2;
- if (val < 0) {
- int spill = 0;
- if (val < -1) {
- /* the register gets spilled after this inst */
- spill = -val -1;
- }
- val = mono_regstate_alloc_int (rs, src2_mask);
- if (val < 0)
- val = get_register_spilling (cfg, tmp, ins, src2_mask, ins->sreg2);
- rs->iassign [ins->sreg2] = val;
- DEBUG (g_print ("\tassigned sreg2 %s to R%d\n", mono_arch_regname (val), ins->sreg2));
- if (spill)
- create_spilled_store (cfg, spill, val, prev_sreg2, ins);
+ else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
+ NOT_IMPLEMENTED;
}
- rs->isymbolic [val] = prev_sreg2;
- ins->sreg2 = val;
- } else {
- prev_sreg2 = -1;
- }
-
- if (spec [MONO_INST_CLOB] == 'c') {
- int j, s;
- guint32 clob_mask = 0xdeadbeef; /* FIXME */
- for (j = 0; j < MONO_MAX_IREGS; ++j) {
- s = 1 << j;
- if ((clob_mask & s) && !(rs->ifree_mask & s) && j != ins->sreg1) {
- //g_warning ("register %s busy at call site\n", mono_arch_regname (j));
- }
+ else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
+ NOT_IMPLEMENTED;
}
- }
- /*if (reg_is_freeable (ins->sreg1) && prev_sreg1 >= 0 && reginfo [prev_sreg1].born_in >= i) {
- DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg1)));
- mono_regstate_free_int (rs, ins->sreg1);
- }
- if (reg_is_freeable (ins->sreg2) && prev_sreg2 >= 0 && reginfo [prev_sreg2].born_in >= i) {
- DEBUG (g_print ("freeable %s\n", mono_arch_regname (ins->sreg2)));
- mono_regstate_free_int (rs, ins->sreg2);
- }*/
-
- //DEBUG (print_ins (i, ins));
- tmp = tmp->next;
+
+ if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
+ if (inst->opcode == OP_REGVAR)
+ /* FIXME: Load the argument into memory */
+ NOT_IMPLEMENTED;
}
-}
-static guchar*
-emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int size, gboolean is_signed)
-{
+ g_free (cinfo);
+
return code;
}
-static unsigned char*
-mono_emit_stack_alloc (guchar *code, MonoInst* tree)
+/*
+ * mono_sparc_is_virtual_call:
+ *
+ * Determine whenever the instruction at CODE is a virtual call.
+ */
+gboolean
+mono_sparc_is_virtual_call (guint32 *code)
{
- return code;
+ guint32 buf[1];
+ guint32 *p;
+
+ p = buf;
+
+ if ((sparc_inst_op (*code) == 0x2) && (sparc_inst_op3 (*code) == 0x38)) {
+ /*
+ * Register indirect call. If it is a virtual call, then the
+ * instruction in the delay slot is a special kind of nop.
+ */
+
+ /* Construct special nop */
+ sparc_or_imm (p, FALSE, sparc_g0, 0xca, sparc_g0);
+ p --;
+
+ if (code [1] == p [0])
+ return TRUE;
+ }
+
+ return FALSE;
}
-void
-sparc_patch (guchar *code, guchar *target)
+/*
+ * mono_arch_get_vcall_slot_addr:
+ *
+ * Determine the vtable slot used by a virtual call.
+ */
+gpointer*
+mono_arch_get_vcall_slot_addr (guint8 *code8, gpointer *regs)
{
- guint32 ins = *(guint32*)code;
- guint32 prim = ins >> 26;
+ guint32 *code = (guint32*)(gpointer)code8;
+ guint32 ins = code [0];
+ guint32 prev_ins = code [-1];
-// g_print ("patching 0x%08x (0x%08x) to point to 0x%08x\n", code, ins, target);
- if (prim == 18) {
- // absolute address
- if (ins & 2) {
- guint32 li = (guint32)target;
- ins = prim << 26 | (ins & 3);
- ins |= li;
- // FIXME: assert the top bits of li are 0
- } else {
- gint diff = target - code;
- ins = prim << 26 | (ins & 3);
- diff &= ~3;
- diff &= ~(63 << 26);
- ins |= diff;
- }
- *(guint32*)code = ins;
- } else if (prim == 16) {
- // absolute address
- if (ins & 2) {
- guint32 li = (guint32)target;
- ins = (ins & 0xffff0000) | (ins & 3);
- li &= 0xffff;
- ins |= li;
- // FIXME: assert the top bits of li are 0
- } else {
- gint diff = target - code;
- ins = (ins & 0xffff0000) | (ins & 3);
- diff &= 0xffff;
- ins |= diff;
+ mono_sparc_flushw ();
+
+ if (!mono_sparc_is_virtual_call (code))
+ return NULL;
+
+ if ((sparc_inst_op (ins) == 0x2) && (sparc_inst_op3 (ins) == 0x38)) {
+ if ((sparc_inst_op (prev_ins) == 0x3) && (sparc_inst_op3 (prev_ins) == 0 || sparc_inst_op3 (prev_ins) == 0xb)) {
+ /* ld [r1 + CONST ], r2; call r2 */
+ guint32 base = sparc_inst_rs1 (prev_ins);
+ guint32 disp = sparc_inst_imm13 (prev_ins);
+ gpointer base_val;
+
+ g_assert (sparc_inst_rd (prev_ins) == sparc_inst_rs1 (ins));
+
+ g_assert ((base >= sparc_o0) && (base <= sparc_i7));
+
+ base_val = regs [base - sparc_o0];
+
+ return (gpointer)((guint8*)base_val + disp);
}
- *(guint32*)code = ins;
- } else {
- g_assert_not_reached ();
+ else
+ g_assert_not_reached ();
}
-// g_print ("patched with 0x%08x\n", ins);
+ else
+ g_assert_not_reached ();
+
+ return NULL;
}
/*
* Some conventions used in the following code.
- * 1) We're assuming a V9 CPU. We will check for that later.
- * In reality, we're mostly sticking with V8 instructions...
* 2) The only scratch registers we have are o7 and g1. We try to
* stick to o7 when we can, and use g1 when necessary.
*/
MonoInst *ins;
MonoCallInst *call;
guint offset;
- guint8 *code = cfg->native_code + cfg->code_len;
+ guint32 *code = (guint32*)(cfg->native_code + cfg->code_len);
MonoInst *last_ins = NULL;
- guint last_offset = 0;
int max_len, cpos;
+ const char *spec;
if (cfg->opt & MONO_OPT_PEEPHOLE)
peephole_pass (cfg, bb);
-#if 0
- /*
- * various stratgies to align BBs. Using real loop detection or simply
- * aligning every block leads to more consistent benchmark results,
- * but usually slows down the code
- * we should do the alignment outside this function or we should adjust
- * bb->native offset as well or the code is effectively slowed down!
- */
- /* align all blocks */
-// if ((pad = (cfg->code_len & (align - 1)))) {
- /* poor man loop start detection */
-// if (bb->code && bb->in_count && bb->in_bb [0]->cil_code > bb->cil_code && (pad = (cfg->code_len & (align - 1)))) {
- /* consider real loop detection and nesting level */
-// if (bb->loop_blocks && bb->nesting < 3 && (pad = (cfg->code_len & (align - 1)))) {
- /* consider real loop detection */
- if (/*bb->loop_blocks &&*/ (pad = (cfg->code_len & (align - 1)))) {
- pad = align - pad;
- x86_padding (code, pad);
- cfg->code_len += pad;
- bb->native_offset = cfg->code_len;
- }
-#endif
-
if (cfg->verbose_level > 2)
g_print ("Basic block %d starting at offset 0x%x\n", bb->block_num, bb->native_offset);
cpos = bb->max_offset;
if (cfg->prof_options & MONO_PROFILE_COVERAGE) {
- //MonoCoverageInfo *cov = mono_get_coverage_info (cfg->method);
- //g_assert (!mono_compile_aot);
- //cpos += 6;
- //if (bb->cil_code)
- // cov->data [bb->dfn].iloffset = bb->cil_code - cfg->cil_code;
- /* this is not thread save, but good enough */
- /* fixme: howto handle overflows? */
- //x86_inc_mem (code, &cov->data [bb->dfn].count);
+ NOT_IMPLEMENTED;
}
ins = bb->code;
while (ins) {
- offset = code - cfg->native_code;
+ guint8* code_start;
+
+ offset = (guint8*)code - cfg->native_code;
+
+ spec = ins_spec [ins->opcode];
+ if (!spec)
+ spec = ins_spec [CEE_ADD];
- max_len = ((guint8 *)ins_spec [ins->opcode])[MONO_INST_LEN];
+ max_len = ((guint8 *)spec)[MONO_INST_LEN];
if (offset > (cfg->code_size - max_len - 16)) {
cfg->code_size *= 2;
cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
- code = cfg->native_code + offset;
+ code = (guint32*)(cfg->native_code + offset);
}
- // if (ins->cil_code)
- // g_print ("cil code\n");
+ code_start = (guint8*)code;
+ // if (ins->cil_code)
+ // g_print ("cil code\n");
+ mono_debug_record_line_number (cfg, ins, offset);
switch (ins->opcode) {
case OP_STOREI1_MEMBASE_IMM:
- sparc_set (code, ins->inst_imm, sparc_o7);
-// g_assert (ppc_is_imm16 (ins->inst_offset));
- sparc_stb_imm (code, sparc_o7, ins->inst_offset, ins->inst_destbasereg);
+ EMIT_STORE_MEMBASE_IMM (ins, stb);
break;
case OP_STOREI2_MEMBASE_IMM:
- sparc_set (code, ins->inst_imm, sparc_o7);
-// g_assert (ppc_is_imm16 (ins->inst_offset));
- sparc_sth_imm (code, sparc_o7, ins->inst_offset, ins->inst_destbasereg);
+ EMIT_STORE_MEMBASE_IMM (ins, sth);
break;
case OP_STORE_MEMBASE_IMM:
+ EMIT_STORE_MEMBASE_IMM (ins, sti);
+ break;
case OP_STOREI4_MEMBASE_IMM:
- sparc_set (code, ins->inst_imm, sparc_o7);
-// g_assert (ppc_is_imm16 (ins->inst_offset));
- sparc_st_imm (code, sparc_o7, ins->inst_offset, ins->inst_destbasereg);
+ EMIT_STORE_MEMBASE_IMM (ins, st);
+ break;
+ case OP_STOREI8_MEMBASE_IMM:
+#ifdef SPARCV9
+ EMIT_STORE_MEMBASE_IMM (ins, stx);
+#else
+ /* Only generated by peephole opts */
+ g_assert ((ins->inst_offset % 8) == 0);
+ g_assert (ins->inst_imm == 0);
+ EMIT_STORE_MEMBASE_IMM (ins, stx);
+#endif
break;
case OP_STOREI1_MEMBASE_REG:
-// g_assert (ppc_is_imm16 (ins->inst_offset));
- sparc_stb_imm (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
+ EMIT_STORE_MEMBASE_REG (ins, stb);
break;
case OP_STOREI2_MEMBASE_REG:
-// g_assert (ppc_is_imm16 (ins->inst_offset));
- sparc_sth (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
+ EMIT_STORE_MEMBASE_REG (ins, sth);
break;
- case OP_STORE_MEMBASE_REG:
case OP_STOREI4_MEMBASE_REG:
-// g_assert (ppc_is_imm16 (ins->inst_offset));
- sparc_st (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
+ EMIT_STORE_MEMBASE_REG (ins, st);
+ break;
+ case OP_STOREI8_MEMBASE_REG:
+#ifdef SPARCV9
+ EMIT_STORE_MEMBASE_REG (ins, stx);
+#else
+ /* Only used by OP_MEMSET */
+ EMIT_STORE_MEMBASE_REG (ins, std);
+#endif
+ break;
+ case OP_STORE_MEMBASE_REG:
+ EMIT_STORE_MEMBASE_REG (ins, sti);
break;
case CEE_LDIND_I:
+#ifdef SPARCV9
+ sparc_ldx (code, ins->inst_c0, sparc_g0, ins->dreg);
+#else
+ sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
+#endif
+ break;
case CEE_LDIND_I4:
+#ifdef SPARCV9
+ sparc_ldsw (code, ins->inst_c0, sparc_g0, ins->dreg);
+#else
+ sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
+#endif
+ break;
case CEE_LDIND_U4:
- sparc_ld (code, ins->inst_p0, sparc_g0, ins->dreg);
+ sparc_ld (code, ins->inst_c0, sparc_g0, ins->dreg);
break;
- /* The cast IS BAD (maybe). But it needs to be done... */
case OP_LOADU4_MEM:
- sparc_set (code, (guint)ins->inst_p0, ins->dreg);
+ sparc_set (code, ins->inst_c0, ins->dreg);
sparc_ld (code, ins->dreg, sparc_g0, ins->dreg);
break;
- case OP_LOAD_MEMBASE:
case OP_LOADI4_MEMBASE:
+#ifdef SPARCV9
+ EMIT_LOAD_MEMBASE (ins, ldsw);
+#else
+ EMIT_LOAD_MEMBASE (ins, ld);
+#endif
+ break;
case OP_LOADU4_MEMBASE:
- if (TRUE) { /* FIXME */
- sparc_ld_imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg);
- } else {
- sparc_ld (code, sparc_l0, 0, ins->inst_offset);
- sparc_ld (code, ins->dreg, 0, sparc_l0);
- }
+ EMIT_LOAD_MEMBASE (ins, ld);
break;
case OP_LOADU1_MEMBASE:
-// g_assert (ppc_is_imm16 (ins->inst_offset));
- sparc_ldub_imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg);
+ EMIT_LOAD_MEMBASE (ins, ldub);
break;
case OP_LOADI1_MEMBASE:
- // g_assert (ppc_is_imm16 (ins->inst_offset));
- sparc_ldsb_imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg);
+ EMIT_LOAD_MEMBASE (ins, ldsb);
break;
case OP_LOADU2_MEMBASE:
- // g_assert (ppc_is_imm16 (ins->inst_offset));
- sparc_lduh_imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg);
+ EMIT_LOAD_MEMBASE (ins, lduh);
break;
case OP_LOADI2_MEMBASE:
- sparc_ldsh_imm (code, ins->inst_basereg, ins->inst_offset, ins->dreg);
+ EMIT_LOAD_MEMBASE (ins, ldsh);
+ break;
+ case OP_LOAD_MEMBASE:
+#ifdef SPARCV9
+ EMIT_LOAD_MEMBASE (ins, ldx);
+#else
+ EMIT_LOAD_MEMBASE (ins, ld);
+#endif
+ break;
+#ifdef SPARCV9
+ case OP_LOADI8_MEMBASE:
+ EMIT_LOAD_MEMBASE (ins, ldx);
break;
+#endif
case CEE_CONV_I1:
sparc_sll_imm (code, ins->sreg1, 24, sparc_o7);
sparc_sra_imm (code, sparc_o7, 24, ins->dreg);
sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
sparc_sra_imm (code, sparc_o7, 16, ins->dreg);
break;
- /* GCC does this one differently. Don't ask me WHY. */
case CEE_CONV_U1:
sparc_and_imm (code, FALSE, ins->sreg1, 0xff, ins->dreg);
break;
sparc_sll_imm (code, ins->sreg1, 16, sparc_o7);
sparc_srl_imm (code, sparc_o7, 16, ins->dreg);
break;
+ case CEE_CONV_OVF_U4:
+ /* Only used on V9 */
+ sparc_cmp_imm (code, ins->sreg1, 0);
+ mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
+ MONO_PATCH_INFO_EXC, "OverflowException");
+ sparc_branchp (code, 0, sparc_bl, sparc_xcc_short, 0, 0);
+ /* Delay slot */
+ sparc_set (code, 1, sparc_o7);
+ sparc_sllx_imm (code, sparc_o7, 32, sparc_o7);
+ sparc_cmp (code, ins->sreg1, sparc_o7);
+ mono_add_patch_info (cfg, (guint8*)(code) - (cfg)->native_code,
+ MONO_PATCH_INFO_EXC, "OverflowException");
+ sparc_branchp (code, 0, sparc_bge, sparc_xcc_short, 0, 0);
+ sparc_nop (code);
+ sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
+ break;
+ case CEE_CONV_OVF_I4_UN:
+ /* Only used on V9 */
+ NOT_IMPLEMENTED;
+ break;
+ case CEE_CONV_U:
+ case CEE_CONV_U8:
+ /* Only used on V9 */
+ sparc_srl_imm (code, ins->sreg1, 0, ins->dreg);
+ break;
+ case CEE_CONV_I:
+ case CEE_CONV_I8:
+ /* Only used on V9 */
+ sparc_sra_imm (code, ins->sreg1, 0, ins->dreg);
+ break;
case OP_COMPARE:
+ case OP_LCOMPARE:
+ case OP_ICOMPARE:
sparc_cmp (code, ins->sreg1, ins->sreg2);
break;
case OP_COMPARE_IMM:
- if (TRUE) { /* FIXME */
- sparc_cmp_imm (code, ins->sreg1, (ins->inst_imm & 0x1fff));
- } else {
+ case OP_ICOMPARE_IMM:
+ if (sparc_is_imm13 (ins->inst_imm))
+ sparc_cmp_imm (code, ins->sreg1, ins->inst_imm);
+ else {
sparc_set (code, ins->inst_imm, sparc_o7);
sparc_cmp (code, ins->sreg1, sparc_o7);
}
sparc_cmp_imm (code, ins->sreg1, 0);
break;
case CEE_BREAK:
- g_assert_not_reached();
+ /*
+ * gdb does not like encountering 'ta 1' in the debugged code. So
+ * instead of emitting a trap, we emit a call a C function and place a
+ * breakpoint there.
+ */
+ //sparc_ta (code, 1);
+ mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, mono_sparc_break);
+ EMIT_CALL();
break;
case OP_ADDCC:
+ case OP_IADDCC:
sparc_add (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
break;
case CEE_ADD:
+ case OP_IADD:
sparc_add (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
break;
- case OP_ADC:
- sparc_addx (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
- break;
+ case OP_ADDCC_IMM:
case OP_ADD_IMM:
- if (TRUE) { /* FIXME */
- sparc_add_imm (code, FALSE, ins->sreg1, ins->inst_imm, ins->dreg);
- } else {
- sparc_ld (code, sparc_l0, 0, ins->inst_imm);
- sparc_add (code, 0, ins->dreg, ins->sreg1, sparc_l0);
- }
+ case OP_IADD_IMM:
+ /* according to inssel-long32.brg, this should set cc */
+ EMIT_ALU_IMM (ins, add, TRUE);
+ break;
+ case OP_ADC:
+ case OP_IADC:
+ /* according to inssel-long32.brg, this should set cc */
+ sparc_addx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
break;
case OP_ADC_IMM:
- sparc_addx (code, FALSE, ins->sreg1, ins->inst_imm, ins->dreg);
+ case OP_IADC_IMM:
+ EMIT_ALU_IMM (ins, addx, TRUE);
break;
case OP_SUBCC:
+ case OP_ISUBCC:
sparc_sub (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
break;
case CEE_SUB:
+ case OP_ISUB:
sparc_sub (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
break;
- case OP_SBB:
- sparc_subx (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
- break;
+ case OP_SUBCC_IMM:
case OP_SUB_IMM:
- // we add the negated value
- // g_assert (ppc_is_imm16 (-ins->inst_imm));
- sparc_add_imm (code, FALSE, ins->sreg1, -ins->inst_imm, ins->dreg);
+ case OP_ISUB_IMM:
+ /* according to inssel-long32.brg, this should set cc */
+ EMIT_ALU_IMM (ins, sub, TRUE);
+ break;
+ case OP_SBB:
+ case OP_ISBB:
+ /* according to inssel-long32.brg, this should set cc */
+ sparc_subx (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
break;
case OP_SBB_IMM:
- sparc_subx_imm (code, FALSE, ins->sreg2, ins->inst_imm, ins->dreg);
+ case OP_ISBB_IMM:
+ EMIT_ALU_IMM (ins, subx, TRUE);
break;
case CEE_AND:
+ case OP_IAND:
sparc_and (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
break;
case OP_AND_IMM:
- sparc_and_imm (code, FALSE, ins->sreg1, ins->inst_imm, ins->dreg);
+ case OP_IAND_IMM:
+ EMIT_ALU_IMM (ins, and, FALSE);
break;
case CEE_DIV:
- sparc_sdiv (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
+ case OP_IDIV:
+ /* Sign extend sreg1 into %y */
+ sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
+ sparc_wry (code, sparc_o7, sparc_g0);
+ sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
+ EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
break;
case CEE_DIV_UN:
+ case OP_IDIV_UN:
+ sparc_wry (code, sparc_g0, sparc_g0);
sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
break;
- case OP_DIV_IMM:
- sparc_sdiv_imm (code, FALSE, ins->sreg1, ins->inst_imm, ins->dreg);
+ case OP_DIV_IMM: {
+ int i, imm;
+
+ /* Transform division into a shift */
+ for (i = 1; i < 30; ++i) {
+ imm = (1 << i);
+ if (ins->inst_imm == imm)
+ break;
+ }
+ if (i < 30) {
+ if (i == 1) {
+ /* gcc 2.95.3 */
+ sparc_srl_imm (code, ins->sreg1, 31, sparc_o7);
+ sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
+ sparc_sra_imm (code, ins->dreg, 1, ins->dreg);
+ }
+ else {
+ /* http://compilers.iecc.com/comparch/article/93-04-079 */
+ sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
+ sparc_srl_imm (code, sparc_o7, 32 - i, sparc_o7);
+ sparc_add (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
+ sparc_sra_imm (code, ins->dreg, i, ins->dreg);
+ }
+ }
+ else {
+ /* Sign extend sreg1 into %y */
+ sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
+ sparc_wry (code, sparc_o7, sparc_g0);
+ EMIT_ALU_IMM (ins, sdiv, TRUE);
+ EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
+ }
break;
+ }
case CEE_REM:
- sparc_sdiv (code, FALSE, ins->sreg1, ins->sreg2, sparc_o7);
+ case OP_IREM:
+ /* Sign extend sreg1 into %y */
+ sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
+ sparc_wry (code, sparc_o7, sparc_g0);
+ sparc_sdiv (code, TRUE, ins->sreg1, ins->sreg2, sparc_o7);
+ EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
sparc_smul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
- sparc_sub (code, FALSE, sparc_o7, ins->sreg1, ins->dreg);
+ sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
break;
case CEE_REM_UN:
+ case OP_IREM_UN:
+ sparc_wry (code, sparc_g0, sparc_g0);
sparc_udiv (code, FALSE, ins->sreg1, ins->sreg2, sparc_o7);
sparc_umul (code, FALSE, ins->sreg2, sparc_o7, sparc_o7);
- sparc_sub (code, FALSE, sparc_o7, ins->sreg1, ins->dreg);
+ sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
break;
case OP_REM_IMM:
- sparc_sdiv_imm (code, FALSE, ins->sreg1, ins->inst_imm, sparc_o7);
- sparc_smul_imm (code, FALSE, sparc_o7, ins->inst_imm, sparc_o7);
- sparc_sub (code, FALSE, sparc_o7, ins->sreg1, ins->dreg);
+ case OP_IREM_IMM:
+ /* Sign extend sreg1 into %y */
+ sparc_sra_imm (code, ins->sreg1, 31, sparc_o7);
+ sparc_wry (code, sparc_o7, sparc_g0);
+ if (!sparc_is_imm13 (ins->inst_imm)) {
+ sparc_set (code, ins->inst_imm, GP_SCRATCH_REG);
+ sparc_sdiv (code, TRUE, ins->sreg1, GP_SCRATCH_REG, sparc_o7);
+ EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
+ sparc_smul (code, FALSE, sparc_o7, GP_SCRATCH_REG, sparc_o7);
+ }
+ else {
+ sparc_sdiv_imm (code, TRUE, ins->sreg1, ins->inst_imm, sparc_o7);
+ EMIT_COND_SYSTEM_EXCEPTION_GENERAL (code, sparc_boverflow, "ArithmeticException", TRUE, sparc_icc_short);
+ sparc_smul_imm (code, FALSE, sparc_o7, ins->inst_imm, sparc_o7);
+ }
+ sparc_sub (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
break;
case CEE_OR:
+ case OP_IOR:
sparc_or (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
break;
case OP_OR_IMM:
- sparc_set (code, ins->inst_imm, sparc_o7);
- sparc_or (code, FALSE, ins->sreg2, sparc_o7, ins->dreg);
+ case OP_IOR_IMM:
+ EMIT_ALU_IMM (ins, or, FALSE);
break;
case CEE_XOR:
+ case OP_IXOR:
sparc_xor (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
break;
case OP_XOR_IMM:
- sparc_set (code, ins->inst_imm, sparc_o7);
- sparc_xor (code, FALSE, ins->sreg1, sparc_o7, ins->dreg);
+ case OP_IXOR_IMM:
+ EMIT_ALU_IMM (ins, xor, FALSE);
break;
case CEE_SHL:
+ case OP_ISHL:
sparc_sll (code, ins->sreg1, ins->sreg2, ins->dreg);
break;
case OP_SHL_IMM:
- sparc_sll_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
+ case OP_ISHL_IMM:
+ if (ins->inst_imm < (1 << 5))
+ sparc_sll_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
+ else {
+ sparc_set (code, ins->inst_imm, sparc_o7);
+ sparc_sll (code, ins->sreg1, sparc_o7, ins->dreg);
+ }
break;
case CEE_SHR:
+ case OP_ISHR:
sparc_sra (code, ins->sreg1, ins->sreg2, ins->dreg);
break;
+ case OP_ISHR_IMM:
case OP_SHR_IMM:
- sparc_sra_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
+ if (ins->inst_imm < (1 << 5))
+ sparc_sra_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
+ else {
+ sparc_set (code, ins->inst_imm, sparc_o7);
+ sparc_sra (code, ins->sreg1, sparc_o7, ins->dreg);
+ }
break;
case OP_SHR_UN_IMM:
- sparc_srl_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
+ case OP_ISHR_UN_IMM:
+ if (ins->inst_imm < (1 << 5))
+ sparc_srl_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
+ else {
+ sparc_set (code, ins->inst_imm, sparc_o7);
+ sparc_srl (code, ins->sreg1, sparc_o7, ins->dreg);
+ }
break;
case CEE_SHR_UN:
+ case OP_ISHR_UN:
sparc_srl (code, ins->sreg1, ins->sreg2, ins->dreg);
break;
+ case OP_LSHL:
+ sparc_sllx (code, ins->sreg1, ins->sreg2, ins->dreg);
+ break;
+ case OP_LSHL_IMM:
+ if (ins->inst_imm < (1 << 6))
+ sparc_sllx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
+ else {
+ sparc_set (code, ins->inst_imm, sparc_o7);
+ sparc_sllx (code, ins->sreg1, sparc_o7, ins->dreg);
+ }
+ break;
+ case OP_LSHR:
+ sparc_srax (code, ins->sreg1, ins->sreg2, ins->dreg);
+ break;
+ case OP_LSHR_IMM:
+ if (ins->inst_imm < (1 << 6))
+ sparc_srax_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
+ else {
+ sparc_set (code, ins->inst_imm, sparc_o7);
+ sparc_srax (code, ins->sreg1, sparc_o7, ins->dreg);
+ }
+ break;
+ case OP_LSHR_UN:
+ sparc_srlx (code, ins->sreg1, ins->sreg2, ins->dreg);
+ break;
+ case OP_LSHR_UN_IMM:
+ if (ins->inst_imm < (1 << 6))
+ sparc_srlx_imm (code, ins->sreg1, ins->inst_imm, ins->dreg);
+ else {
+ sparc_set (code, ins->inst_imm, sparc_o7);
+ sparc_srlx (code, ins->sreg1, sparc_o7, ins->dreg);
+ }
+ break;
case CEE_NOT:
+ case OP_INOT:
/* can't use sparc_not */
sparc_xnor (code, FALSE, ins->sreg1, sparc_g0, ins->dreg);
break;
case CEE_NEG:
+ case OP_INEG:
/* can't use sparc_neg */
sparc_sub (code, FALSE, sparc_g0, ins->sreg1, ins->dreg);
break;
case CEE_MUL:
+ case OP_IMUL:
sparc_smul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
break;
- case OP_MUL_IMM:
- sparc_smul_imm (code, FALSE, ins->sreg1, ins->inst_imm, ins->dreg);
+ case OP_IMUL_IMM:
+ case OP_MUL_IMM: {
+ int i, imm;
+
+ if ((ins->inst_imm == 1) && (ins->sreg1 == ins->dreg))
+ break;
+
+ /* Transform multiplication into a shift */
+ for (i = 0; i < 30; ++i) {
+ imm = (1 << i);
+ if (ins->inst_imm == imm)
+ break;
+ }
+ if (i < 30)
+ sparc_sll_imm (code, ins->sreg1, i, ins->dreg);
+ else
+ EMIT_ALU_IMM (ins, smul, FALSE);
break;
+ }
case CEE_MUL_OVF:
- /* FIXME: this isn't right, I don't think */
- sparc_smul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
+ case OP_IMUL_OVF:
+ sparc_smul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
+ sparc_rdy (code, sparc_g1);
+ sparc_sra_imm (code, ins->dreg, 31, sparc_o7);
+ sparc_cmp (code, sparc_g1, sparc_o7);
+ EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
break;
case CEE_MUL_OVF_UN:
- /* FIXME: This isn't right either */
- sparc_umul (code, FALSE, ins->sreg1, ins->sreg2, ins->dreg);
+ case OP_IMUL_OVF_UN:
+ sparc_umul (code, TRUE, ins->sreg1, ins->sreg2, ins->dreg);
+ sparc_rdy (code, sparc_o7);
+ sparc_cmp (code, sparc_o7, sparc_g0);
+ EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, sparc_bne, "OverflowException", TRUE, sparc_icc_short);
break;
case OP_ICONST:
case OP_SETREGIMM:
sparc_set (code, ins->inst_c0, ins->dreg);
break;
- /*case OP_CLASS:
- mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_CLASS, (gpointer)ins->inst_c0);
+ case OP_I8CONST:
+ sparc_set (code, ins->inst_l, ins->dreg);
+ break;
+ case OP_AOTCONST:
+ mono_add_patch_info (cfg, offset, (MonoJumpInfoType)ins->inst_i1, ins->inst_p0);
+ sparc_set_template (code, ins->dreg);
break;
- case OP_IMAGE:
- mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_IMAGE, (gpointer)ins->inst_c0);
- break;*/
case CEE_CONV_I4:
case CEE_CONV_U4:
case OP_MOVE:
case OP_SETREG:
- sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
+ if (ins->sreg1 != ins->dreg)
+ sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
+ break;
+ case OP_SETFREG:
+ /* Only used on V9 */
+ if (ins->sreg1 != ins->dreg)
+ sparc_fmovd (code, ins->sreg1, ins->dreg);
+ break;
+ case OP_SPARC_SETFREG_FLOAT:
+ /* Only used on V9 */
+ sparc_fdtos (code, ins->sreg1, ins->dreg);
break;
case CEE_JMP:
- g_assert_not_reached ();
- /*
- * Copied roughly from x86. Probably doesn't work
- */
-
- if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
- code = mono_arch_instrument_epilog (cfg, mono_profiler_method_leave, code, FALSE);
- /* reset offset to make max_len work */
- offset = code - cfg->native_code;
-
- g_assert (!cfg->method->save_lmf);
-
- offset = code - cfg->native_code;
- mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
- sparc_jmp_imm (code, sparc_g0, 0);
+ if (cfg->method->save_lmf)
+ NOT_IMPLEMENTED;
+ code = emit_load_volatile_arguments (cfg, code);
+ mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_METHOD_JUMP, ins->inst_p0);
+ sparc_set_template (code, sparc_o7);
+ sparc_jmpl (code, sparc_o7, sparc_g0, sparc_g0);
+ /* Restore parent frame in delay slot */
+ sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
break;
case OP_CHECK_THIS:
/* ensure ins->sreg1 is not NULL */
- sparc_cmp_imm (code, ins->sreg1, 0);
+ sparc_ld_imm (code, ins->sreg1, 0, sparc_g0);
+ break;
+ case OP_ARGLIST:
+ sparc_add_imm (code, FALSE, sparc_fp, cfg->sig_cookie, sparc_o7);
+ sparc_sti_imm (code, sparc_o7, ins->sreg1, 0);
break;
case OP_FCALL:
case OP_LCALL:
case OP_VOIDCALL:
case CEE_CALL:
call = (MonoCallInst*)ins;
+ g_assert (!call->virtual);
+ code = emit_save_sp_to_lmf (cfg, code);
if (ins->flags & MONO_INST_HAS_METHOD)
- mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_METHOD, call->method);
+ code = emit_call (cfg, code, MONO_PATCH_INFO_METHOD, call->method);
else
- mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_ABS, call->fptr);
- sparc_call_simple (code, 0);
+ code = emit_call (cfg, code, MONO_PATCH_INFO_ABS, call->fptr);
+
+ code = emit_vret_token (ins, code);
+ code = emit_move_return_value (ins, code);
break;
case OP_FCALL_REG:
case OP_LCALL_REG:
case OP_VOIDCALL_REG:
case OP_CALL_REG:
call = (MonoCallInst*)ins;
- sparc_call (code, ins->sreg1, sparc_g0);
- /* FIXME: yea, a store in g0 is a GOOD IDEA */
- if (call->stack_usage && (call->signature->call_convention != MONO_CALL_STDCALL))
- sparc_add_imm (code, FALSE, sparc_sp, call->stack_usage, sparc_g0);
+ code = emit_save_sp_to_lmf (cfg, code);
+ sparc_jmpl (code, ins->sreg1, sparc_g0, sparc_callsite);
+ /*
+ * We emit a special kind of nop in the delay slot to tell the
+ * trampoline code that this is a virtual call, thus an unbox
+ * trampoline might need to be called.
+ */
+ if (call->virtual)
+ sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
+ else
+ sparc_nop (code);
+
+ code = emit_vret_token (ins, code);
+ code = emit_move_return_value (ins, code);
break;
case OP_FCALL_MEMBASE:
case OP_LCALL_MEMBASE:
case OP_VOIDCALL_MEMBASE:
case OP_CALL_MEMBASE:
call = (MonoCallInst*)ins;
- sparc_call_imm (code, ins->sreg1, ins->inst_offset);
- /* FIXME: yea, a store in g0 is a GOOD IDEA */
- if (call->stack_usage && (call->signature->call_convention != MONO_CALL_STDCALL))
- sparc_add_imm (code, FALSE, sparc_sp, call->stack_usage, sparc_g0);
- break;
+ g_assert (sparc_is_imm13 (ins->inst_offset));
+ code = emit_save_sp_to_lmf (cfg, code);
+ sparc_ldi_imm (code, ins->inst_basereg, ins->inst_offset, sparc_o7);
+ sparc_jmpl (code, sparc_o7, sparc_g0, sparc_callsite);
+ if (call->virtual)
+ sparc_or_imm (code, FALSE, sparc_g0, 0xca, sparc_g0);
+ else
+ sparc_nop (code);
+ code = emit_vret_token (ins, code);
+ code = emit_move_return_value (ins, code);
+ break;
+ case OP_SETFRET:
+ if (mono_method_signature (cfg->method)->ret->type == MONO_TYPE_R4)
+ sparc_fdtos (code, ins->sreg1, sparc_f0);
+ else {
+#ifdef SPARCV9
+ sparc_fmovd (code, ins->sreg1, ins->dreg);
+#else
+ /* FIXME: Why not use fmovd ? */
+ sparc_fmovs (code, ins->sreg1, ins->dreg);
+ sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
+#endif
+ }
break;
case OP_OUTARG:
- /* FIXME: This can be SO far wrong! */
- sparc_st (code, ins->sreg1, sparc_g0, sparc_sp);
- sparc_sub_imm (code, FALSE, sparc_sp, 4, sparc_sp);
- break;
- case OP_LOCALLOC:
- /* keep alignment */
-#define MONO_FRAME_ALIGNMENT 32
- sparc_add_imm (code, 0, ins->sreg1, MONO_FRAME_ALIGNMENT-1, sparc_o7);
- //ppc_rlwinm (code, sparc_l0, sparc_l0, 0, 0, 27);
- //ppc_lwz (code, sparc_l0, 0, ppc_sp);
- // Fix semantics to negate to another reg? FIXME
- //sparc_neg (code, sparc_l0, sparc_l0);
- //ppc_stwux (code, ppc_sp, sparc_l0, ppc_sp);
- //ppc_mr (code, ins->dreg, ppc_sp);
g_assert_not_reached ();
break;
+ case OP_LOCALLOC: {
+ guint32 size_reg;
+
+#ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
+ /* Perform stack touching */
+ NOT_IMPLEMENTED;
+#endif
+
+ /* Keep alignment */
+ sparc_add_imm (code, FALSE, ins->sreg1, MONO_ARCH_FRAME_ALIGNMENT - 1, ins->dreg);
+ sparc_set (code, ~(MONO_ARCH_FRAME_ALIGNMENT - 1), sparc_o7);
+ sparc_and (code, FALSE, ins->dreg, sparc_o7, ins->dreg);
+
+ if ((ins->flags & MONO_INST_INIT) && (ins->sreg1 == ins->dreg)) {
+#ifdef SPARCV9
+ size_reg = sparc_g4;
+#else
+ size_reg = sparc_g1;
+#endif
+ sparc_mov_reg_reg (code, ins->dreg, size_reg);
+ }
+ else
+ size_reg = ins->sreg1;
+
+ sparc_sub (code, FALSE, sparc_sp, ins->dreg, ins->dreg);
+ /* Keep %sp valid at all times */
+ sparc_mov_reg_reg (code, ins->dreg, sparc_sp);
+ g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset));
+ sparc_add_imm (code, FALSE, ins->dreg, MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset, ins->dreg);
+
+ if (ins->flags & MONO_INST_INIT) {
+ guint32 *br [3];
+ /* Initialize memory region */
+ sparc_cmp_imm (code, size_reg, 0);
+ br [0] = code;
+ sparc_branch (code, 0, sparc_be, 0);
+ /* delay slot */
+ sparc_set (code, 0, sparc_o7);
+ sparc_sub_imm (code, 0, size_reg, sparcv9 ? 8 : 4, size_reg);
+ /* start of loop */
+ br [1] = code;
+ if (sparcv9)
+ sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
+ else
+ sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
+ sparc_cmp (code, sparc_o7, size_reg);
+ br [2] = code;
+ sparc_branch (code, 0, sparc_bl, 0);
+ sparc_patch (br [2], br [1]);
+ /* delay slot */
+ sparc_add_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
+ sparc_patch (br [0], code);
+ }
+ break;
+ }
+ case OP_SPARC_LOCALLOC_IMM: {
+ gint32 offset = ins->inst_c0;
+
+#ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
+ /* Perform stack touching */
+ NOT_IMPLEMENTED;
+#endif
+
+ offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
+ if (sparc_is_imm13 (offset))
+ sparc_sub_imm (code, FALSE, sparc_sp, offset, sparc_sp);
+ else {
+ sparc_set (code, offset, sparc_o7);
+ sparc_sub (code, FALSE, sparc_sp, sparc_o7, sparc_sp);
+ }
+ g_assert (sparc_is_imm13 (MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset));
+ sparc_add_imm (code, FALSE, sparc_sp, MONO_SPARC_STACK_BIAS + cfg->arch.localloc_offset, ins->dreg);
+ if ((ins->flags & MONO_INST_INIT) && (offset > 0)) {
+ guint32 *br [2];
+ int i;
+
+ if (offset <= 16) {
+ i = 0;
+ while (i < offset) {
+ if (sparcv9) {
+ sparc_stx_imm (code, sparc_g0, ins->dreg, i);
+ i += 8;
+ }
+ else {
+ sparc_st_imm (code, sparc_g0, ins->dreg, i);
+ i += 4;
+ }
+ }
+ }
+ else {
+ sparc_set (code, offset, sparc_o7);
+ sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
+ /* beginning of loop */
+ br [0] = code;
+ if (sparcv9)
+ sparc_stx (code, sparc_g0, ins->dreg, sparc_o7);
+ else
+ sparc_st (code, sparc_g0, ins->dreg, sparc_o7);
+ sparc_cmp_imm (code, sparc_o7, 0);
+ br [1] = code;
+ sparc_branch (code, 0, sparc_bne, 0);
+ /* delay slot */
+ sparc_sub_imm (code, 0, sparc_o7, sparcv9 ? 8 : 4, sparc_o7);
+ sparc_patch (br [1], br [0]);
+ }
+ }
+ break;
+ }
case CEE_RET:
- sparc_ret (code);
+ /* The return is done in the epilog */
+ g_assert_not_reached ();
break;
- case CEE_THROW: {
- sparc_mov_reg_reg (code, ins->sreg1, sparc_sp);
- mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
- (gpointer)"throw_exception");
- sparc_call_simple (code, 0);
+ case CEE_THROW:
+ sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
+ mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
+ (gpointer)"mono_arch_throw_exception");
+ EMIT_CALL ();
+ break;
+ case OP_RETHROW:
+ sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
+ mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
+ (gpointer)"mono_arch_rethrow_exception");
+ EMIT_CALL ();
+ break;
+ case OP_START_HANDLER: {
+ /*
+ * The START_HANDLER instruction marks the beginning of a handler
+ * block. It is called using a call instruction, so %o7 contains
+ * the return address. Since the handler executes in the same stack
+ * frame as the method itself, we can't use save/restore to save
+ * the return address. Instead, we save it into a dedicated
+ * variable.
+ */
+ MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
+ if (!sparc_is_imm13 (spvar->inst_offset)) {
+ sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
+ sparc_sti (code, sparc_o7, spvar->inst_basereg, GP_SCRATCH_REG);
+ }
+ else
+ sparc_sti_imm (code, sparc_o7, spvar->inst_basereg, spvar->inst_offset);
break;
}
- case OP_ENDFILTER:
- if (ins->sreg1 != sparc_sp)
- sparc_mov_reg_reg (code, ins->sreg1, sparc_sp);
- sparc_ret (code);
+ case OP_ENDFILTER: {
+ MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
+ if (!sparc_is_imm13 (spvar->inst_offset)) {
+ sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
+ sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
+ }
+ else
+ sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
+ sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
+ /* Delay slot */
+ sparc_mov_reg_reg (code, ins->sreg1, sparc_o0);
break;
- case CEE_ENDFINALLY:
- sparc_ret (code);
+ }
+ case CEE_ENDFINALLY: {
+ MonoInst *spvar = mono_find_spvar_for_region (cfg, bb->region);
+ if (!sparc_is_imm13 (spvar->inst_offset)) {
+ sparc_set (code, spvar->inst_offset, GP_SCRATCH_REG);
+ sparc_ldi (code, spvar->inst_basereg, GP_SCRATCH_REG, sparc_o7);
+ }
+ else
+ sparc_ldi_imm (code, spvar->inst_basereg, spvar->inst_offset, sparc_o7);
+ sparc_jmpl_imm (code, sparc_o7, 8, sparc_g0);
+ sparc_nop (code);
break;
+ }
case OP_CALL_HANDLER:
- mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_target_bb);
+ mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
+ /* This is a jump inside the method, so call_simple works even on V9 */
sparc_call_simple (code, 0);
+ sparc_nop (code);
break;
case OP_LABEL:
- ins->inst_c0 = code - cfg->native_code;
+ ins->inst_c0 = (guint8*)code - cfg->native_code;
break;
case CEE_BR:
//g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
- //if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
- //break;
+ if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
+ break;
if (ins->flags & MONO_INST_BRLABEL) {
if (ins->inst_i0->inst_c0) {
- sparc_call_simple (code, 0);
+ gint32 disp = (ins->inst_i0->inst_c0 - ((guint8*)code - cfg->native_code)) >> 2;
+ g_assert (sparc_is_imm22 (disp));
+ sparc_branch (code, 1, sparc_ba, disp);
} else {
mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_LABEL, ins->inst_i0);
- sparc_call_simple (code, 0);
+ sparc_branch (code, 1, sparc_ba, 0);
}
} else {
if (ins->inst_target_bb->native_offset) {
- sparc_call_simple (code, 0);
+ gint32 disp = (ins->inst_target_bb->native_offset - ((guint8*)code - cfg->native_code)) >> 2;
+ g_assert (sparc_is_imm22 (disp));
+ sparc_branch (code, 1, sparc_ba, disp);
} else {
mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_BB, ins->inst_target_bb);
- sparc_call_simple (code, 0);
+ sparc_branch (code, 1, sparc_ba, 0);
}
}
+ sparc_nop (code);
break;
case OP_BR_REG:
sparc_jmp (code, ins->sreg1, sparc_g0);
+ sparc_nop (code);
break;
case OP_CEQ:
- //ppc_li (code, ins->dreg, 0);
- //ppc_bc (code, PPC_BR_FALSE, PPC_BR_EQ, 2);
- //ppc_li (code, ins->dreg, 1);
- break;
case OP_CLT:
case OP_CLT_UN:
- //ppc_li (code, ins->dreg, 1);
- //ppc_bc (code, PPC_BR_TRUE, PPC_BR_LT, 2);
- //ppc_li (code, ins->dreg, 0);
- break;
case OP_CGT:
case OP_CGT_UN:
- //ppc_li (code, ins->dreg, 1);
- //ppc_bc (code, PPC_BR_TRUE, PPC_BR_LT, 2);
- //ppc_li (code, ins->dreg, 0);
+ if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
+ sparc_clr_reg (code, ins->dreg);
+ sparc_movcc_imm (code, sparc_xcc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
+ }
+ else {
+ sparc_clr_reg (code, ins->dreg);
+#ifdef SPARCV9
+ sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), DEFAULT_ICC, 0, 2);
+#else
+ sparc_branch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
+#endif
+ /* delay slot */
+ sparc_set (code, 1, ins->dreg);
+ }
break;
+ case OP_ICEQ:
+ case OP_ICLT:
+ case OP_ICLT_UN:
+ case OP_ICGT:
+ case OP_ICGT_UN:
+ if (v64 && (cfg->opt & MONO_OPT_CMOV)) {
+ sparc_clr_reg (code, ins->dreg);
+ sparc_movcc_imm (code, sparc_icc, opcode_to_sparc_cond (ins->opcode), 1, ins->dreg);
+ }
+ else {
+ sparc_clr_reg (code, ins->dreg);
+ sparc_branchp (code, 1, opcode_to_sparc_cond (ins->opcode), sparc_icc_short, 0, 2);
+ /* delay slot */
+ sparc_set (code, 1, ins->dreg);
+ }
+ break;
case OP_COND_EXC_EQ:
case OP_COND_EXC_NE_UN:
case OP_COND_EXC_LT:
case OP_COND_EXC_NO:
case OP_COND_EXC_C:
case OP_COND_EXC_NC:
- //EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table [ins->opcode - OP_COND_EXC_EQ],
- // (ins->opcode < OP_COND_EXC_NE_UN), ins->inst_p1);
+ EMIT_COND_SYSTEM_EXCEPTION (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1);
+ break;
+ case OP_SPARC_COND_EXC_EQZ:
+ EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brz, ins->inst_p1);
+ break;
+ case OP_SPARC_COND_EXC_GEZ:
+ EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgez, ins->inst_p1);
+ break;
+ case OP_SPARC_COND_EXC_GTZ:
+ EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brgz, ins->inst_p1);
+ break;
+ case OP_SPARC_COND_EXC_LEZ:
+ EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlez, ins->inst_p1);
+ break;
+ case OP_SPARC_COND_EXC_LTZ:
+ EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brlz, ins->inst_p1);
+ break;
+ case OP_SPARC_COND_EXC_NEZ:
+ EMIT_COND_SYSTEM_EXCEPTION_BPR (ins, brnz, ins->inst_p1);
+ break;
+ case OP_COND_EXC_IOV:
+ case OP_COND_EXC_IC:
+ EMIT_COND_SYSTEM_EXCEPTION_GENERAL (ins, opcode_to_sparc_cond (ins->opcode), ins->inst_p1, TRUE, sparc_icc_short);
break;
case CEE_BEQ:
case CEE_BNE_UN:
case CEE_BGE:
case CEE_BGE_UN:
case CEE_BLE:
- case CEE_BLE_UN:
- EMIT_COND_BRANCH (ins, ins->opcode - CEE_BEQ);
+ case CEE_BLE_UN: {
+ if (sparcv9)
+ EMIT_COND_BRANCH_PREDICTED (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
+ else
+ EMIT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
+ break;
+ }
+
+ case OP_IBEQ:
+ case OP_IBNE_UN:
+ case OP_IBLT:
+ case OP_IBLT_UN:
+ case OP_IBGT:
+ case OP_IBGT_UN:
+ case OP_IBGE:
+ case OP_IBGE_UN:
+ case OP_IBLE:
+ case OP_IBLE_UN: {
+ /* Only used on V9 */
+ EMIT_COND_BRANCH_ICC (ins, opcode_to_sparc_cond (ins->opcode), 1, 1, sparc_icc_short);
+ break;
+ }
+
+ case OP_SPARC_BRZ:
+ EMIT_COND_BRANCH_BPR (ins, brz, 1, 1, 1);
+ break;
+ case OP_SPARC_BRLEZ:
+ EMIT_COND_BRANCH_BPR (ins, brlez, 1, 1, 1);
+ break;
+ case OP_SPARC_BRLZ:
+ EMIT_COND_BRANCH_BPR (ins, brlz, 1, 1, 1);
+ break;
+ case OP_SPARC_BRNZ:
+ EMIT_COND_BRANCH_BPR (ins, brnz, 1, 1, 1);
+ break;
+ case OP_SPARC_BRGZ:
+ EMIT_COND_BRANCH_BPR (ins, brgz, 1, 1, 1);
+ break;
+ case OP_SPARC_BRGEZ:
+ EMIT_COND_BRANCH_BPR (ins, brgez, 1, 1, 1);
break;
/* floating point opcodes */
case OP_R8CONST:
- //ppc_load (code, sparc_l0, ins->inst_p0);
- //ppc_lfd (code, ins->dreg, 0, sparc_l0);
+ mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R8, ins->inst_p0);
+#ifdef SPARCV9
+ sparc_set_template (code, sparc_o7);
+#else
+ sparc_sethi (code, 0, sparc_o7);
+#endif
+ sparc_lddf_imm (code, sparc_o7, 0, ins->dreg);
break;
case OP_R4CONST:
- //ppc_load (code, sparc_l0, ins->inst_p0);
- //ppc_lfs (code, ins->dreg, 0, sparc_l0);
+ mono_add_patch_info (cfg, offset, MONO_PATCH_INFO_R4, ins->inst_p0);
+#ifdef SPARCV9
+ sparc_set_template (code, sparc_o7);
+#else
+ sparc_sethi (code, 0, sparc_o7);
+#endif
+ sparc_ldf_imm (code, sparc_o7, 0, FP_SCRATCH_REG);
+
+ /* Extend to double */
+ sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
break;
case OP_STORER8_MEMBASE_REG:
- //ppc_stfd (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
+ if (!sparc_is_imm13 (ins->inst_offset + 4)) {
+ sparc_set (code, ins->inst_offset, sparc_o7);
+ /* SPARCV9 handles misaligned fp loads/stores */
+ if (!v64 && (ins->inst_offset % 8)) {
+ /* Misaligned */
+ sparc_add (code, FALSE, ins->inst_destbasereg, sparc_o7, sparc_o7);
+ sparc_stf (code, ins->sreg1, sparc_o7, sparc_g0);
+ sparc_stf_imm (code, ins->sreg1 + 1, sparc_o7, 4);
+ } else
+ sparc_stdf (code, ins->sreg1, ins->inst_destbasereg, sparc_o7);
+ }
+ else {
+ if (!v64 && (ins->inst_offset % 8)) {
+ /* Misaligned */
+ sparc_stf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
+ sparc_stf_imm (code, ins->sreg1 + 1, ins->inst_destbasereg, ins->inst_offset + 4);
+ } else
+ sparc_stdf_imm (code, ins->sreg1, ins->inst_destbasereg, ins->inst_offset);
+ }
break;
case OP_LOADR8_MEMBASE:
- //ppc_lfd (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
+ EMIT_LOAD_MEMBASE (ins, lddf);
break;
case OP_STORER4_MEMBASE_REG:
- //ppc_stfs (code, ins->sreg1, ins->inst_offset, ins->inst_destbasereg);
+ /* This requires a double->single conversion */
+ sparc_fdtos (code, ins->sreg1, FP_SCRATCH_REG);
+ if (!sparc_is_imm13 (ins->inst_offset)) {
+ sparc_set (code, ins->inst_offset, sparc_o7);
+ sparc_stf (code, FP_SCRATCH_REG, ins->inst_destbasereg, sparc_o7);
+ }
+ else
+ sparc_stf_imm (code, FP_SCRATCH_REG, ins->inst_destbasereg, ins->inst_offset);
break;
- case OP_LOADR4_MEMBASE:
- //ppc_lfs (code, ins->dreg, ins->inst_offset, ins->inst_basereg);
+ case OP_LOADR4_MEMBASE: {
+ /* ldf needs a single precision register */
+ int dreg = ins->dreg;
+ ins->dreg = FP_SCRATCH_REG;
+ EMIT_LOAD_MEMBASE (ins, ldf);
+ ins->dreg = dreg;
+ /* Extend to double */
+ sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
break;
- case CEE_CONV_R4: /* FIXME: change precision */
- case CEE_CONV_R8:
- g_assert_not_reached ();
- //x86_push_reg (code, ins->sreg1);
- //x86_fild_membase (code, X86_ESP, 0, FALSE);
- //x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);
+ }
+ case OP_FMOVE:
+#ifdef SPARCV9
+ sparc_fmovd (code, ins->sreg1, ins->dreg);
+#else
+ sparc_fmovs (code, ins->sreg1, ins->dreg);
+ sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
+#endif
break;
- case OP_X86_FP_LOAD_I8:
- g_assert_not_reached ();
- //x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, TRUE);
+ case CEE_CONV_R4: {
+ gint32 offset = mono_spillvar_offset_float (cfg, 0);
+ if (!sparc_is_imm13 (offset))
+ NOT_IMPLEMENTED;
+#ifdef SPARCV9
+ sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
+ sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
+ sparc_fxtos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
+#else
+ sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
+ sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
+ sparc_fitos (code, FP_SCRATCH_REG, FP_SCRATCH_REG);
+#endif
+ sparc_fstod (code, FP_SCRATCH_REG, ins->dreg);
break;
- case OP_X86_FP_LOAD_I4:
- g_assert_not_reached ();
- //x86_fild_membase (code, ins->inst_basereg, ins->inst_offset, FALSE);
+ }
+ case CEE_CONV_R8: {
+ gint32 offset = mono_spillvar_offset_float (cfg, 0);
+ if (!sparc_is_imm13 (offset))
+ NOT_IMPLEMENTED;
+#ifdef SPARCV9
+ sparc_stx_imm (code, ins->sreg1, sparc_sp, offset);
+ sparc_lddf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
+ sparc_fxtod (code, FP_SCRATCH_REG, ins->dreg);
+#else
+ sparc_st_imm (code, ins->sreg1, sparc_sp, offset);
+ sparc_ldf_imm (code, sparc_sp, offset, FP_SCRATCH_REG);
+ sparc_fitod (code, FP_SCRATCH_REG, ins->dreg);
+#endif
break;
+ }
case OP_FCONV_TO_I1:
- g_assert_not_reached ();
- code = emit_float_to_int (cfg, code, ins->dreg, 1, TRUE);
- break;
case OP_FCONV_TO_U1:
- g_assert_not_reached ();
- code = emit_float_to_int (cfg, code, ins->dreg, 1, FALSE);
- break;
case OP_FCONV_TO_I2:
- g_assert_not_reached ();
- code = emit_float_to_int (cfg, code, ins->dreg, 2, TRUE);
- break;
case OP_FCONV_TO_U2:
- g_assert_not_reached ();
- code = emit_float_to_int (cfg, code, ins->dreg, 2, FALSE);
- break;
- case OP_FCONV_TO_I4:
+#ifndef SPARCV9
case OP_FCONV_TO_I:
- g_assert_not_reached ();
- code = emit_float_to_int (cfg, code, ins->dreg, 4, TRUE);
- break;
- case OP_FCONV_TO_U4:
case OP_FCONV_TO_U:
- g_assert_not_reached ();
- code = emit_float_to_int (cfg, code, ins->dreg, 4, FALSE);
+#endif
+ case OP_FCONV_TO_I4:
+ case OP_FCONV_TO_U4: {
+ gint32 offset = mono_spillvar_offset_float (cfg, 0);
+ if (!sparc_is_imm13 (offset))
+ NOT_IMPLEMENTED;
+ sparc_fdtoi (code, ins->sreg1, FP_SCRATCH_REG);
+ sparc_stdf_imm (code, FP_SCRATCH_REG, sparc_sp, offset);
+ sparc_ld_imm (code, sparc_sp, offset, ins->dreg);
+
+ switch (ins->opcode) {
+ case OP_FCONV_TO_I1:
+ case OP_FCONV_TO_U1:
+ sparc_and_imm (code, 0, ins->dreg, 0xff, ins->dreg);
+ break;
+ case OP_FCONV_TO_I2:
+ case OP_FCONV_TO_U2:
+ sparc_set (code, 0xffff, sparc_o7);
+ sparc_and (code, 0, ins->dreg, sparc_o7, ins->dreg);
+ break;
+ default:
+ break;
+ }
break;
+ }
case OP_FCONV_TO_I8:
case OP_FCONV_TO_U8:
+ /* Emulated */
+ g_assert_not_reached ();
+ break;
+ case CEE_CONV_R_UN:
+ /* Emulated */
g_assert_not_reached ();
- /*x86_alu_reg_imm (code, X86_SUB, X86_ESP, 4);
- x86_fnstcw_membase(code, X86_ESP, 0);
- x86_mov_reg_membase (code, ins->inst_dreg_low, X86_ESP, 0, 2);
- x86_alu_reg_imm (code, X86_OR, ins->inst_dreg_low, 0xc00);
- x86_mov_membase_reg (code, X86_ESP, 2, ins->inst_dreg_low, 2);
- x86_fldcw_membase (code, X86_ESP, 2);
- x86_alu_reg_imm (code, X86_SUB, X86_ESP, 8);
- x86_fist_pop_membase (code, X86_ESP, 0, TRUE);
- x86_pop_reg (code, ins->inst_dreg_low);
- x86_pop_reg (code, ins->inst_dreg_high);
- x86_fldcw_membase (code, X86_ESP, 0);
- x86_alu_reg_imm (code, X86_ADD, X86_ESP, 4);*/
break;
case OP_LCONV_TO_R_UN: {
-#if 0
- static guint8 mn[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x40 };
- guint8 *br;
-
- /* load 64bit integer to FP stack */
- x86_push_imm (code, 0);
- x86_push_reg (code, ins->sreg2);
- x86_push_reg (code, ins->sreg1);
- x86_fild_membase (code, X86_ESP, 0, TRUE);
- /* store as 80bit FP value */
- x86_fst80_membase (code, X86_ESP, 0);
-
- /* test if lreg is negative */
- x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
- br = code; x86_branch8 (code, X86_CC_GEZ, 0, TRUE);
-
- /* add correction constant mn */
- x86_fld80_mem (code, mn);
- x86_fld80_membase (code, X86_ESP, 0);
- x86_fp_op_reg (code, X86_FADD, 1, TRUE);
- x86_fst80_membase (code, X86_ESP, 0);
-
- x86_patch (br, code);
-
- x86_fld80_membase (code, X86_ESP, 0);
- x86_alu_reg_imm (code, X86_ADD, X86_ESP, 12);
-#endif
+ /* Emulated */
g_assert_not_reached ();
break;
}
case OP_LCONV_TO_OVF_I: {
-#if 0
- guint8 *br [3], *label [1];
+ guint32 *br [3], *label [1];
/*
* Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
*/
- x86_test_reg_reg (code, ins->sreg1, ins->sreg1);
+ sparc_cmp_imm (code, ins->sreg1, 0);
+ br [0] = code;
+ sparc_branch (code, 1, sparc_bneg, 0);
+ sparc_nop (code);
+
+ /* positive */
+ /* ms word must be 0 */
+ sparc_cmp_imm (code, ins->sreg2, 0);
+ br [1] = code;
+ sparc_branch (code, 1, sparc_be, 0);
+ sparc_nop (code);
- /* If the low word top bit is set, see if we are negative */
- br [0] = code; x86_branch8 (code, X86_CC_LT, 0, TRUE);
- /* We are not negative (no top bit set, check for our top word to be zero */
- x86_test_reg_reg (code, ins->sreg2, ins->sreg2);
- br [1] = code; x86_branch8 (code, X86_CC_EQ, 0, TRUE);
label [0] = code;
- /* throw exception */
- mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_EXC, "OverflowException");
- x86_jump32 (code, 0);
-
- x86_patch (br [0], code);
- /* our top bit is set, check that top word is 0xfffffff */
- x86_alu_reg_imm (code, X86_CMP, ins->sreg2, 0xffffffff);
-
- x86_patch (br [1], code);
- /* nope, emit exception */
- br [2] = code; x86_branch8 (code, X86_CC_NE, 0, TRUE);
- x86_patch (br [2], label [0]);
+ EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_ba, "OverflowException");
- if (ins->dreg != ins->sreg1)
- x86_mov_reg_reg (code, ins->dreg, ins->sreg1, 4);
-#endif
- g_assert_not_reached ();
+ /* negative */
+ sparc_patch (br [0], code);
+
+ /* ms word must 0xfffffff */
+ sparc_cmp_imm (code, ins->sreg2, -1);
+ br [2] = code;
+ sparc_branch (code, 1, sparc_bne, 0);
+ sparc_nop (code);
+ sparc_patch (br [2], label [0]);
+
+ /* Ok */
+ sparc_patch (br [1], code);
+ if (ins->sreg1 != ins->dreg)
+ sparc_mov_reg_reg (code, ins->sreg1, ins->dreg);
break;
}
case OP_FADD:
- sparc_fadds( code, ins->sreg1, ins->sreg2, ins->dreg);
+ sparc_faddd (code, ins->sreg1, ins->sreg2, ins->dreg);
break;
case OP_FSUB:
- sparc_fsubs( code, ins->sreg1, ins->sreg2, ins->dreg );
+ sparc_fsubd (code, ins->sreg1, ins->sreg2, ins->dreg);
break;
case OP_FMUL:
- sparc_fmuls( code, ins->sreg1, ins->sreg2, ins->dreg );
+ sparc_fmuld (code, ins->sreg1, ins->sreg2, ins->dreg);
break;
case OP_FDIV:
- sparc_fdivs( code, ins->sreg1, ins->sreg2, ins->dreg );
+ sparc_fdivd (code, ins->sreg1, ins->sreg2, ins->dreg);
break;
case OP_FNEG:
- sparc_fnegs( code, ins->sreg1, ins->sreg2, ins->dreg );
+#ifdef SPARCV9
+ sparc_fnegd (code, ins->sreg1, ins->dreg);
+#else
+ /* FIXME: why don't use fnegd ? */
+ sparc_fnegs (code, ins->sreg1, ins->dreg);
+#endif
break;
case OP_FREM:
- g_assert_not_reached ();
+ sparc_fdivd (code, ins->sreg1, ins->sreg2, FP_SCRATCH_REG);
+ sparc_fmuld (code, ins->sreg2, FP_SCRATCH_REG, FP_SCRATCH_REG);
+ sparc_fsubd (code, ins->sreg1, FP_SCRATCH_REG, ins->dreg);
break;
case OP_FCOMPARE:
- sparc_fcmps( code, ins->sreg1, ins->sreg2 );
- /* this overwrites EAX */
- //EMIT_FPCOMPARE(code);
+ sparc_fcmpd (code, ins->sreg1, ins->sreg2);
break;
case OP_FCEQ:
- g_assert_not_reached();
- /*if (ins->dreg != X86_EAX)
- x86_push_reg (code, X86_EAX);
-
- EMIT_FPCOMPARE(code);
- x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x4000);
- x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
- x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
-
- if (ins->dreg != X86_EAX)
- x86_pop_reg (code, X86_EAX);*/
- break;
case OP_FCLT:
case OP_FCLT_UN:
- g_assert_not_reached ();
- /*if (ins->dreg != X86_EAX)
- x86_push_reg (code, X86_EAX);
-
- EMIT_FPCOMPARE(code);
- x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
- x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
-
- if (ins->dreg != X86_EAX)
- x86_pop_reg (code, X86_EAX);*/
- break;
case OP_FCGT:
case OP_FCGT_UN:
- g_assert_not_reached ();
- /*if (ins->dreg != X86_EAX)
- x86_push_reg (code, X86_EAX);
-
- EMIT_FPCOMPARE(code);
- x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x0100);
- x86_set_reg (code, X86_CC_EQ, ins->dreg, TRUE);
- x86_widen_reg (code, ins->dreg, ins->dreg, FALSE, FALSE);
-
- if (ins->dreg != X86_EAX)
- x86_pop_reg (code, X86_EAX);*/
+ sparc_fcmpd (code, ins->sreg1, ins->sreg2);
+ sparc_clr_reg (code, ins->dreg);
+ switch (ins->opcode) {
+ case OP_FCLT_UN:
+ case OP_FCGT_UN:
+ sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 4);
+ /* delay slot */
+ sparc_set (code, 1, ins->dreg);
+ sparc_fbranch (code, 1, sparc_fbu, 2);
+ /* delay slot */
+ sparc_set (code, 1, ins->dreg);
+ break;
+ default:
+ sparc_fbranch (code, 1, opcode_to_sparc_cond (ins->opcode), 2);
+ /* delay slot */
+ sparc_set (code, 1, ins->dreg);
+ }
break;
case OP_FBEQ:
- g_assert_not_reached ();
+ case OP_FBLT:
+ case OP_FBGT:
+ EMIT_FLOAT_COND_BRANCH (ins, opcode_to_sparc_cond (ins->opcode), 1, 1);
+ break;
+ case OP_FBGE: {
+ /* clt.un + brfalse */
+ guint32 *p = code;
+ sparc_fbranch (code, 1, sparc_fbul, 0);
+ /* delay slot */
+ sparc_nop (code);
+ EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
+ sparc_patch (p, (guint8*)code);
break;
+ }
+ case OP_FBLE: {
+ /* cgt.un + brfalse */
+ guint32 *p = code;
+ sparc_fbranch (code, 1, sparc_fbug, 0);
+ /* delay slot */
+ sparc_nop (code);
+ EMIT_FLOAT_COND_BRANCH (ins, sparc_fba, 1, 1);
+ sparc_patch (p, (guint8*)code);
+ break;
+ }
case OP_FBNE_UN:
- g_assert_not_reached ();
+ EMIT_FLOAT_COND_BRANCH (ins, sparc_fbne, 1, 1);
+ EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
break;
- case OP_FBLT:
case OP_FBLT_UN:
- g_assert_not_reached ();
+ EMIT_FLOAT_COND_BRANCH (ins, sparc_fbl, 1, 1);
+ EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
break;
- case OP_FBGT:
case OP_FBGT_UN:
- g_assert_not_reached ();
+ EMIT_FLOAT_COND_BRANCH (ins, sparc_fbg, 1, 1);
+ EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
break;
- case OP_FBGE:
case OP_FBGE_UN:
- g_assert_not_reached ();
+ EMIT_FLOAT_COND_BRANCH (ins, sparc_fbge, 1, 1);
+ EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
break;
- case OP_FBLE:
case OP_FBLE_UN:
- g_assert_not_reached ();
+ EMIT_FLOAT_COND_BRANCH (ins, sparc_fble, 1, 1);
+ EMIT_FLOAT_COND_BRANCH (ins, sparc_fbu, 1, 1);
break;
case CEE_CKFINITE: {
- /* SO FIXME */
- g_assert_not_reached ();
- //x86_push_reg (code, X86_EAX);
- //x86_fxam (code);
- //x86_fnstsw (code);
- //x86_alu_reg_imm (code, X86_AND, X86_EAX, 0x4100);
- //x86_alu_reg_imm (code, X86_CMP, X86_EAX, 0x0100);
- //x86_pop_reg (code, X86_EAX);
- //EMIT_COND_SYSTEM_EXCEPTION (FALSE, FALSE, "ArithmeticException");
+ gint32 offset = mono_spillvar_offset_float (cfg, 0);
+ if (!sparc_is_imm13 (offset))
+ NOT_IMPLEMENTED;
+ sparc_stdf_imm (code, ins->sreg1, sparc_sp, offset);
+ sparc_lduh_imm (code, sparc_sp, offset, sparc_o7);
+ sparc_srl_imm (code, sparc_o7, 4, sparc_o7);
+ sparc_and_imm (code, FALSE, sparc_o7, 2047, sparc_o7);
+ sparc_cmp_imm (code, sparc_o7, 2047);
+ EMIT_COND_SYSTEM_EXCEPTION (ins, sparc_be, "ArithmeticException");
+#ifdef SPARCV9
+ sparc_fmovd (code, ins->sreg1, ins->dreg);
+#else
+ sparc_fmovs (code, ins->sreg1, ins->dreg);
+ sparc_fmovs (code, ins->sreg1 + 1, ins->dreg + 1);
+#endif
break;
}
default:
+#ifdef __GNUC__
g_warning ("unknown opcode %s in %s()\n", mono_inst_name (ins->opcode), __FUNCTION__);
+#else
+ g_warning ("%s:%d: unknown opcode %s\n", __FILE__, __LINE__, mono_inst_name (ins->opcode));
+#endif
g_assert_not_reached ();
}
- if ((cfg->opt & MONO_OPT_BRANCH) && ((code - cfg->native_code - offset) > max_len)) {
+ if ((((guint8*)code) - code_start) > max_len) {
g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
- mono_inst_name (ins->opcode), max_len, code - cfg->native_code - offset);
+ mono_inst_name (ins->opcode), max_len, ((guint8*)code) - code_start);
g_assert_not_reached ();
}
cpos += max_len;
last_ins = ins;
- last_offset = offset;
ins = ins->next;
}
- cfg->code_len = code - cfg->native_code;
+ cfg->code_len = (guint8*)code - cfg->native_code;
}
void
mono_arch_register_lowlevel_calls (void)
{
- mono_register_jit_icall (enter_method, "mono_enter_method", NULL, TRUE);
- mono_register_jit_icall (leave_method, "mono_leave_method", NULL, TRUE);
+ mono_register_jit_icall (mono_sparc_break, "mono_sparc_break", NULL, TRUE);
+ mono_register_jit_icall (mono_arch_get_lmf_addr, "mono_arch_get_lmf_addr", NULL, TRUE);
}
void
-mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji)
+mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gboolean run_cctors)
{
MonoJumpInfo *patch_info;
+ /* FIXME: Move part of this to arch independent code */
for (patch_info = ji; patch_info; patch_info = patch_info->next) {
unsigned char *ip = patch_info->ip.i + code;
- const unsigned char *target = NULL;
+ gpointer target;
+
+ target = mono_resolve_patch_target (method, domain, code, patch_info, run_cctors);
switch (patch_info->type) {
- case MONO_PATCH_INFO_BB:
- target = patch_info->data.bb->native_offset + code;
- break;
- case MONO_PATCH_INFO_ABS:
- target = patch_info->data.target;
- break;
- case MONO_PATCH_INFO_LABEL:
- target = patch_info->data.inst->inst_c0 + code;
- break;
- case MONO_PATCH_INFO_IP:
- *((gpointer *)(ip)) = ip;
+ case MONO_PATCH_INFO_NONE:
continue;
- case MONO_PATCH_INFO_INTERNAL_METHOD: {
- MonoJitICallInfo *mi = mono_find_jit_icall_by_name (patch_info->data.name);
- if (!mi) {
- g_warning ("unknown MONO_PATCH_INFO_INTERNAL_METHOD %s", patch_info->data.name);
- g_assert_not_reached ();
- }
- target = mi->wrapper;
+ case MONO_PATCH_INFO_CLASS_INIT: {
+ guint32 *ip2 = (guint32*)ip;
+ /* Might already been changed to a nop */
+#ifdef SPARCV9
+ sparc_set_template (ip2, sparc_o7);
+ sparc_jmpl (ip2, sparc_o7, sparc_g0, sparc_o7);
+#else
+ sparc_call_simple (ip2, 0);
+#endif
break;
}
- case MONO_PATCH_INFO_METHOD:
- if (patch_info->data.method == method) {
- target = code;
- } else {
- /* get the trampoline to the method from the domain */
- target = mono_arch_create_jit_trampoline (patch_info->data.method);
- }
+ case MONO_PATCH_INFO_METHOD_JUMP: {
+ guint32 *ip2 = (guint32*)ip;
+ /* Might already been patched */
+ sparc_set_template (ip2, sparc_o7);
break;
- case MONO_PATCH_INFO_SWITCH: {
- gpointer *table = (gpointer *)patch_info->data.target;
- int i;
+ }
+ default:
+ break;
+ }
+ sparc_patch ((guint32*)ip, target);
+ }
+}
- // FIXME: inspect code to get the register
- //ppc_load (ip, sparc_l0, patch_info->data.target);
- //*((gconstpointer *)(ip + 2)) = patch_info->data.target;
+void*
+mono_arch_instrument_prolog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
+{
+ int i;
+ guint32 *code = (guint32*)p;
+ MonoMethodSignature *sig = mono_method_signature (cfg->method);
+ CallInfo *cinfo;
- for (i = 0; i < patch_info->table_size; i++) {
- table [i] = (int)patch_info->data.table [i] + code;
- }
- /* we put into the table the absolute address, no need for sparc_patch in this case */
- continue;
+ /* Save registers to stack */
+ for (i = 0; i < 6; ++i)
+ sparc_sti_imm (code, sparc_i0 + i, sparc_fp, ARGS_OFFSET + (i * sizeof (gpointer)));
+
+ cinfo = get_call_info (sig, FALSE);
+
+ /* Save float regs on V9, since they are caller saved */
+ for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
+ ArgInfo *ainfo = cinfo->args + i;
+ gint32 stack_offset;
+
+ stack_offset = ainfo->offset + ARGS_OFFSET;
+
+ if (ainfo->storage == ArgInFloatReg) {
+ if (!sparc_is_imm13 (stack_offset))
+ NOT_IMPLEMENTED;
+ sparc_stf_imm (code, ainfo->reg, sparc_fp, stack_offset);
}
- case MONO_PATCH_INFO_METHODCONST:
- case MONO_PATCH_INFO_CLASS:
- case MONO_PATCH_INFO_IMAGE:
- case MONO_PATCH_INFO_FIELD:
- g_assert_not_reached ();
- *((gconstpointer *)(ip + 1)) = patch_info->data.target;
- continue;
- case MONO_PATCH_INFO_R4:
- case MONO_PATCH_INFO_R8:
- g_assert_not_reached ();
- *((gconstpointer *)(ip + 2)) = patch_info->data.target;
- continue;
- default:
- g_assert_not_reached ();
+ else if (ainfo->storage == ArgInDoubleReg) {
+ /* The offset is guaranteed to be aligned by the ABI rules */
+ sparc_stdf_imm (code, ainfo->reg, sparc_fp, stack_offset);
+ }
+ }
+
+ sparc_set (code, cfg->method, sparc_o0);
+ sparc_add_imm (code, FALSE, sparc_fp, MONO_SPARC_STACK_BIAS, sparc_o1);
+
+ mono_add_patch_info (cfg, (guint8*)code-cfg->native_code, MONO_PATCH_INFO_ABS, func);
+ EMIT_CALL ();
+
+ /* Restore float regs on V9 */
+ for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
+ ArgInfo *ainfo = cinfo->args + i;
+ gint32 stack_offset;
+
+ stack_offset = ainfo->offset + ARGS_OFFSET;
+
+ if (ainfo->storage == ArgInFloatReg) {
+ if (!sparc_is_imm13 (stack_offset))
+ NOT_IMPLEMENTED;
+ sparc_ldf_imm (code, sparc_fp, stack_offset, ainfo->reg);
+ }
+ else if (ainfo->storage == ArgInDoubleReg) {
+ /* The offset is guaranteed to be aligned by the ABI rules */
+ sparc_lddf_imm (code, sparc_fp, stack_offset, ainfo->reg);
}
- sparc_patch (ip, target);
}
+
+ g_free (cinfo);
+
+ return code;
}
-int
-mono_arch_max_epilog_size (MonoCompile *cfg)
+enum {
+ SAVE_NONE,
+ SAVE_STRUCT,
+ SAVE_ONE,
+ SAVE_TWO,
+ SAVE_FP
+};
+
+void*
+mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments)
{
- int exc_count = 0, max_epilog_size = 16 + 20*4;
- MonoJumpInfo *patch_info;
-
- if (cfg->method->save_lmf)
- max_epilog_size += 128;
-
- if (mono_jit_trace_calls != NULL)
- max_epilog_size += 50;
+ guint32 *code = (guint32*)p;
+ int save_mode = SAVE_NONE;
+ MonoMethod *method = cfg->method;
- if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
- max_epilog_size += 50;
+ switch (mono_type_get_underlying_type (mono_method_signature (method)->ret)->type) {
+ case MONO_TYPE_VOID:
+ /* special case string .ctor icall */
+ if (strcmp (".ctor", method->name) && method->klass == mono_defaults.string_class)
+ save_mode = SAVE_ONE;
+ else
+ save_mode = SAVE_NONE;
+ break;
+ case MONO_TYPE_I8:
+ case MONO_TYPE_U8:
+#ifdef SPARCV9
+ save_mode = SAVE_ONE;
+#else
+ save_mode = SAVE_TWO;
+#endif
+ break;
+ case MONO_TYPE_R4:
+ case MONO_TYPE_R8:
+ save_mode = SAVE_FP;
+ break;
+ case MONO_TYPE_VALUETYPE:
+ save_mode = SAVE_STRUCT;
+ break;
+ default:
+ save_mode = SAVE_ONE;
+ break;
+ }
- /* count the number of exception infos */
-
- for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
- if (patch_info->type == MONO_PATCH_INFO_EXC)
- exc_count++;
+ /* Save the result to the stack and also put it into the output registers */
+
+ switch (save_mode) {
+ case SAVE_TWO:
+ /* V8 only */
+ sparc_st_imm (code, sparc_i0, sparc_fp, 68);
+ sparc_st_imm (code, sparc_i0, sparc_fp, 72);
+ sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
+ sparc_mov_reg_reg (code, sparc_i1, sparc_o2);
+ break;
+ case SAVE_ONE:
+ sparc_sti_imm (code, sparc_i0, sparc_fp, ARGS_OFFSET);
+ sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
+ break;
+ case SAVE_FP:
+#ifdef SPARCV9
+ sparc_stdf_imm (code, sparc_f0, sparc_fp, ARGS_OFFSET);
+#else
+ sparc_stdf_imm (code, sparc_f0, sparc_fp, 72);
+ sparc_ld_imm (code, sparc_fp, 72, sparc_o1);
+ sparc_ld_imm (code, sparc_fp, 72 + 4, sparc_o2);
+#endif
+ break;
+ case SAVE_STRUCT:
+#ifdef SPARCV9
+ sparc_mov_reg_reg (code, sparc_i0, sparc_o1);
+#else
+ sparc_ld_imm (code, sparc_fp, 64, sparc_o1);
+#endif
+ break;
+ case SAVE_NONE:
+ default:
+ break;
}
- /*
- * make sure we have enough space for exceptions
- * 16 is the size of two push_imm instructions and a call
- */
- max_epilog_size += exc_count*16;
+ sparc_set (code, cfg->method, sparc_o0);
+
+ mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, func);
+ EMIT_CALL ();
+
+ /* Restore result */
+
+ switch (save_mode) {
+ case SAVE_TWO:
+ sparc_ld_imm (code, sparc_fp, 68, sparc_i0);
+ sparc_ld_imm (code, sparc_fp, 72, sparc_i0);
+ break;
+ case SAVE_ONE:
+ sparc_ldi_imm (code, sparc_fp, ARGS_OFFSET, sparc_i0);
+ break;
+ case SAVE_FP:
+ sparc_lddf_imm (code, sparc_fp, ARGS_OFFSET, sparc_f0);
+ break;
+ case SAVE_NONE:
+ default:
+ break;
+ }
- return max_epilog_size;
+ return code;
}
guint8 *
mono_arch_emit_prolog (MonoCompile *cfg)
{
MonoMethod *method = cfg->method;
- MonoBasicBlock *bb;
MonoMethodSignature *sig;
MonoInst *inst;
- int alloc_size, pos, max_offset, i;
- guint8 *code;
+ guint32 *code;
CallInfo *cinfo;
+ guint32 i, offset;
cfg->code_size = 256;
- code = cfg->native_code = g_malloc (cfg->code_size);
+ cfg->native_code = g_malloc (cfg->code_size);
+ code = (guint32*)cfg->native_code;
- if (1 || cfg->flags & MONO_CFG_HAS_CALLS) {
- //ppc_mflr (code, sparc_l0);
- //ppc_stw (code, sparc_l0, 8, ppc_sp);
- }
- if (cfg->flags & MONO_CFG_HAS_ALLOCA) {
- cfg->used_int_regs |= 1 << 31;
- }
+ /* FIXME: Generate intermediate code instead */
- alloc_size = cfg->stack_offset;
- pos = 0;
+ offset = cfg->stack_offset;
+ offset += (16 * sizeof (gpointer)); /* register save area */
+#ifndef SPARCV9
+ offset += 4; /* struct/union return pointer */
+#endif
- if (method->save_lmf) {
-#if 0
- pos += sizeof (MonoLMF);
-
- /* save the current IP */
- mono_add_patch_info (cfg, code + 1 - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
- x86_push_imm (code, 0);
-
- /* save all caller saved regs */
- x86_push_reg (code, X86_EBX);
- x86_push_reg (code, X86_EDI);
- x86_push_reg (code, X86_ESI);
- x86_push_reg (code, X86_EBP);
-
- /* save method info */
- x86_push_imm (code, method);
+ /* add parameter area size for called functions */
+ if (cfg->param_area < (6 * sizeof (gpointer)))
+ /* Reserve space for the first 6 arguments even if it is unused */
+ offset += 6 * sizeof (gpointer);
+ else
+ offset += cfg->param_area;
- /* get the address of lmf for the current thread */
- mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
- (gpointer)"get_lmf_addr");
- x86_call_code (code, 0);
-
- /* push lmf */
- x86_push_reg (code, X86_EAX);
- /* push *lfm (previous_lmf) */
- x86_push_membase (code, X86_EAX, 0);
- /* *(lmf) = ESP */
- x86_mov_membase_reg (code, X86_EAX, 0, X86_ESP, 4);
-#endif
- } else {
-
- for (i = 13; i < 32; ++i) {
- if (cfg->used_int_regs & (1 << i)) {
- pos += 4;
- //ppc_stw (code, i, -pos, ppc_sp);
- }
- }
- }
+ /* align the stack size */
+ offset = ALIGN_TO (offset, MONO_ARCH_FRAME_ALIGNMENT);
- alloc_size += pos;
- // align to 16 bytes
- if (alloc_size & (16 - 1))
- alloc_size += 16 - (alloc_size & (16 - 1));
-
- cfg->stack_usage = alloc_size;
- if (alloc_size)
- //ppc_stwu (code, sparc_sp, -alloc_size, sparc_sp);
- if (cfg->flags & MONO_CFG_HAS_ALLOCA)
- //ppc_mr (code, sparc_l7, sparc_sp);
-
- /* compute max_offset in order to use short forward jumps */
- max_offset = 0;
- if (cfg->opt & MONO_OPT_BRANCH) {
- for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
- MonoInst *ins = bb->code;
- bb->max_offset = max_offset;
-
- if (cfg->prof_options & MONO_PROFILE_COVERAGE)
- max_offset += 6;
-
- while (ins) {
- max_offset += ((guint8 *)ins_spec [ins->opcode])[MONO_INST_LEN];
- ins = ins->next;
- }
- }
+ /*
+ * localloc'd memory is stored between the local variables (whose
+ * size is given by cfg->stack_offset), and between the space reserved
+ * by the ABI.
+ */
+ cfg->arch.localloc_offset = offset - cfg->stack_offset;
+
+ cfg->stack_offset = offset;
+
+#ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
+ /* Perform stack touching */
+ NOT_IMPLEMENTED;
+#endif
+
+ if (!sparc_is_imm13 (- cfg->stack_offset)) {
+ /* Can't use sparc_o7 here, since we're still in the caller's frame */
+ sparc_set (code, (- cfg->stack_offset), GP_SCRATCH_REG);
+ sparc_save (code, sparc_sp, GP_SCRATCH_REG, sparc_sp);
}
+ else
+ sparc_save_imm (code, sparc_sp, - cfg->stack_offset, sparc_sp);
- if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
- code = mono_arch_instrument_prolog (cfg, enter_method, code, TRUE);
+/*
+ if (strstr (cfg->method->name, "foo")) {
+ mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
+ sparc_call_simple (code, 0);
+ sparc_nop (code);
+ }
+*/
- /* load arguments allocated to register from the stack */
- sig = method->signature;
- pos = 0;
+ sig = mono_method_signature (method);
- cinfo = calculate_sizes (sig, sig->pinvoke);
+ cinfo = get_call_info (sig, FALSE);
+ /* Keep in sync with emit_load_volatile_arguments */
for (i = 0; i < sig->param_count + sig->hasthis; ++i) {
ArgInfo *ainfo = cinfo->args + i;
- inst = cfg->varinfo [pos];
-
- if (inst->opcode == OP_REGVAR) {
- g_assert (!ainfo->regtype); // fine for now
- //ppc_mr (code, inst->dreg, ainfo->reg);
- if (cfg->verbose_level > 2)
- g_print ("Argument %d assigned to register %s\n", pos, mono_arch_regname (inst->dreg));
- } else {
- /* the argument should be put on the stack: FIXME handle size != word */
- //ppc_stw (code, ainfo->reg, inst->inst_offset, inst->inst_basereg);
+ gint32 stack_offset;
+ MonoType *arg_type;
+ inst = cfg->varinfo [i];
+
+ if (sig->hasthis && (i == 0))
+ arg_type = &mono_defaults.object_class->byval_arg;
+ else
+ arg_type = sig->params [i - sig->hasthis];
+
+ stack_offset = ainfo->offset + ARGS_OFFSET;
+
+ /* Save the split arguments so they will reside entirely on the stack */
+ if (ainfo->storage == ArgInSplitRegStack) {
+ /* Save the register to the stack */
+ g_assert (inst->opcode == OP_REGOFFSET);
+ if (!sparc_is_imm13 (stack_offset))
+ NOT_IMPLEMENTED;
+ sparc_st_imm (code, sparc_i5, inst->inst_basereg, stack_offset);
}
- pos++;
+
+ if (!v64 && !arg_type->byref && (arg_type->type == MONO_TYPE_R8)) {
+ /* Save the argument to a dword aligned stack location */
+ /*
+ * stack_offset contains the offset of the argument on the stack.
+ * inst->inst_offset contains the dword aligned offset where the value
+ * should be stored.
+ */
+ if (ainfo->storage == ArgInIRegPair) {
+ if (!sparc_is_imm13 (inst->inst_offset + 4))
+ NOT_IMPLEMENTED;
+ sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
+ sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
+ }
+ else
+ if (ainfo->storage == ArgInSplitRegStack) {
+#ifdef SPARCV9
+ g_assert_not_reached ();
+#endif
+ if (stack_offset != inst->inst_offset) {
+ /* stack_offset is not dword aligned, so we need to make a copy */
+ sparc_st_imm (code, sparc_i5, inst->inst_basereg, inst->inst_offset);
+ sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
+ sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
+ }
+ }
+ else
+ if (ainfo->storage == ArgOnStackPair) {
+#ifdef SPARCV9
+ g_assert_not_reached ();
+#endif
+ if (stack_offset != inst->inst_offset) {
+ /* stack_offset is not dword aligned, so we need to make a copy */
+ sparc_ld_imm (code, sparc_fp, stack_offset, sparc_o7);
+ sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset);
+ sparc_ld_imm (code, sparc_fp, stack_offset + 4, sparc_o7);
+ sparc_st_imm (code, sparc_o7, inst->inst_basereg, inst->inst_offset + 4);
+ }
+ }
+ else
+ g_assert_not_reached ();
+ }
+ else
+ if ((ainfo->storage == ArgInIReg) && (inst->opcode != OP_REGVAR)) {
+ /* Argument in register, but need to be saved to stack */
+ if (!sparc_is_imm13 (stack_offset))
+ NOT_IMPLEMENTED;
+ if ((stack_offset - ARGS_OFFSET) & 0x1)
+ sparc_stb_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
+ else
+ if ((stack_offset - ARGS_OFFSET) & 0x2)
+ sparc_sth_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
+ else
+ if ((stack_offset - ARGS_OFFSET) & 0x4)
+ sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
+ else {
+ if (v64)
+ sparc_stx_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
+ else
+ sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, stack_offset);
+ }
+ }
+ else
+ if ((ainfo->storage == ArgInIRegPair) && (inst->opcode != OP_REGVAR)) {
+#ifdef SPARCV9
+ NOT_IMPLEMENTED;
+#endif
+ /* Argument in regpair, but need to be saved to stack */
+ if (!sparc_is_imm13 (inst->inst_offset + 4))
+ NOT_IMPLEMENTED;
+ sparc_st_imm (code, sparc_i0 + ainfo->reg, inst->inst_basereg, inst->inst_offset);
+ sparc_st_imm (code, sparc_i0 + ainfo->reg + 1, inst->inst_basereg, inst->inst_offset + 4);
+ }
+ else if ((ainfo->storage == ArgInFloatReg) && (inst->opcode != OP_REGVAR)) {
+ if (!sparc_is_imm13 (stack_offset))
+ NOT_IMPLEMENTED;
+ sparc_stf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
+ }
+ else if ((ainfo->storage == ArgInDoubleReg) && (inst->opcode != OP_REGVAR)) {
+ /* The offset is guaranteed to be aligned by the ABI rules */
+ sparc_stdf_imm (code, ainfo->reg, inst->inst_basereg, inst->inst_offset);
+ }
+
+ if ((ainfo->storage == ArgInFloatReg) && (inst->opcode == OP_REGVAR)) {
+ /* Need to move into the a double precision register */
+ sparc_fstod (code, ainfo->reg, ainfo->reg - 1);
+ }
+
+ if ((ainfo->storage == ArgInSplitRegStack) || (ainfo->storage == ArgOnStack))
+ if (inst->opcode == OP_REGVAR)
+ /* FIXME: Load the argument into memory */
+ NOT_IMPLEMENTED;
}
- cfg->code_len = code - cfg->native_code;
+ g_free (cinfo);
- return code;
+ if (cfg->method->save_lmf) {
+ gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
+
+ /* Save ip */
+ mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_IP, NULL);
+ sparc_set_template (code, sparc_o7);
+ sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ip));
+ /* Save sp */
+ sparc_sti_imm (code, sparc_sp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, sp));
+ /* Save fp */
+ sparc_sti_imm (code, sparc_fp, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, ebp));
+ /* Save method */
+ /* FIXME: add a relocation for this */
+ sparc_set (code, cfg->method, sparc_o7);
+ sparc_sti_imm (code, sparc_o7, sparc_fp, lmf_offset + G_STRUCT_OFFSET (MonoLMF, method));
+
+ mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_INTERNAL_METHOD,
+ (gpointer)"mono_arch_get_lmf_addr");
+ EMIT_CALL ();
+
+ code = (guint32*)mono_sparc_emit_save_lmf (code, lmf_offset);
+ }
+
+ if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
+ code = mono_arch_instrument_prolog (cfg, mono_trace_enter_method, code, TRUE);
+
+ cfg->code_len = (guint8*)code - cfg->native_code;
+
+ g_assert (cfg->code_len <= cfg->code_size);
+
+ return (guint8*)code;
}
void
mono_arch_emit_epilog (MonoCompile *cfg)
{
- MonoJumpInfo *patch_info;
MonoMethod *method = cfg->method;
- int pos, i;
- guint8 *code;
+ guint32 *code;
+ int can_fold = 0;
+ int max_epilog_size = 16 + 20 * 4;
+
+ if (cfg->method->save_lmf)
+ max_epilog_size += 128;
+
+ if (mono_jit_trace_calls != NULL)
+ max_epilog_size += 50;
+
+ if (cfg->prof_options & MONO_PROFILE_ENTER_LEAVE)
+ max_epilog_size += 50;
- code = cfg->native_code + cfg->code_len;
+ while (cfg->code_len + max_epilog_size > (cfg->code_size - 16)) {
+ cfg->code_size *= 2;
+ cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
+ mono_jit_stats.code_reallocs++;
+ }
+
+ code = (guint32*)(cfg->native_code + cfg->code_len);
if (mono_jit_trace_calls != NULL && mono_trace_eval (method))
- code = mono_arch_instrument_epilog (cfg, leave_method, code, TRUE);
+ code = mono_arch_instrument_epilog (cfg, mono_trace_leave_method, code, TRUE);
-
- pos = 0;
-
- if (method->save_lmf) {
- pos = -sizeof (MonoLMF);
+ if (cfg->method->save_lmf) {
+ gint32 lmf_offset = STACK_BIAS - cfg->arch.lmf_offset;
+
+ code = mono_sparc_emit_restore_lmf (code, lmf_offset);
}
- if (method->save_lmf) {
-#if 0
- /* ebx = previous_lmf */
- x86_pop_reg (code, X86_EBX);
- /* edi = lmf */
- x86_pop_reg (code, X86_EDI);
- /* *(lmf) = previous_lmf */
- x86_mov_membase_reg (code, X86_EDI, 0, X86_EBX, 4);
-
- /* discard method info */
- x86_pop_reg (code, X86_ESI);
-
- /* restore caller saved regs */
- x86_pop_reg (code, X86_EBP);
- x86_pop_reg (code, X86_ESI);
- x86_pop_reg (code, X86_EDI);
- x86_pop_reg (code, X86_EBX);
-#endif
+ /*
+ * The V8 ABI requires that calls to functions which return a structure
+ * return to %i7+12
+ */
+ if (!v64 && mono_method_signature (cfg->method)->pinvoke && MONO_TYPE_ISSTRUCT(mono_method_signature (cfg->method)->ret))
+ sparc_jmpl_imm (code, sparc_i7, 12, sparc_g0);
+ else
+ sparc_ret (code);
+
+ /* Only fold last instruction into the restore if the exit block has an in count of 1
+ and the previous block hasn't been optimized away since it may have an in count > 1 */
+ if (cfg->bb_exit->in_count == 1 && cfg->bb_exit->in_bb[0]->native_offset != cfg->bb_exit->native_offset)
+ can_fold = 1;
+
+ /* Try folding last instruction into the restore */
+ if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && sparc_inst_imm (code [-2]) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
+ /* or reg, imm, %i0 */
+ int reg = sparc_inst_rs1 (code [-2]);
+ int imm = sparc_inst_imm13 (code [-2]);
+ code [-2] = code [-1];
+ code --;
+ sparc_restore_imm (code, reg, imm, sparc_o0);
+ }
+ else
+ if (can_fold && (sparc_inst_op (code [-2]) == 0x2) && (sparc_inst_op3 (code [-2]) == 0x2) && (!sparc_inst_imm (code [-2])) && (sparc_inst_rd (code [-2]) == sparc_i0)) {
+ /* or reg, reg, %i0 */
+ int reg1 = sparc_inst_rs1 (code [-2]);
+ int reg2 = sparc_inst_rs2 (code [-2]);
+ code [-2] = code [-1];
+ code --;
+ sparc_restore (code, reg1, reg2, sparc_o0);
}
+ else
+ sparc_restore_imm (code, sparc_g0, 0, sparc_g0);
+
+ cfg->code_len = (guint8*)code - cfg->native_code;
+
+ g_assert (cfg->code_len < cfg->code_size);
- if (1 || cfg->flags & MONO_CFG_HAS_CALLS) {
- //ppc_lwz (code, sparc_l0, cfg->stack_usage + 8, cfg->frame_reg);
- //ppc_mtlr (code, sparc_l0);
+}
+
+void
+mono_arch_emit_exceptions (MonoCompile *cfg)
+{
+ MonoJumpInfo *patch_info;
+ guint32 *code;
+ int nthrows = 0, i;
+ int exc_count = 0;
+ guint32 code_size;
+ MonoClass *exc_classes [16];
+ guint8 *exc_throw_start [16], *exc_throw_end [16];
+
+ /* Compute needed space */
+ for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
+ if (patch_info->type == MONO_PATCH_INFO_EXC)
+ exc_count++;
}
- //ppc_addic (code, ppc_sp, cfg->frame_reg, cfg->stack_usage);
- for (i = 13; i < 32; ++i) {
- if (cfg->used_int_regs & (1 << i)) {
- pos += 4;
- //ppc_lwz (code, i, -pos, cfg->frame_reg);
- }
+
+ /*
+ * make sure we have enough space for exceptions
+ */
+#ifdef SPARCV9
+ code_size = exc_count * (20 * 4);
+#else
+ code_size = exc_count * 24;
+#endif
+
+ while (cfg->code_len + code_size > (cfg->code_size - 16)) {
+ cfg->code_size *= 2;
+ cfg->native_code = g_realloc (cfg->native_code, cfg->code_size);
+ mono_jit_stats.code_reallocs++;
}
- //ppc_blr (code);
- /* add code to raise exceptions */
+ code = (guint32*)(cfg->native_code + cfg->code_len);
+
for (patch_info = cfg->patch_info; patch_info; patch_info = patch_info->next) {
switch (patch_info->type) {
- case MONO_PATCH_INFO_EXC:
- /*x86_patch (patch_info->ip.i + cfg->native_code, code);
- x86_push_imm (code, patch_info->data.target);
- x86_push_imm (code, patch_info->ip.i + cfg->native_code);
- patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
- patch_info->data.name = "throw_exception_by_name";
- patch_info->ip.i = code - cfg->native_code;
- x86_jump_code (code, 0);*/
+ case MONO_PATCH_INFO_EXC: {
+ MonoClass *exc_class;
+ guint32 *buf, *buf2;
+ guint32 throw_ip, type_idx;
+ gint32 disp;
+
+ sparc_patch ((guint32*)(cfg->native_code + patch_info->ip.i), code);
+
+ exc_class = mono_class_from_name (mono_defaults.corlib, "System", patch_info->data.name);
+ type_idx = exc_class->type_token - MONO_TOKEN_TYPE_DEF;
+ g_assert (exc_class);
+ throw_ip = patch_info->ip.i;
+
+ /* Find a throw sequence for the same exception class */
+ for (i = 0; i < nthrows; ++i)
+ if (exc_classes [i] == exc_class)
+ break;
+
+ if (i < nthrows) {
+ guint32 throw_offset = (((guint8*)exc_throw_end [i] - cfg->native_code) - throw_ip) >> 2;
+ if (!sparc_is_imm13 (throw_offset))
+ sparc_set32 (code, throw_offset, sparc_o1);
+
+ disp = (exc_throw_start [i] - (guint8*)code) >> 2;
+ g_assert (sparc_is_imm22 (disp));
+ sparc_branch (code, 0, sparc_ba, disp);
+ if (sparc_is_imm13 (throw_offset))
+ sparc_set32 (code, throw_offset, sparc_o1);
+ else
+ sparc_nop (code);
+ patch_info->type = MONO_PATCH_INFO_NONE;
+ }
+ else {
+ /* Emit the template for setting o1 */
+ buf = code;
+ if (sparc_is_imm13 (((((guint8*)code - cfg->native_code) - throw_ip) >> 2) - 8))
+ /* Can use a short form */
+ sparc_nop (code);
+ else
+ sparc_set_template (code, sparc_o1);
+ buf2 = code;
+
+ if (nthrows < 16) {
+ exc_classes [nthrows] = exc_class;
+ exc_throw_start [nthrows] = (guint8*)code;
+ }
+
+ /*
+ mono_add_patch_info (cfg, (guint8*)code - cfg->native_code, MONO_PATCH_INFO_ABS, mono_sparc_break);
+ EMIT_CALL();
+ */
+
+ /* first arg = type token */
+ /* Pass the type index to reduce the size of the sparc_set */
+ if (!sparc_is_imm13 (type_idx))
+ sparc_set32 (code, type_idx, sparc_o0);
+
+ /* second arg = offset between the throw ip and the current ip */
+ /* On sparc, the saved ip points to the call instruction */
+ disp = (((guint8*)code - cfg->native_code) - throw_ip) >> 2;
+ sparc_set32 (buf, disp, sparc_o1);
+ while (buf < buf2)
+ sparc_nop (buf);
+
+ if (nthrows < 16) {
+ exc_throw_end [nthrows] = (guint8*)code;
+ nthrows ++;
+ }
+
+ patch_info->data.name = "mono_arch_throw_corlib_exception";
+ patch_info->type = MONO_PATCH_INFO_INTERNAL_METHOD;
+ patch_info->ip.i = (guint8*)code - cfg->native_code;
+
+ EMIT_CALL ();
+
+ if (sparc_is_imm13 (type_idx)) {
+ /* Put it into the delay slot */
+ code --;
+ buf = code;
+ sparc_set32 (code, type_idx, sparc_o0);
+ g_assert (code - buf == 1);
+ }
+ }
break;
+ }
default:
/* do nothing */
break;
}
}
- cfg->code_len = code - cfg->native_code;
+ cfg->code_len = (guint8*)code - cfg->native_code;
g_assert (cfg->code_len < cfg->code_size);
}
+gboolean lmf_addr_key_inited = FALSE;
+
+#ifdef MONO_SPARC_THR_TLS
+thread_key_t lmf_addr_key;
+#else
+pthread_key_t lmf_addr_key;
+#endif
+
+gpointer
+mono_arch_get_lmf_addr (void)
+{
+ /* This is perf critical so we bypass the IO layer */
+ /* The thr_... functions seem to be somewhat faster */
+#ifdef MONO_SPARC_THR_TLS
+ gpointer res;
+ thr_getspecific (lmf_addr_key, &res);
+ return res;
+#else
+ return pthread_getspecific (lmf_addr_key);
+#endif
+}
+
+#ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
+
+/*
+ * There seems to be no way to determine stack boundaries under solaris,
+ * so it's not possible to determine whenever a SIGSEGV is caused by stack
+ * overflow or not.
+ */
+#error "--with-sigaltstack=yes not supported on solaris"
+
+static void
+setup_stack (MonoJitTlsData *tls)
+{
+#ifdef __linux__
+ struct sigaltstack sa;
+#else
+ stack_t sigstk;
+#endif
+
+ /* Setup an alternate signal stack */
+ tls->signal_stack = mmap (0, SIGNAL_STACK_SIZE, PROT_READ|PROT_WRITE|PROT_EXEC, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0);
+ tls->signal_stack_size = SIGNAL_STACK_SIZE;
+
+#ifdef __linux__
+ sa.ss_sp = tls->signal_stack;
+ sa.ss_size = SIGNAL_STACK_SIZE;
+ sa.ss_flags = 0;
+ g_assert (sigaltstack (&sa, NULL) == 0);
+#else
+ sigstk.ss_sp = tls->signal_stack;
+ sigstk.ss_size = SIGNAL_STACK_SIZE;
+ sigstk.ss_flags = 0;
+ g_assert (sigaltstack (&sigstk, NULL) == 0);
+#endif
+}
+
+#endif
+
void
mono_arch_setup_jit_tls_data (MonoJitTlsData *tls)
{
+ if (!lmf_addr_key_inited) {
+ int res;
+
+ lmf_addr_key_inited = TRUE;
+
+#ifdef MONO_SPARC_THR_TLS
+ res = thr_keycreate (&lmf_addr_key, NULL);
+#else
+ res = pthread_key_create (&lmf_addr_key, NULL);
+#endif
+ g_assert (res == 0);
+
+ }
+
+#ifdef MONO_SPARC_THR_TLS
+ thr_setspecific (lmf_addr_key, &tls->lmf);
+#else
+ pthread_setspecific (lmf_addr_key, &tls->lmf);
+#endif
+
+#ifdef MONO_ARCH_SIGSEGV_ON_ALTSTACK
+ setup_stack (tls);
+#endif
}
void
-mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *inst, int this_reg, int this_type, int vt_reg)
+mono_arch_free_jit_tls_data (MonoJitTlsData *tls)
{
- int this_dreg = sparc_o0;
-
- if (vt_reg != -1)
- this_dreg = sparc_o1;
+}
+
+void
+mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *call, int this_reg, int this_type, int vt_reg)
+{
+ int this_out_reg = sparc_o0;
+
+ if (vt_reg != -1) {
+#ifdef SPARCV9
+ MonoInst *ins;
+ MONO_INST_NEW (cfg, ins, OP_SETREG);
+ ins->sreg1 = vt_reg;
+ ins->dreg = mono_regstate_next_int (cfg->rs);
+ mono_bblock_add_inst (cfg->cbb, ins);
+
+ mono_call_inst_add_outarg_reg (call, ins->dreg, sparc_o0, FALSE);
+
+ this_out_reg = sparc_o1;
+#else
+ /* Set the 'struct/union return pointer' location on the stack */
+ MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STOREI4_MEMBASE_REG, sparc_sp, 64, vt_reg);
+#endif
+ }
/* add the this argument */
if (this_reg != -1) {
MONO_INST_NEW (cfg, this, OP_SETREG);
this->type = this_type;
this->sreg1 = this_reg;
- this->dreg = this_dreg;
- mono_bblock_add_inst (bb, this);
+ this->dreg = mono_regstate_next_int (cfg->rs);
+ mono_bblock_add_inst (cfg->cbb, this);
+
+ mono_call_inst_add_outarg_reg (call, this->dreg, this_out_reg, FALSE);
}
+}
- if (vt_reg != -1) {
- MonoInst *vtarg;
- MONO_INST_NEW (cfg, vtarg, OP_SETREG);
- vtarg->type = STACK_MP;
- vtarg->sreg1 = vt_reg;
- this->dreg = sparc_o0;
- mono_bblock_add_inst (bb, vtarg);
+
+MonoInst*
+mono_arch_get_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
+{
+ return NULL;
+}
+
+/*
+ * mono_arch_get_argument_info:
+ * @csig: a method signature
+ * @param_count: the number of parameters to consider
+ * @arg_info: an array to store the result infos
+ *
+ * Gathers information on parameters such as size, alignment and
+ * padding. arg_info should be large enought to hold param_count + 1 entries.
+ *
+ * Returns the size of the activation frame.
+ */
+int
+mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
+{
+ int k, align;
+ CallInfo *cinfo;
+ ArgInfo *ainfo;
+
+ cinfo = get_call_info (csig, FALSE);
+
+ if (csig->hasthis) {
+ ainfo = &cinfo->args [0];
+ arg_info [0].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
}
+
+ for (k = 0; k < param_count; k++) {
+ ainfo = &cinfo->args [k + csig->hasthis];
+
+ arg_info [k + 1].offset = ARGS_OFFSET - MONO_SPARC_STACK_BIAS + ainfo->offset;
+ arg_info [k + 1].size = mono_type_size (csig->params [k], &align);
+ }
+
+ g_free (cinfo);
+
+ return 0;
+}
+
+gboolean
+mono_arch_print_tree (MonoInst *tree, int arity)
+{
+ return 0;
+}
+
+MonoInst* mono_arch_get_domain_intrinsic (MonoCompile* cfg)
+{
+ return NULL;
}
+MonoInst* mono_arch_get_thread_intrinsic (MonoCompile* cfg)
+{
+ return NULL;
+}
projects / mono.git / blobdiff