[mini] Simplify the way the JIT emits atomic opcodes.

[mono.git] / mono / mini / mini-ppc.c

diff --git a/mono/mini/mini-ppc.c b/mono/mini/mini-ppc.c
index 69a1d3d78aa16d9558fff6e6d915d9a95f816ec0..16f34d1c00d84845426ca22da6f591c288c77e8f 100644 (file)
--- a/mono/mini/mini-ppc.c
+++ b/mono/mini/mini-ppc.c
@@ -4384,22 +4384,24 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
                        else
                                ppc_mr (code, ins->dreg, ins->sreg1);
                        break;
-               case OP_ATOMIC_ADD_NEW_I4:
-               case OP_ATOMIC_ADD_NEW_I8: {
+               case OP_ATOMIC_ADD_I4:
+               case OP_ATOMIC_ADD_I8: {
                        guint8 *loop = code, *branch;
                        g_assert (ins->inst_offset == 0);
-                       if (ins->opcode == OP_ATOMIC_ADD_NEW_I4)
+                       ppc_sync (code);
+                       if (ins->opcode == OP_ATOMIC_ADD_I4)
                                ppc_lwarx (code, ppc_r0, 0, ins->inst_basereg);
                        else
                                ppc_ldarx (code, ppc_r0, 0, ins->inst_basereg);
                        ppc_add (code, ppc_r0, ppc_r0, ins->sreg2);
-                       if (ins->opcode == OP_ATOMIC_ADD_NEW_I4)
+                       if (ins->opcode == OP_ATOMIC_ADD_I4)
                                ppc_stwcxd (code, ppc_r0, 0, ins->inst_basereg);
                        else
                                ppc_stdcxd (code, ppc_r0, 0, ins->inst_basereg);
                        branch = code;
                        ppc_bc (code, PPC_BR_FALSE, PPC_BR_EQ, 0);
                        ppc_patch (branch, loop);
+                       ppc_sync (code);
                        ppc_mr (code, ins->dreg, ppc_r0);
                        break;
                }
@@ -4426,6 +4428,7 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
                        guint8 *start, *not_equal, *lost_reservation;
 
                        start = code;
+                       ppc_sync (code);
                        if (ins->opcode == OP_ATOMIC_CAS_I4)
                                ppc_lwarx (code, ppc_r0, 0, location);
 #ifdef __mono_ppc64__
@@ -4448,6 +4451,7 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb)
                        ppc_patch (lost_reservation, start);
 
                        ppc_patch (not_equal, code);
+                       ppc_sync (code);
                        ppc_mr (code, ins->dreg, ppc_r0);
                        break;
                }
@@ -5941,3 +5945,19 @@ mono_arch_init_lmf_ext (MonoLMFExt *ext, gpointer prev_lmf)
 }
 
 #endif
+
+gboolean
+mono_arch_opcode_supported (int opcode)
+{
+       switch (opcode) {
+       case OP_ATOMIC_CAS_I4:
+#ifdef TARGET_POWERPC64
+       case OP_ATOMIC_ADD_I4: /* Yes, really - see cpu-ppc(64).md. */
+       case OP_ATOMIC_ADD_I8:
+       case OP_ATOMIC_CAS_I8:
+#endif
+               return TRUE;
+       default:
+               return FALSE;
+       }
+}