-
+/*
+ * Copyright 2003 Ximian, Inc
+ * Copyright 2003-2011 Novell Inc
+ * Copyright 2011 Xamarin Inc
+ */
MINI_OP(OP_LOAD, "load", NONE, NONE, NONE)
MINI_OP(OP_LDADDR, "ldaddr", IREG, NONE, NONE)
MINI_OP(OP_STORE, "store", NONE, NONE, NONE)
MINI_OP(OP_LCOMPARE_IMM, "lcompare_imm", NONE, LREG, NONE)
MINI_OP(OP_LOCAL, "local", NONE, NONE, NONE)
MINI_OP(OP_ARG, "arg", NONE, NONE, NONE)
-MINI_OP(OP_ARGLIST, "oparglist", NONE, IREG, NONE)
+/* inst_imm contains the local index */
+MINI_OP(OP_GSHAREDVT_LOCAL, "gsharedvt_local", NONE, NONE, NONE)
+MINI_OP(OP_GSHAREDVT_ARG_REGOFFSET, "gsharedvt_arg_regoffset", NONE, NONE, NONE)
+/*
+ * Represents passing a valuetype argument which has not been decomposed yet.
+ * inst_p0 points to the call.
+ */
MINI_OP(OP_OUTARG_VT, "outarg_vt", NONE, VREG, NONE)
MINI_OP(OP_OUTARG_VTRETADDR, "outarg_vtretaddr", IREG, NONE, NONE)
MINI_OP(OP_SETRET, "setret", NONE, IREG, NONE)
MINI_OP(OP_LOCALLOC, "localloc", IREG, IREG, NONE)
MINI_OP(OP_LOCALLOC_IMM, "localloc_imm", IREG, NONE, NONE)
MINI_OP(OP_CHECK_THIS, "checkthis", NONE, IREG, NONE)
+MINI_OP(OP_SEQ_POINT, "seq_point", NONE, NONE, NONE)
+MINI_OP(OP_IMPLICIT_EXCEPTION, "implicit_exception", NONE, NONE, NONE)
MINI_OP(OP_VOIDCALL, "voidcall", NONE, NONE, NONE)
MINI_OP(OP_VOIDCALLVIRT, "voidcallvirt", NONE, NONE, NONE)
MINI_OP(OP_VCALL2, "vcall2", NONE, NONE, NONE)
MINI_OP(OP_VCALL2_REG, "vcall2_reg", NONE, IREG, NONE)
MINI_OP(OP_VCALL2_MEMBASE, "vcall2_membase", NONE, IREG, NONE)
+MINI_OP(OP_DYN_CALL, "dyn_call", NONE, IREG, IREG)
MINI_OP(OP_ICONST, "iconst", IREG, NONE, NONE)
MINI_OP(OP_I8CONST, "i8const", LREG, NONE, NONE)
MINI_OP(OP_THROW, "throw", NONE, IREG, NONE)
MINI_OP(OP_RETHROW, "rethrow", NONE, IREG, NONE)
+/*
+ * Vararg calls are implemented as follows:
+ * - the caller emits a hidden argument just before the varargs argument. this
+ * 'signature cookie' argument contains the signature describing the the call.
+ * - all implicit arguments are passed in memory right after the signature cookie, i.e.
+ * the stack will look like this:
+ * <argn>
+ * ..
+ * <arg1>
+ * <sig cookie>
+ * - the OP_ARGLIST opcode in the callee computes the address of the sig cookie argument
+ * on the stack and saves it into its sreg1.
+ * - mono_ArgIterator_Setup receives this value and uses it to find the signature and
+ * the arguments.
+ */
+MINI_OP(OP_ARGLIST, "oparglist", NONE, IREG, NONE)
+
/* MONO_IS_STORE_MEMBASE depends on the order here */
MINI_OP(OP_STORE_MEMBASE_REG,"store_membase_reg", IREG, IREG, NONE)
MINI_OP(OP_STOREI1_MEMBASE_REG, "storei1_membase_reg", IREG, IREG, NONE)
MINI_OP(OP_STOREI2_MEMBASE_REG, "storei2_membase_reg", IREG, IREG, NONE)
MINI_OP(OP_STOREI4_MEMBASE_REG, "storei4_membase_reg", IREG, IREG, NONE)
-MINI_OP(OP_STOREI8_MEMBASE_REG, "storei8_membase_reg", IREG, IREG, NONE)
+MINI_OP(OP_STOREI8_MEMBASE_REG, "storei8_membase_reg", IREG, LREG, NONE)
MINI_OP(OP_STORER4_MEMBASE_REG, "storer4_membase_reg", IREG, FREG, NONE)
MINI_OP(OP_STORER8_MEMBASE_REG, "storer8_membase_reg", IREG, FREG, NONE)
-#ifdef MONO_ARCH_SUPPORT_SIMD_INTRINSICS
+#if defined(TARGET_X86) || defined(TARGET_AMD64)
MINI_OP(OP_STOREX_MEMBASE_REG, "storex_membase_reg", IREG, XREG, NONE)
MINI_OP(OP_STOREX_ALIGNED_MEMBASE_REG, "storex_aligned_membase_reg", IREG, XREG, NONE)
MINI_OP(OP_STOREX_NTA_MEMBASE_REG, "storex_nta_membase_reg", IREG, XREG, NONE)
MINI_OP(OP_LOADX_MEMBASE, "loadx_membase", XREG, IREG, NONE)
-#ifdef MONO_ARCH_SUPPORT_SIMD_INTRINSICS
+#if defined(TARGET_X86) || defined(TARGET_AMD64)
MINI_OP(OP_LOADX_ALIGNED_MEMBASE, "loadx_aligned_membase", XREG, IREG, NONE)
#endif
MINI_OP(OP_LOADI4_MEMINDEX,"loadi4_memindex", IREG, IREG, IREG)
MINI_OP(OP_LOADU4_MEMINDEX,"loadu4_memindex", IREG, IREG, IREG)
MINI_OP(OP_LOADI8_MEMINDEX,"loadi8_memindex", IREG, IREG, IREG)
-MINI_OP(OP_LOADR4_MEMINDEX,"loadr4_memindex", IREG, IREG, IREG)
-MINI_OP(OP_LOADR8_MEMINDEX,"loadr8_memindex", IREG, IREG, IREG)
+MINI_OP(OP_LOADR4_MEMINDEX,"loadr4_memindex", FREG, IREG, IREG)
+MINI_OP(OP_LOADR8_MEMINDEX,"loadr8_memindex", FREG, IREG, IREG)
/* indexed stores: store sreg1 at (destbasereg + sreg2) */
/* MONO_IS_STORE_MEMINDEX depends on the order here */
MINI_OP(OP_STORE_MEMINDEX,"store_memindex", IREG, IREG, IREG)
MINI_OP(OP_STOREI2_MEMINDEX,"storei2_memindex", IREG, IREG, IREG)
MINI_OP(OP_STOREI4_MEMINDEX,"storei4_memindex", IREG, IREG, IREG)
MINI_OP(OP_STOREI8_MEMINDEX,"storei8_memindex", IREG, IREG, IREG)
-MINI_OP(OP_STORER4_MEMINDEX,"storer4_memindex", IREG, IREG, IREG)
-MINI_OP(OP_STORER8_MEMINDEX,"storer8_memindex", IREG, IREG, IREG)
+MINI_OP(OP_STORER4_MEMINDEX,"storer4_memindex", IREG, FREG, IREG)
+MINI_OP(OP_STORER8_MEMINDEX,"storer8_memindex", IREG, FREG, IREG)
-MINI_OP(OP_LOADR8_SPILL_MEMBASE,"loadr8_spill_membase", NONE, NONE, NONE)
MINI_OP(OP_LOAD_MEM,"load_mem", IREG, NONE, NONE)
MINI_OP(OP_LOADU1_MEM,"loadu1_mem", IREG, NONE, NONE)
MINI_OP(OP_LOADU2_MEM,"loadu2_mem", IREG, NONE, NONE)
/* 64 bit opcodes: must be in the same order as the matching CEE_ opcodes: unops_op_map */
MINI_OP(OP_LNEG, "long_neg", LREG, LREG, NONE)
MINI_OP(OP_LNOT, "long_not", LREG, LREG, NONE)
-MINI_OP(OP_LCONV_TO_I1,"long_conv_to_i1", LREG, LREG, NONE)
-MINI_OP(OP_LCONV_TO_I2,"long_conv_to_i2", LREG, LREG, NONE)
-MINI_OP(OP_LCONV_TO_I4,"long_conv_to_i4", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_I1,"long_conv_to_i1", IREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_I2,"long_conv_to_i2", IREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_I4,"long_conv_to_i4", IREG, LREG, NONE)
MINI_OP(OP_LCONV_TO_I8,"long_conv_to_i8", LREG, LREG, NONE)
MINI_OP(OP_LCONV_TO_R4,"long_conv_to_r4", FREG, LREG, NONE)
MINI_OP(OP_LCONV_TO_R8,"long_conv_to_r8", FREG, LREG, NONE)
-MINI_OP(OP_LCONV_TO_U4,"long_conv_to_u4", LREG, LREG, NONE)
+MINI_OP(OP_LCONV_TO_U4,"long_conv_to_u4", IREG, LREG, NONE)
MINI_OP(OP_LCONV_TO_U8,"long_conv_to_u8", LREG, LREG, NONE)
MINI_OP(OP_LCONV_TO_U2, "long_conv_to_u2", IREG, LREG, NONE)
MINI_OP(OP_FCLT, "float_clt", IREG, FREG, FREG)
MINI_OP(OP_FCLT_UN,"float_clt_un", IREG, FREG, FREG)
-MINI_OP(OP_FCEQ_MEMBASE, "float_ceq_membase", NONE, NONE, NONE)
-MINI_OP(OP_FCGT_MEMBASE, "float_cgt_membase", NONE, NONE, NONE)
-MINI_OP(OP_FCGT_UN_MEMBASE,"float_cgt_un_membase", NONE, NONE, NONE)
-MINI_OP(OP_FCLT_MEMBASE, "float_clt_membase", NONE, NONE, NONE)
-MINI_OP(OP_FCLT_UN_MEMBASE,"float_clt_un_membase", NONE, NONE, NONE)
+MINI_OP(OP_FCEQ_MEMBASE, "float_ceq_membase", IREG, FREG, IREG)
+MINI_OP(OP_FCGT_MEMBASE, "float_cgt_membase", IREG, FREG, IREG)
+MINI_OP(OP_FCGT_UN_MEMBASE,"float_cgt_un_membase", IREG, FREG, IREG)
+MINI_OP(OP_FCLT_MEMBASE, "float_clt_membase", IREG, FREG, IREG)
+MINI_OP(OP_FCLT_UN_MEMBASE,"float_clt_un_membase", IREG, FREG, IREG)
-MINI_OP(OP_FCONV_TO_U, "float_conv_to_u", NONE, NONE, NONE)
+MINI_OP(OP_FCONV_TO_U, "float_conv_to_u", IREG, FREG, NONE)
MINI_OP(OP_CKFINITE, "ckfinite", FREG, FREG, NONE)
/* Return the low 32 bits of a double vreg */
MINI_OP(OP_ENDFINALLY, "endfinally", NONE, NONE, NONE)
/* inline (long)int * (long)int */
-MINI_OP(OP_BIGMUL, "bigmul", NONE, NONE, NONE)
-MINI_OP(OP_BIGMUL_UN, "bigmul_un", NONE, NONE, NONE)
+MINI_OP(OP_BIGMUL, "bigmul", LREG, IREG, IREG)
+MINI_OP(OP_BIGMUL_UN, "bigmul_un", LREG, IREG, IREG)
MINI_OP(OP_IMIN_UN, "int_min_un", IREG, IREG, IREG)
MINI_OP(OP_IMAX_UN, "int_max_un", IREG, IREG, IREG)
MINI_OP(OP_LMIN_UN, "long_min_un", LREG, LREG, LREG)
MINI_OP(OP_ADD_OVF_UN_CARRY, "add_ovf_un_carry", IREG, IREG, IREG)
MINI_OP(OP_SUB_OVF_UN_CARRY, "sub_ovf_un_carry", IREG, IREG, IREG)
+/* instructions with explicit long arguments to deal with 64-bit ilp32 machines */
+MINI_OP(OP_LADDCC, "laddcc", LREG, LREG, LREG)
+MINI_OP(OP_LSUBCC, "lsubcc", LREG, LREG, LREG)
+
+
/* FP functions usually done by the CPU */
MINI_OP(OP_SIN, "sin", FREG, FREG, NONE)
MINI_OP(OP_COS, "cos", FREG, FREG, NONE)
MINI_OP(OP_SAVE_LMF, "save_lmf", NONE, NONE, NONE)
MINI_OP(OP_RESTORE_LMF, "restore_lmf", NONE, NONE, NONE)
+/* write barrier */
+MINI_OP(OP_CARD_TABLE_WBARRIER, "card_table_wbarrier", NONE, IREG, IREG)
+
/* arch-dep tls access */
MINI_OP(OP_TLS_GET, "tls_get", IREG, NONE, NONE)
+MINI_OP(OP_TLS_GET_REG, "tls_get_reg", IREG, IREG, NONE)
MINI_OP(OP_LOAD_GOTADDR, "load_gotaddr", IREG, NONE, NONE)
MINI_OP(OP_DUMMY_USE, "dummy_use", NONE, IREG, NONE)
/* SIMD opcodes. */
-#ifdef MONO_ARCH_SUPPORT_SIMD_INTRINSICS
+#if defined(TARGET_X86) || defined(TARGET_AMD64)
MINI_OP(OP_ADDPS, "addps", XREG, XREG, XREG)
MINI_OP(OP_DIVPS, "divps", XREG, XREG, XREG)
MINI_OP(OP_PSHUFLEW_HIGH, "pshufflew_high", XREG, XREG, NONE)
MINI_OP(OP_PSHUFLEW_LOW, "pshufflew_low", XREG, XREG, NONE)
MINI_OP(OP_PSHUFLED, "pshuffled", XREG, XREG, NONE)
+MINI_OP(OP_SHUFPS, "shufps", XREG, XREG, XREG)
+MINI_OP(OP_SHUFPD, "shufpd", XREG, XREG, XREG)
MINI_OP(OP_ADDPD, "addpd", XREG, XREG, XREG)
MINI_OP(OP_DIVPD, "divpd", XREG, XREG, XREG)
MINI_OP(OP_ADDSUBPD, "addsubpd", XREG, XREG, XREG)
MINI_OP(OP_DUPPD, "duppd", XREG, XREG, NONE)
+MINI_OP(OP_SQRTPD, "sqrtpd", XREG, XREG, NONE)
+
MINI_OP(OP_EXTRACT_MASK, "extract_mask", IREG, XREG, NONE)
MINI_OP(OP_PAND, "pand", XREG, XREG, XREG)
MINI_OP(OP_EXTRACT_R8, "extract_r8", FREG, XREG, NONE)
MINI_OP(OP_EXTRACT_I8, "extract_i8", LREG, XREG, NONE)
+/* Used by LLVM */
+MINI_OP(OP_INSERT_I1, "insert_i1", XREG, XREG, IREG)
+MINI_OP(OP_INSERT_I4, "insert_i4", XREG, XREG, IREG)
+MINI_OP(OP_INSERT_I8, "insert_i8", XREG, XREG, LREG)
+MINI_OP(OP_INSERT_R4, "insert_r4", XREG, XREG, FREG)
+MINI_OP(OP_INSERT_R8, "insert_r8", XREG, XREG, FREG)
+
MINI_OP(OP_INSERT_I2, "insert_i2", XREG, XREG, IREG)
MINI_OP(OP_EXTRACTX_U2, "extractx_u2", IREG, XREG, NONE)
MINI_OP(OP_PREFETCH_MEMBASE, "prefetch_membase", NONE, IREG, NONE)
+MINI_OP(OP_CVTDQ2PD, "cvtdq2pd", XREG, XREG, NONE)
+MINI_OP(OP_CVTDQ2PS, "cvtdq2ps", XREG, XREG, NONE)
+MINI_OP(OP_CVTPD2DQ, "cvtpd2dq", XREG, XREG, NONE)
+MINI_OP(OP_CVTPD2PS, "cvtpd2ps", XREG, XREG, NONE)
+MINI_OP(OP_CVTPS2DQ, "cvtps2dq", XREG, XREG, NONE)
+MINI_OP(OP_CVTPS2PD, "cvtps2pd", XREG, XREG, NONE)
+MINI_OP(OP_CVTTPD2DQ, "cvttpd2dq", XREG, XREG, NONE)
+MINI_OP(OP_CVTTPS2DQ, "cvttps2dq", XREG, XREG, NONE)
+
#endif
MINI_OP(OP_XMOVE, "xmove", XREG, XREG, NONE)
*/
MINI_OP(OP_LIVERANGE_END, "liverange_end", NONE, NONE, NONE)
+/* GC support */
+/*
+ * mono_arch_output_basic_block () will set the backend.pc_offset field to the current pc
+ * offset.
+ */
+MINI_OP(OP_GC_LIVENESS_DEF, "gc_liveness_def", NONE, NONE, NONE)
+MINI_OP(OP_GC_LIVENESS_USE, "gc_liveness_use", NONE, NONE, NONE)
+
+/*
+ * This marks the location inside a basic block where a GC tracked spill slot has been
+ * defined. The spill slot is assumed to be alive until the end of the bblock.
+ */
+MINI_OP(OP_GC_SPILL_SLOT_LIVENESS_DEF, "gc_spill_slot_liveness_def", NONE, NONE, NONE)
+
+/*
+ * This marks the location inside a basic block where a GC tracked param area slot has
+ * been defined. The slot is assumed to be alive until the next call.
+ */
+MINI_OP(OP_GC_PARAM_SLOT_LIVENESS_DEF, "gc_param_slot_liveness_def", NONE, NONE, NONE)
+
/* Arch specific opcodes */
-#if defined(__i386__) || defined(__x86_64__)
+/* #if defined(__native_client_codegen__) || defined(__native_client__) */
+/* We have to define these in terms of the TARGET defines, not NaCl defines */
+/* because genmdesc.pl doesn't have multiple defines per platform. */
+#if defined(TARGET_AMD64) || defined(TARGET_X86) || defined(TARGET_ARM)
+MINI_OP(OP_NACL_GC_SAFE_POINT, "nacl_gc_safe_point", IREG, NONE, NONE)
+#endif
+
+#if defined(TARGET_X86) || defined(TARGET_AMD64)
MINI_OP(OP_X86_TEST_NULL, "x86_test_null", NONE, IREG, NONE)
MINI_OP(OP_X86_COMPARE_MEMBASE_REG,"x86_compare_membase_reg", NONE, IREG, IREG)
MINI_OP(OP_X86_COMPARE_MEMBASE_IMM,"x86_compare_membase_imm", NONE, IREG, NONE)
MINI_OP(OP_X86_FXCH, "x86_fxch", NONE, NONE, NONE)
#endif
-#if defined(__x86_64__)
-MINI_OP(OP_AMD64_TEST_NULL, "amd64_test_null", NONE, NONE, NONE)
+#if defined(TARGET_AMD64)
+MINI_OP(OP_AMD64_TEST_NULL, "amd64_test_null", NONE, IREG, NONE)
MINI_OP(OP_AMD64_SET_XMMREG_R4, "amd64_set_xmmreg_r4", FREG, FREG, NONE)
MINI_OP(OP_AMD64_SET_XMMREG_R8, "amd64_set_xmmreg_r8", FREG, FREG, NONE)
MINI_OP(OP_AMD64_ICOMPARE_MEMBASE_REG, "amd64_icompare_membase_reg", NONE, IREG, IREG)
MINI_OP(OP_AMD64_XOR_MEMBASE_IMM, "amd64_xor_membase_imm", NONE, IREG, NONE)
MINI_OP(OP_AMD64_MUL_MEMBASE_IMM, "amd64_mul_membase_imm", NONE, IREG, NONE)
-MINI_OP(OP_AMD64_ADD_REG_MEMBASE, "amd64_add_reg_membase", NONE, IREG, IREG)
-MINI_OP(OP_AMD64_SUB_REG_MEMBASE, "amd64_sub_reg_membase", NONE, IREG, IREG)
+MINI_OP(OP_AMD64_ADD_REG_MEMBASE, "amd64_add_reg_membase", IREG, IREG, IREG)
+MINI_OP(OP_AMD64_SUB_REG_MEMBASE, "amd64_sub_reg_membase", IREG, IREG, IREG)
MINI_OP(OP_AMD64_AND_REG_MEMBASE, "amd64_and_reg_membase", IREG, IREG, IREG)
MINI_OP(OP_AMD64_OR_REG_MEMBASE, "amd64_or_reg_membase", IREG, IREG, IREG)
MINI_OP(OP_AMD64_XOR_REG_MEMBASE, "amd64_xor_reg_membase", IREG, IREG, IREG)
-MINI_OP(OP_AMD64_MUL_REG_MEMBASE, "amd64_mul_reg_membase", NONE, IREG, IREG)
+MINI_OP(OP_AMD64_MUL_REG_MEMBASE, "amd64_mul_reg_membase", IREG, IREG, IREG)
MINI_OP(OP_AMD64_LOADI8_MEMINDEX, "amd64_loadi8_memindex", IREG, IREG, IREG)
MINI_OP(OP_AMD64_SAVE_SP_TO_LMF, "amd64_save_sp_to_lmf", NONE, NONE, NONE)
#endif
-#if defined(__ppc__) || defined(__powerpc__) || defined(__ppc64__)
+#if defined(__ppc__) || defined(__powerpc__) || defined(__ppc64__) || defined(TARGET_POWERPC)
MINI_OP(OP_PPC_SUBFIC, "ppc_subfic", IREG, IREG, NONE)
MINI_OP(OP_PPC_SUBFZE, "ppc_subfze", IREG, IREG, NONE)
MINI_OP(OP_CHECK_FINITE, "ppc_check_finite", NONE, IREG, NONE)
#endif
-#if defined(__arm__)
+#if defined(TARGET_ARM)
MINI_OP(OP_ARM_RSBS_IMM, "arm_rsbs_imm", IREG, IREG, NONE)
MINI_OP(OP_ARM_RSC_IMM, "arm_rsc_imm", IREG, IREG, NONE)
#endif
MINI_OP(OP_IA64_LOADR8_MEMBASE_INC,"ia64_loadr8_membase_inc", IREG, IREG, NONE)
#endif
-#if defined(__alpha__)
-MINI_OP(OP_ALPHA_CMP_EQ, "alpha_cmp_eq")
-MINI_OP(OP_ALPHA_CMP_IMM_EQ, "alpha_cmp_imm_eq")
-MINI_OP(OP_ALPHA_CMP_ULT, "alpha_cmp_ult")
-MINI_OP(OP_ALPHA_CMP_IMM_ULT, "alpha_cmp_imm_ult")
-MINI_OP(OP_ALPHA_CMP_ULE, "alpha_cmp_ule")
-MINI_OP(OP_ALPHA_CMP_IMM_ULE, "alpha_cmp_imm_ule")
-MINI_OP(OP_ALPHA_CMP_LT, "alpha_cmp_lt")
-MINI_OP(OP_ALPHA_CMP_IMM_LT, "alpha_cmp_imm_lt")
-MINI_OP(OP_ALPHA_CMP_LE, "alpha_cmp_le")
-MINI_OP(OP_ALPHA_CMP_IMM_LE, "alpha_cmp_imm_le")
-
-MINI_OP(OP_ALPHA_CMPT_EQ, "alpha_cmpt_eq")
-MINI_OP(OP_ALPHA_CMPT_EQ_SU, "alpha_cmpt_eq_su")
-MINI_OP(OP_ALPHA_CMPT_LT, "alpha_cmpt_lt")
-MINI_OP(OP_ALPHA_CMPT_LT_SU, "alpha_cmpt_lt_su")
-MINI_OP(OP_ALPHA_CMPT_LE, "alpha_cmpt_le")
-MINI_OP(OP_ALPHA_CMPT_LE_SU, "alpha_cmpt_le_su")
-MINI_OP(OP_ALPHA_CMPT_UN, "alpha_cmpt_un")
-MINI_OP(OP_ALPHA_CMPT_UN_SU, "alpha_cmpt_un_su")
-MINI_OP(OP_ALPHA_TRAPB, "alpha_trapb")
-
-#endif
-
#if defined(__mips__)
-MINI_OP(OP_LONG_SHRUN_32, "long_shrun_32", NONE, NONE, NONE)
-MINI_OP(OP_MIPS_BEQ, "mips_beq", NONE, NONE, NONE)
-MINI_OP(OP_MIPS_BGEZ, "mips_bgez", NONE, NONE, NONE)
-MINI_OP(OP_MIPS_BGTZ, "mips_bgtz", NONE, NONE, NONE)
-MINI_OP(OP_MIPS_BLEZ, "mips_blez", NONE, NONE, NONE)
-MINI_OP(OP_MIPS_BLTZ, "mips_bltz", NONE, NONE, NONE)
-MINI_OP(OP_MIPS_BNE, "mips_bne", NONE, NONE, NONE)
+MINI_OP(OP_MIPS_BEQ, "mips_beq", NONE, IREG, IREG)
+MINI_OP(OP_MIPS_BGEZ, "mips_bgez", NONE, IREG, NONE)
+MINI_OP(OP_MIPS_BGTZ, "mips_bgtz", NONE, IREG, NONE)
+MINI_OP(OP_MIPS_BLEZ, "mips_blez", NONE, IREG, NONE)
+MINI_OP(OP_MIPS_BLTZ, "mips_bltz", NONE, IREG, NONE)
+MINI_OP(OP_MIPS_BNE, "mips_bne", NONE, IREG, IREG)
MINI_OP(OP_MIPS_CVTSD, "mips_cvtsd", FREG, FREG, NONE)
MINI_OP(OP_MIPS_FBEQ, "mips_fbeq", NONE, FREG, FREG)
MINI_OP(OP_MIPS_FBGE, "mips_fbge", NONE, FREG, FREG)
#endif
-#if defined(__hppa)
-MINI_OP(OP_HPPA_BEQ, "hppa_beq", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_BGE, "hppa_bge", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_BGT, "hppa_bgt", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_BLE, "hppa_ble", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_BLT, "hppa_blt", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_BNE, "hppa_bne", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_BGE_UN, "hppa_bge_un", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_BGT_UN, "hppa_bgt_un", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_BLE_UN, "hppa_ble_un", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_BLT_UN, "hppa_blt_un", NONE, NONE, NONE)
-
-MINI_OP(OP_HPPA_CEQ, "hppa_ceq", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_CGT, "hppa_cgt", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_CGT_UN, "hppa_cgt_un", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_CLT, "hppa_clt", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_CLT_UN, "hppa_clt_un", NONE, NONE, NONE)
-
-MINI_OP(OP_HPPA_CEQ_IMM, "hppa_ceq_imm", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_CGT_IMM, "hppa_cgt_imm", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_CGT_UN_IMM, "hppa_cgt_un_imm", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_CLT_IMM, "hppa_clt_imm", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_CLT_UN_IMM, "hppa_clt_un_imm", NONE, NONE, NONE)
-
-MINI_OP(OP_HPPA_COND_EXC_EQ, "hppa_cond_exc_eq", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_COND_EXC_GE, "hppa_cond_exc_ge", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_COND_EXC_GT, "hppa_cond_exc_gt", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_COND_EXC_LE, "hppa_cond_exc_le", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_COND_EXC_LT, "hppa_cond_exc_lt", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_COND_EXC_NE_UN, "hppa_cond_exc_ne_un", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_COND_EXC_GE_UN, "hppa_cond_exc_ge_un", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_COND_EXC_GT_UN, "hppa_cond_exc_gt_un", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_COND_EXC_LE_UN, "hppa_cond_exc_le_un", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_COND_EXC_LT_UN, "hppa_cond_exc_lt_un", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_COND_EXC_OV, "hppa_cond_exc_ov", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_COND_EXC_NO, "hppa_cond_exc_no", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_COND_EXC_C, "hppa_cond_exc_c", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_COND_EXC_NC, "hppa_cond_exc_nc", NONE, NONE, NONE)
-
-MINI_OP(OP_HPPA_XMPYU, "hppa_xmpyu", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_ADD_OVF, "hppa_add_ovf", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_SUB_OVF, "hppa_sub_ovf", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_ADDC_OVF, "hppa_addc_ovf", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_SUBB_OVF, "hppa_subb_ovf", NONE, NONE, NONE)
-
-MINI_OP(OP_HPPA_OUTARG_R4CONST, "hppa_outarg_r4const", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_OUTARG_REGOFFSET, "hppa_outarg_regoffset", NONE, NONE, NONE)
-
-MINI_OP(OP_HPPA_LOADR4_LEFT, "hppa_loadr4_left", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_LOADR4_RIGHT, "hppa_loadr4_right", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_STORER4_LEFT, "hppa_storer4_left", NONE, NONE, NONE)
-MINI_OP(OP_HPPA_STORER4_RIGHT, "hppa_storer4_right", NONE, NONE, NONE)
-
-MINI_OP(OP_HPPA_SETF4REG, "hppa_setf4reg", NONE, NONE, NONE)
+/* Same as OUTARG_VT, but has a dreg */
+#ifdef ENABLE_LLVM
+MINI_OP(OP_LLVM_OUTARG_VT, "llvm_outarg_vt", IREG, VREG, NONE)
#endif
+
+MINI_OP(OP_OBJC_GET_SELECTOR, "objc_get_selector", IREG, NONE, NONE)
+
projects / mono.git / blobdiff