MINI_OP(OP_LCOMPARE_IMM, "lcompare_imm", NONE, LREG, NONE)
MINI_OP(OP_LOCAL, "local", NONE, NONE, NONE)
MINI_OP(OP_ARG, "arg", NONE, NONE, NONE)
-MINI_OP(OP_ARGLIST, "oparglist", NONE, IREG, NONE)
MINI_OP(OP_OUTARG_VT, "outarg_vt", NONE, VREG, NONE)
MINI_OP(OP_OUTARG_VTRETADDR, "outarg_vtretaddr", IREG, NONE, NONE)
+MINI_OP(OP_SETRET, "setret", NONE, IREG, NONE)
MINI_OP(OP_SETFRET, "setfret", FREG, FREG, NONE)
MINI_OP(OP_SETLRET, "setlret", NONE, IREG, IREG)
MINI_OP(OP_LOCALLOC, "localloc", IREG, IREG, NONE)
MINI_OP(OP_LOCALLOC_IMM, "localloc_imm", IREG, NONE, NONE)
MINI_OP(OP_CHECK_THIS, "checkthis", NONE, IREG, NONE)
+MINI_OP(OP_SEQ_POINT, "seq_point", NONE, NONE, NONE)
+MINI_OP(OP_IMPLICIT_EXCEPTION, "implicit_exception", NONE, NONE, NONE)
MINI_OP(OP_VOIDCALL, "voidcall", NONE, NONE, NONE)
MINI_OP(OP_VOIDCALLVIRT, "voidcallvirt", NONE, NONE, NONE)
MINI_OP(OP_VCALL2, "vcall2", NONE, NONE, NONE)
MINI_OP(OP_VCALL2_REG, "vcall2_reg", NONE, IREG, NONE)
MINI_OP(OP_VCALL2_MEMBASE, "vcall2_membase", NONE, IREG, NONE)
+MINI_OP(OP_DYN_CALL, "dyn_call", NONE, IREG, IREG)
MINI_OP(OP_ICONST, "iconst", IREG, NONE, NONE)
MINI_OP(OP_I8CONST, "i8const", LREG, NONE, NONE)
MINI_OP(OP_THROW, "throw", NONE, IREG, NONE)
MINI_OP(OP_RETHROW, "rethrow", NONE, IREG, NONE)
+/*
+ * Vararg calls are implemented as follows:
+ * - the caller emits a hidden argument just before the varargs argument. this
+ * 'signature cookie' argument contains the signature describing the the call.
+ * - all implicit arguments are passed in memory right after the signature cookie, i.e.
+ * the stack will look like this:
+ * <argn>
+ * ..
+ * <arg1>
+ * <sig cookie>
+ * - the OP_ARGLIST opcode in the callee computes the address of the sig cookie argument
+ * on the stack and saves it into its sreg1.
+ * - mono_ArgIterator_Setup receives this value and uses it to find the signature and
+ * the arguments.
+ */
+MINI_OP(OP_ARGLIST, "oparglist", NONE, IREG, NONE)
+
/* MONO_IS_STORE_MEMBASE depends on the order here */
MINI_OP(OP_STORE_MEMBASE_REG,"store_membase_reg", IREG, IREG, NONE)
MINI_OP(OP_STOREI1_MEMBASE_REG, "storei1_membase_reg", IREG, IREG, NONE)
MINI_OP(OP_STOREI2_MEMBASE_REG, "storei2_membase_reg", IREG, IREG, NONE)
MINI_OP(OP_STOREI4_MEMBASE_REG, "storei4_membase_reg", IREG, IREG, NONE)
-MINI_OP(OP_STOREI8_MEMBASE_REG, "storei8_membase_reg", IREG, IREG, NONE)
+MINI_OP(OP_STOREI8_MEMBASE_REG, "storei8_membase_reg", IREG, LREG, NONE)
MINI_OP(OP_STORER4_MEMBASE_REG, "storer4_membase_reg", IREG, FREG, NONE)
MINI_OP(OP_STORER8_MEMBASE_REG, "storer8_membase_reg", IREG, FREG, NONE)
-#ifdef MONO_ARCH_SUPPORT_SIMD_INTRINSICS
+#if defined(TARGET_X86) || defined(TARGET_AMD64)
MINI_OP(OP_STOREX_MEMBASE_REG, "storex_membase_reg", IREG, XREG, NONE)
MINI_OP(OP_STOREX_ALIGNED_MEMBASE_REG, "storex_aligned_membase_reg", IREG, XREG, NONE)
MINI_OP(OP_STOREX_NTA_MEMBASE_REG, "storex_nta_membase_reg", IREG, XREG, NONE)
MINI_OP(OP_LOADX_MEMBASE, "loadx_membase", XREG, IREG, NONE)
-#ifdef MONO_ARCH_SUPPORT_SIMD_INTRINSICS
+#if defined(TARGET_X86) || defined(TARGET_AMD64)
MINI_OP(OP_LOADX_ALIGNED_MEMBASE, "loadx_aligned_membase", XREG, IREG, NONE)
#endif
MINI_OP(OP_LOADV_MEMBASE, "loadv_membase", VREG, IREG, NONE)
/* indexed loads: dreg = load at (sreg1 + sreg2)*/
-MINI_OP(OP_LOAD_MEMINDEX, "load_memindex", NONE, NONE, NONE)
-MINI_OP(OP_LOADI1_MEMINDEX,"loadi1_memindex", NONE, NONE, NONE)
-MINI_OP(OP_LOADU1_MEMINDEX,"loadu1_memindex", NONE, NONE, NONE)
-MINI_OP(OP_LOADI2_MEMINDEX,"loadi2_memindex", NONE, NONE, NONE)
-MINI_OP(OP_LOADU2_MEMINDEX,"loadu2_memindex", NONE, NONE, NONE)
-MINI_OP(OP_LOADI4_MEMINDEX,"loadi4_memindex", NONE, NONE, NONE)
-MINI_OP(OP_LOADU4_MEMINDEX,"loadu4_memindex", NONE, NONE, NONE)
-MINI_OP(OP_LOADI8_MEMINDEX,"loadi8_memindex", NONE, NONE, NONE)
-MINI_OP(OP_LOADR4_MEMINDEX,"loadr4_memindex", NONE, NONE, NONE)
-MINI_OP(OP_LOADR8_MEMINDEX,"loadr8_memindex", NONE, NONE, NONE)
+MINI_OP(OP_LOAD_MEMINDEX, "load_memindex", IREG, IREG, IREG)
+MINI_OP(OP_LOADI1_MEMINDEX,"loadi1_memindex", IREG, IREG, IREG)
+MINI_OP(OP_LOADU1_MEMINDEX,"loadu1_memindex", IREG, IREG, IREG)
+MINI_OP(OP_LOADI2_MEMINDEX,"loadi2_memindex", IREG, IREG, IREG)
+MINI_OP(OP_LOADU2_MEMINDEX,"loadu2_memindex", IREG, IREG, IREG)
+MINI_OP(OP_LOADI4_MEMINDEX,"loadi4_memindex", IREG, IREG, IREG)
+MINI_OP(OP_LOADU4_MEMINDEX,"loadu4_memindex", IREG, IREG, IREG)
+MINI_OP(OP_LOADI8_MEMINDEX,"loadi8_memindex", IREG, IREG, IREG)
+MINI_OP(OP_LOADR4_MEMINDEX,"loadr4_memindex", FREG, IREG, IREG)
+MINI_OP(OP_LOADR8_MEMINDEX,"loadr8_memindex", FREG, IREG, IREG)
/* indexed stores: store sreg1 at (destbasereg + sreg2) */
/* MONO_IS_STORE_MEMINDEX depends on the order here */
-MINI_OP(OP_STORE_MEMINDEX,"store_memindex", NONE, NONE, NONE)
-MINI_OP(OP_STOREI1_MEMINDEX,"storei1_memindex", NONE, NONE, NONE)
-MINI_OP(OP_STOREI2_MEMINDEX,"storei2_memindex", NONE, NONE, NONE)
-MINI_OP(OP_STOREI4_MEMINDEX,"storei4_memindex", NONE, NONE, NONE)
-MINI_OP(OP_STOREI8_MEMINDEX,"storei8_memindex", NONE, NONE, NONE)
-MINI_OP(OP_STORER4_MEMINDEX,"storer4_memindex", NONE, NONE, NONE)
-MINI_OP(OP_STORER8_MEMINDEX,"storer8_memindex", NONE, NONE, NONE)
-
-MINI_OP(OP_LOADR8_SPILL_MEMBASE,"loadr8_spill_membase", NONE, NONE, NONE)
+MINI_OP(OP_STORE_MEMINDEX,"store_memindex", IREG, IREG, IREG)
+MINI_OP(OP_STOREI1_MEMINDEX,"storei1_memindex", IREG, IREG, IREG)
+MINI_OP(OP_STOREI2_MEMINDEX,"storei2_memindex", IREG, IREG, IREG)
+MINI_OP(OP_STOREI4_MEMINDEX,"storei4_memindex", IREG, IREG, IREG)
+MINI_OP(OP_STOREI8_MEMINDEX,"storei8_memindex", IREG, IREG, IREG)
+MINI_OP(OP_STORER4_MEMINDEX,"storer4_memindex", IREG, FREG, IREG)
+MINI_OP(OP_STORER8_MEMINDEX,"storer8_memindex", IREG, FREG, IREG)
+
MINI_OP(OP_LOAD_MEM,"load_mem", IREG, NONE, NONE)
MINI_OP(OP_LOADU1_MEM,"loadu1_mem", IREG, NONE, NONE)
MINI_OP(OP_LOADU2_MEM,"loadu2_mem", IREG, NONE, NONE)
MINI_OP(OP_FCLT, "float_clt", IREG, FREG, FREG)
MINI_OP(OP_FCLT_UN,"float_clt_un", IREG, FREG, FREG)
-MINI_OP(OP_FCEQ_MEMBASE, "float_ceq_membase", NONE, NONE, NONE)
-MINI_OP(OP_FCGT_MEMBASE, "float_cgt_membase", NONE, NONE, NONE)
-MINI_OP(OP_FCGT_UN_MEMBASE,"float_cgt_un_membase", NONE, NONE, NONE)
-MINI_OP(OP_FCLT_MEMBASE, "float_clt_membase", NONE, NONE, NONE)
-MINI_OP(OP_FCLT_UN_MEMBASE,"float_clt_un_membase", NONE, NONE, NONE)
+MINI_OP(OP_FCEQ_MEMBASE, "float_ceq_membase", IREG, FREG, IREG)
+MINI_OP(OP_FCGT_MEMBASE, "float_cgt_membase", IREG, FREG, IREG)
+MINI_OP(OP_FCGT_UN_MEMBASE,"float_cgt_un_membase", IREG, FREG, IREG)
+MINI_OP(OP_FCLT_MEMBASE, "float_clt_membase", IREG, FREG, IREG)
+MINI_OP(OP_FCLT_UN_MEMBASE,"float_clt_un_membase", IREG, FREG, IREG)
-MINI_OP(OP_FCONV_TO_U, "float_conv_to_u", NONE, NONE, NONE)
+MINI_OP(OP_FCONV_TO_U, "float_conv_to_u", IREG, FREG, NONE)
MINI_OP(OP_CKFINITE, "ckfinite", FREG, FREG, NONE)
/* Return the low 32 bits of a double vreg */
MINI_OP(OP_ENDFINALLY, "endfinally", NONE, NONE, NONE)
/* inline (long)int * (long)int */
-MINI_OP(OP_BIGMUL, "bigmul", NONE, NONE, NONE)
-MINI_OP(OP_BIGMUL_UN, "bigmul_un", NONE, NONE, NONE)
+MINI_OP(OP_BIGMUL, "bigmul", LREG, IREG, IREG)
+MINI_OP(OP_BIGMUL_UN, "bigmul_un", LREG, IREG, IREG)
MINI_OP(OP_IMIN_UN, "int_min_un", IREG, IREG, IREG)
MINI_OP(OP_IMAX_UN, "int_max_un", IREG, IREG, IREG)
MINI_OP(OP_LMIN_UN, "long_min_un", LREG, LREG, LREG)
MINI_OP(OP_ZEXT_I2, "zext_i2", IREG, IREG, NONE)
MINI_OP(OP_ZEXT_I4, "zext_i4", LREG, IREG, NONE)
MINI_OP(OP_CNE, "cne", NONE, NONE, NONE)
+MINI_OP(OP_TRUNC_I4, "trunc_i4", IREG, LREG, NONE)
/* to implement the upper half of long32 add and sub */
MINI_OP(OP_ADD_OVF_CARRY, "add_ovf_carry", IREG, IREG, IREG)
MINI_OP(OP_SUB_OVF_CARRY, "sub_ovf_carry", IREG, IREG, IREG)
MINI_OP(OP_SAVE_LMF, "save_lmf", NONE, NONE, NONE)
MINI_OP(OP_RESTORE_LMF, "restore_lmf", NONE, NONE, NONE)
+/* write barrier */
+MINI_OP(OP_CARD_TABLE_WBARRIER, "card_table_wbarrier", NONE, IREG, IREG)
+
/* arch-dep tls access */
MINI_OP(OP_TLS_GET, "tls_get", IREG, NONE, NONE)
/* SIMD opcodes. */
-#ifdef MONO_ARCH_SUPPORT_SIMD_INTRINSICS
+#if defined(TARGET_X86) || defined(TARGET_AMD64)
MINI_OP(OP_ADDPS, "addps", XREG, XREG, XREG)
MINI_OP(OP_DIVPS, "divps", XREG, XREG, XREG)
MINI_OP(OP_ADDSUBPD, "addsubpd", XREG, XREG, XREG)
MINI_OP(OP_DUPPD, "duppd", XREG, XREG, NONE)
+MINI_OP(OP_SQRTPD, "sqrtpd", XREG, XREG, NONE)
+
MINI_OP(OP_EXTRACT_MASK, "extract_mask", IREG, XREG, NONE)
MINI_OP(OP_PAND, "pand", XREG, XREG, XREG)
MINI_OP(OP_XCONV_R8_TO_I4, "xconv_r8_to_i4", IREG, XREG, NONE)
MINI_OP(OP_ICONV_TO_X, "iconv_to_x", XREG, IREG, NONE)
+MINI_OP(OP_EXPAND_I1, "expand_i1", XREG, IREG, NONE)
+MINI_OP(OP_EXPAND_I2, "expand_i2", XREG, IREG, NONE)
+MINI_OP(OP_EXPAND_I4, "expand_i4", XREG, IREG, NONE)
+MINI_OP(OP_EXPAND_R4, "expand_r4", XREG, FREG, NONE)
+MINI_OP(OP_EXPAND_I8, "expand_i8", XREG, IREG, NONE)
+MINI_OP(OP_EXPAND_R8, "expand_r8", XREG, FREG, NONE)
MINI_OP(OP_PREFETCH_MEMBASE, "prefetch_membase", NONE, IREG, NONE)
MINI_OP(OP_XMOVE, "xmove", XREG, XREG, NONE)
MINI_OP(OP_XZERO, "xzero", XREG, NONE, NONE)
+MINI_OP(OP_XPHI, "xphi", XREG, NONE, NONE)
/* Atomic specific
MINI_OP(OP_ATOMIC_EXCHANGE_I8, "atomic_exchange_i8", IREG, IREG, IREG)
MINI_OP(OP_MEMORY_BARRIER, "memory_barrier", NONE, NONE, NONE)
-/* CompareExchange where the value to store is a constant */
-/* backend->data holds the constant value */
-MINI_OP(OP_ATOMIC_CAS_IMM_I4, "atomic_cas_imm_i4", IREG, IREG, IREG)
-MINI_OP(OP_ATOMIC_CAS_IMM_I8, "atomic_cas_imm_i8", IREG, IREG, IREG)
+MINI_OP3(OP_ATOMIC_CAS_I4, "atomic_cas_i4", IREG, IREG, IREG, IREG)
+MINI_OP3(OP_ATOMIC_CAS_I8, "atomic_cas_i8", IREG, IREG, IREG, IREG)
/* Conditional move opcodes.
* Must be in the same order as the matching CEE_B... opcodes
MINI_OP(OP_CMOV_LLE_UN, "cmov_lle_un", IREG, IREG, IREG)
MINI_OP(OP_CMOV_LLT_UN, "cmov_llt_un", IREG, IREG, IREG)
+/* Debugging support */
+/*
+ * Marks the start of the live range of the variable in inst_c0, that is the
+ * first instruction where the variable has a value.
+ */
+MINI_OP(OP_LIVERANGE_START, "liverange_start", NONE, NONE, NONE)
+/*
+ * Marks the end of the live range of the variable in inst_c0, that is the
+ * first instruction where the variable no longer has a value.
+ */
+MINI_OP(OP_LIVERANGE_END, "liverange_end", NONE, NONE, NONE)
+
+/* GC support */
+/*
+ * mono_arch_output_basic_block () will set the backend.pc_offset field to the current pc
+ * offset.
+ */
+MINI_OP(OP_GC_LIVENESS_DEF, "gc_liveness_def", NONE, NONE, NONE)
+MINI_OP(OP_GC_LIVENESS_USE, "gc_liveness_use", NONE, NONE, NONE)
+
+/*
+ * This marks the location inside a basic block where a GC tracked spill slot has been
+ * defined. The spill slot is assumed to be alive until the end of the bblock.
+ */
+MINI_OP(OP_GC_SPILL_SLOT_LIVENESS_DEF, "gc_spill_slot_liveness_def", NONE, NONE, NONE)
+
+/*
+ * This marks the location inside a basic block where a GC tracked param area slot has
+ * been defined. The slot is assumed to be alive until the next call.
+ */
+MINI_OP(OP_GC_PARAM_SLOT_LIVENESS_DEF, "gc_param_slot_liveness_def", NONE, NONE, NONE)
+
/* Arch specific opcodes */
-#if defined(__i386__) || defined(__x86_64__)
-MINI_OP(OP_X86_TEST_NULL, "x86_test_null", NONE, NONE, NONE)
+/* #if defined(__native_client_codegen__) || defined(__native_client__) */
+/* We have to define these in terms of the TARGET defines, not NaCl defines */
+/* because genmdesc.pl doesn't have multiple defines per platform. */
+#if defined(TARGET_AMD64) || defined(TARGET_X86)
+MINI_OP(OP_NACL_GC_SAFE_POINT, "nacl_gc_safe_point", IREG, NONE, NONE)
+#endif
+
+#if defined(TARGET_X86) || defined(TARGET_AMD64)
+MINI_OP(OP_X86_TEST_NULL, "x86_test_null", NONE, IREG, NONE)
MINI_OP(OP_X86_COMPARE_MEMBASE_REG,"x86_compare_membase_reg", NONE, IREG, IREG)
MINI_OP(OP_X86_COMPARE_MEMBASE_IMM,"x86_compare_membase_imm", NONE, IREG, NONE)
MINI_OP(OP_X86_COMPARE_MEM_IMM, "x86_compare_mem_imm", NONE, NONE, NONE)
MINI_OP(OP_X86_COMPARE_MEMBASE8_IMM,"x86_compare_membase8_imm", NONE, IREG, NONE)
MINI_OP(OP_X86_COMPARE_REG_MEMBASE,"x86_compare_reg_membase", NONE, IREG, IREG)
-MINI_OP(OP_X86_INC_REG, "x86_inc_reg", NONE, NONE, NONE)
+MINI_OP(OP_X86_INC_REG, "x86_inc_reg", IREG, IREG, NONE)
MINI_OP(OP_X86_INC_MEMBASE, "x86_inc_membase", NONE, IREG, NONE)
-MINI_OP(OP_X86_DEC_REG, "x86_dec_reg", NONE, NONE, NONE)
+MINI_OP(OP_X86_DEC_REG, "x86_dec_reg", IREG, IREG, NONE)
MINI_OP(OP_X86_DEC_MEMBASE, "x86_dec_membase", NONE, IREG, NONE)
MINI_OP(OP_X86_ADD_MEMBASE_IMM, "x86_add_membase_imm", NONE, IREG, NONE)
MINI_OP(OP_X86_SUB_MEMBASE_IMM, "x86_sub_membase_imm", NONE, IREG, NONE)
MINI_OP(OP_X86_XOR_MEMBASE_REG, "x86_xor_membase_reg", NONE, IREG, IREG)
MINI_OP(OP_X86_MUL_MEMBASE_REG, "x86_mul_membase_reg", NONE, IREG, IREG)
-MINI_OP(OP_X86_ADD_REG_MEMBASE, "x86_add_reg_membase", NONE, IREG, IREG)
-MINI_OP(OP_X86_SUB_REG_MEMBASE, "x86_sub_reg_membase", NONE, IREG, IREG)
-MINI_OP(OP_X86_MUL_REG_MEMBASE, "x86_mul_reg_membase", NONE, IREG, IREG)
+MINI_OP(OP_X86_ADD_REG_MEMBASE, "x86_add_reg_membase", IREG, IREG, IREG)
+MINI_OP(OP_X86_SUB_REG_MEMBASE, "x86_sub_reg_membase", IREG, IREG, IREG)
+MINI_OP(OP_X86_MUL_REG_MEMBASE, "x86_mul_reg_membase", IREG, IREG, IREG)
MINI_OP(OP_X86_AND_REG_MEMBASE, "x86_and_reg_membase", IREG, IREG, IREG)
MINI_OP(OP_X86_OR_REG_MEMBASE, "x86_or_reg_membase", IREG, IREG, IREG)
MINI_OP(OP_X86_XOR_REG_MEMBASE, "x86_xor_reg_membase", IREG, IREG, IREG)
MINI_OP(OP_X86_PUSH_GOT_ENTRY, "x86_push_got_entry", NONE, IREG, NONE)
MINI_OP(OP_X86_LEA, "x86_lea", IREG, IREG, IREG)
MINI_OP(OP_X86_LEA_MEMBASE, "x86_lea_membase", IREG, IREG, NONE)
-MINI_OP(OP_X86_XCHG, "x86_xchg", NONE, NONE, NONE)
+MINI_OP(OP_X86_XCHG, "x86_xchg", NONE, IREG, IREG)
MINI_OP(OP_X86_FPOP, "x86_fpop", NONE, FREG, NONE)
-MINI_OP(OP_X86_FP_LOAD_I8, "x86_fp_load_i8", NONE, NONE, NONE)
-MINI_OP(OP_X86_FP_LOAD_I4, "x86_fp_load_i4", NONE, NONE, NONE)
+MINI_OP(OP_X86_FP_LOAD_I8, "x86_fp_load_i8", FREG, IREG, NONE)
+MINI_OP(OP_X86_FP_LOAD_I4, "x86_fp_load_i4", FREG, IREG, NONE)
MINI_OP(OP_X86_SETEQ_MEMBASE, "x86_seteq_membase", NONE, IREG, NONE)
MINI_OP(OP_X86_SETNE_MEMBASE, "x86_setne_membase", NONE, IREG, NONE)
MINI_OP(OP_X86_FXCH, "x86_fxch", NONE, NONE, NONE)
#endif
-#if defined(__x86_64__)
-MINI_OP(OP_AMD64_TEST_NULL, "amd64_test_null", NONE, NONE, NONE)
+#if defined(TARGET_AMD64)
+MINI_OP(OP_AMD64_TEST_NULL, "amd64_test_null", NONE, IREG, NONE)
MINI_OP(OP_AMD64_SET_XMMREG_R4, "amd64_set_xmmreg_r4", FREG, FREG, NONE)
MINI_OP(OP_AMD64_SET_XMMREG_R8, "amd64_set_xmmreg_r8", FREG, FREG, NONE)
MINI_OP(OP_AMD64_ICOMPARE_MEMBASE_REG, "amd64_icompare_membase_reg", NONE, IREG, IREG)
MINI_OP(OP_AMD64_XOR_MEMBASE_IMM, "amd64_xor_membase_imm", NONE, IREG, NONE)
MINI_OP(OP_AMD64_MUL_MEMBASE_IMM, "amd64_mul_membase_imm", NONE, IREG, NONE)
-MINI_OP(OP_AMD64_ADD_REG_MEMBASE, "amd64_add_reg_membase", NONE, IREG, IREG)
-MINI_OP(OP_AMD64_SUB_REG_MEMBASE, "amd64_sub_reg_membase", NONE, IREG, IREG)
+MINI_OP(OP_AMD64_ADD_REG_MEMBASE, "amd64_add_reg_membase", IREG, IREG, IREG)
+MINI_OP(OP_AMD64_SUB_REG_MEMBASE, "amd64_sub_reg_membase", IREG, IREG, IREG)
MINI_OP(OP_AMD64_AND_REG_MEMBASE, "amd64_and_reg_membase", IREG, IREG, IREG)
MINI_OP(OP_AMD64_OR_REG_MEMBASE, "amd64_or_reg_membase", IREG, IREG, IREG)
MINI_OP(OP_AMD64_XOR_REG_MEMBASE, "amd64_xor_reg_membase", IREG, IREG, IREG)
-MINI_OP(OP_AMD64_MUL_REG_MEMBASE, "amd64_mul_reg_membase", NONE, IREG, IREG)
+MINI_OP(OP_AMD64_MUL_REG_MEMBASE, "amd64_mul_reg_membase", IREG, IREG, IREG)
-MINI_OP(OP_AMD64_LOADI8_MEMINDEX, "amd64_loadi8_memindex", NONE, NONE, NONE)
+MINI_OP(OP_AMD64_LOADI8_MEMINDEX, "amd64_loadi8_memindex", IREG, IREG, IREG)
MINI_OP(OP_AMD64_SAVE_SP_TO_LMF, "amd64_save_sp_to_lmf", NONE, NONE, NONE)
#endif
-#if defined(__ppc__) || defined(__powerpc__) || defined(__ppc64__)
+#if defined(__ppc__) || defined(__powerpc__) || defined(__ppc64__) || defined(TARGET_POWERPC)
MINI_OP(OP_PPC_SUBFIC, "ppc_subfic", IREG, IREG, NONE)
MINI_OP(OP_PPC_SUBFZE, "ppc_subfze", IREG, IREG, NONE)
MINI_OP(OP_CHECK_FINITE, "ppc_check_finite", NONE, IREG, NONE)
#endif
-#if defined(__arm__)
+#if defined(TARGET_ARM)
MINI_OP(OP_ARM_RSBS_IMM, "arm_rsbs_imm", IREG, IREG, NONE)
MINI_OP(OP_ARM_RSC_IMM, "arm_rsc_imm", IREG, IREG, NONE)
#endif
MINI_OP(OP_IA64_STORER4, "ia64_storer4", NONE, NONE, NONE)
MINI_OP(OP_IA64_STORER8, "ia64_storer8", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_EQ, "ia64_cmp4_eq", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_NE, "ia64_cmp4_ne", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_LE, "ia64_cmp4_le", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_LT, "ia64_cmp4_lt", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_GE, "ia64_cmp4_ge", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_GT, "ia64_cmp4_gt", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_LE_UN, "ia64_cmp4_le_un", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_LT_UN, "ia64_cmp4_lt_un", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_GE_UN, "ia64_cmp4_ge_un", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_GT_UN, "ia64_cmp4_gt_un", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_EQ, "ia64_cmp_eq", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_NE, "ia64_cmp_ne", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_LE, "ia64_cmp_le", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_LT, "ia64_cmp_lt", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_GE, "ia64_cmp_ge", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_GT, "ia64_cmp_gt", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_LT_UN, "ia64_cmp_lt_un", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_GT_UN, "ia64_cmp_gt_un", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_GE_UN, "ia64_cmp_ge_un", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_LE_UN, "ia64_cmp_le_un", NONE, NONE, NONE)
-
-MINI_OP(OP_IA64_CMP4_EQ_IMM, "ia64_cmp4_eq_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_NE_IMM, "ia64_cmp4_ne_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_LE_IMM, "ia64_cmp4_le_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_LT_IMM, "ia64_cmp4_lt_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_GE_IMM, "ia64_cmp4_ge_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_GT_IMM, "ia64_cmp4_gt_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_LE_UN_IMM, "ia64_cmp4_le_un_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_LT_UN_IMM, "ia64_cmp4_lt_un_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_GE_UN_IMM, "ia64_cmp4_ge_un_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP4_GT_UN_IMM, "ia64_cmp4_gt_un_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_EQ_IMM, "ia64_cmp_eq_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_NE_IMM, "ia64_cmp_ne_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_LE_IMM, "ia64_cmp_le_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_LT_IMM, "ia64_cmp_lt_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_GE_IMM, "ia64_cmp_ge_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_GT_IMM, "ia64_cmp_gt_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_LT_UN_IMM, "ia64_cmp_lt_un_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_GT_UN_IMM, "ia64_cmp_gt_un_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_GE_UN_IMM, "ia64_cmp_ge_un_imm", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CMP_LE_UN_IMM, "ia64_cmp_le_un_imm", NONE, NONE, NONE)
-
-MINI_OP(OP_IA64_FCMP_EQ, "ia64_fcmp_eq", NONE, NONE, NONE)
-MINI_OP(OP_IA64_FCMP_NE, "ia64_fcmp_ne", NONE, NONE, NONE)
-MINI_OP(OP_IA64_FCMP_LE, "ia64_fcmp_le", NONE, NONE, NONE)
-MINI_OP(OP_IA64_FCMP_LT, "ia64_fcmp_lt", NONE, NONE, NONE)
-MINI_OP(OP_IA64_FCMP_GE, "ia64_fcmp_ge", NONE, NONE, NONE)
-MINI_OP(OP_IA64_FCMP_GT, "ia64_fcmp_gt", NONE, NONE, NONE)
-MINI_OP(OP_IA64_FCMP_LT_UN, "ia64_fcmp_lt_un", NONE, NONE, NONE)
-MINI_OP(OP_IA64_FCMP_GT_UN, "ia64_fcmp_gt_un", NONE, NONE, NONE)
-MINI_OP(OP_IA64_FCMP_GE_UN, "ia64_fcmp_ge_un", NONE, NONE, NONE)
-MINI_OP(OP_IA64_FCMP_LE_UN, "ia64_fcmp_le_un", NONE, NONE, NONE)
+MINI_OP(OP_IA64_CMP4_EQ, "ia64_cmp4_eq", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP4_NE, "ia64_cmp4_ne", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP4_LE, "ia64_cmp4_le", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP4_LT, "ia64_cmp4_lt", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP4_GE, "ia64_cmp4_ge", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP4_GT, "ia64_cmp4_gt", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP4_LE_UN, "ia64_cmp4_le_un", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP4_LT_UN, "ia64_cmp4_lt_un", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP4_GE_UN, "ia64_cmp4_ge_un", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP4_GT_UN, "ia64_cmp4_gt_un", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP_EQ, "ia64_cmp_eq", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP_NE, "ia64_cmp_ne", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP_LE, "ia64_cmp_le", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP_LT, "ia64_cmp_lt", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP_GE, "ia64_cmp_ge", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP_GT, "ia64_cmp_gt", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP_LT_UN, "ia64_cmp_lt_un", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP_GT_UN, "ia64_cmp_gt_un", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP_GE_UN, "ia64_cmp_ge_un", NONE, IREG, IREG)
+MINI_OP(OP_IA64_CMP_LE_UN, "ia64_cmp_le_un", NONE, IREG, IREG)
+
+MINI_OP(OP_IA64_CMP4_EQ_IMM, "ia64_cmp4_eq_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP4_NE_IMM, "ia64_cmp4_ne_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP4_LE_IMM, "ia64_cmp4_le_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP4_LT_IMM, "ia64_cmp4_lt_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP4_GE_IMM, "ia64_cmp4_ge_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP4_GT_IMM, "ia64_cmp4_gt_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP4_LE_UN_IMM, "ia64_cmp4_le_un_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP4_LT_UN_IMM, "ia64_cmp4_lt_un_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP4_GE_UN_IMM, "ia64_cmp4_ge_un_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP4_GT_UN_IMM, "ia64_cmp4_gt_un_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP_EQ_IMM, "ia64_cmp_eq_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP_NE_IMM, "ia64_cmp_ne_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP_LE_IMM, "ia64_cmp_le_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP_LT_IMM, "ia64_cmp_lt_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP_GE_IMM, "ia64_cmp_ge_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP_GT_IMM, "ia64_cmp_gt_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP_LT_UN_IMM, "ia64_cmp_lt_un_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP_GT_UN_IMM, "ia64_cmp_gt_un_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP_GE_UN_IMM, "ia64_cmp_ge_un_imm", NONE, NONE, IREG)
+MINI_OP(OP_IA64_CMP_LE_UN_IMM, "ia64_cmp_le_un_imm", NONE, NONE, IREG)
+
+MINI_OP(OP_IA64_FCMP_EQ, "ia64_fcmp_eq", NONE, IREG, IREG)
+MINI_OP(OP_IA64_FCMP_NE, "ia64_fcmp_ne", NONE, IREG, IREG)
+MINI_OP(OP_IA64_FCMP_LE, "ia64_fcmp_le", NONE, IREG, IREG)
+MINI_OP(OP_IA64_FCMP_LT, "ia64_fcmp_lt", NONE, IREG, IREG)
+MINI_OP(OP_IA64_FCMP_GE, "ia64_fcmp_ge", NONE, IREG, IREG)
+MINI_OP(OP_IA64_FCMP_GT, "ia64_fcmp_gt", NONE, IREG, IREG)
+MINI_OP(OP_IA64_FCMP_LT_UN, "ia64_fcmp_lt_un", NONE, IREG, IREG)
+MINI_OP(OP_IA64_FCMP_GT_UN, "ia64_fcmp_gt_un", NONE, IREG, IREG)
+MINI_OP(OP_IA64_FCMP_GE_UN, "ia64_fcmp_ge_un", NONE, IREG, IREG)
+MINI_OP(OP_IA64_FCMP_LE_UN, "ia64_fcmp_le_un", NONE, IREG, IREG)
MINI_OP(OP_IA64_BR_COND, "ia64_br_cond", NONE, NONE, NONE)
MINI_OP(OP_IA64_COND_EXC, "ia64_cond_exc", NONE, NONE, NONE)
-MINI_OP(OP_IA64_CSET, "ia64_cset", NONE, NONE, NONE)
-
-MINI_OP(OP_IA64_STOREI1_MEMBASE_INC_REG, "ia64_storei1_membase_inc_reg", NONE, NONE, NONE)
-MINI_OP(OP_IA64_STOREI2_MEMBASE_INC_REG, "ia64_storei2_membase_inc_reg", NONE, NONE, NONE)
-MINI_OP(OP_IA64_STOREI4_MEMBASE_INC_REG, "ia64_storei4_membase_inc_reg", NONE, NONE, NONE)
-MINI_OP(OP_IA64_STOREI8_MEMBASE_INC_REG, "ia64_storei8_membase_inc_reg", NONE, NONE, NONE)
-MINI_OP(OP_IA64_STORER4_MEMBASE_INC_REG, "ia64_storer4_membase_inc_reg", NONE, NONE, NONE)
-MINI_OP(OP_IA64_STORER8_MEMBASE_INC_REG, "ia64_storer8_membase_inc_reg", NONE, NONE, NONE)
-MINI_OP(OP_IA64_LOADI1_MEMBASE_INC,"ia64_loadi1_membase_inc", NONE, NONE, NONE)
-MINI_OP(OP_IA64_LOADU1_MEMBASE_INC,"ia64_loadu1_membase_inc", NONE, NONE, NONE)
-MINI_OP(OP_IA64_LOADI2_MEMBASE_INC,"ia64_loadi2_membase_inc", NONE, NONE, NONE)
-MINI_OP(OP_IA64_LOADU2_MEMBASE_INC,"ia64_loadu2_membase_inc", NONE, NONE, NONE)
-MINI_OP(OP_IA64_LOADI4_MEMBASE_INC,"ia64_loadi4_membase_inc", NONE, NONE, NONE)
-MINI_OP(OP_IA64_LOADU4_MEMBASE_INC,"ia64_loadu4_membase_inc", NONE, NONE, NONE)
-MINI_OP(OP_IA64_LOADI8_MEMBASE_INC,"ia64_loadi8_membase_inc", NONE, NONE, NONE)
-MINI_OP(OP_IA64_LOADR4_MEMBASE_INC,"ia64_loadr4_membase_inc", NONE, NONE, NONE)
-MINI_OP(OP_IA64_LOADR8_MEMBASE_INC,"ia64_loadr8_membase_inc", NONE, NONE, NONE)
+MINI_OP(OP_IA64_CSET, "ia64_cset", IREG, NONE, NONE)
+
+MINI_OP(OP_IA64_STOREI1_MEMBASE_INC_REG, "ia64_storei1_membase_inc_reg", IREG, IREG, NONE)
+MINI_OP(OP_IA64_STOREI2_MEMBASE_INC_REG, "ia64_storei2_membase_inc_reg", IREG, IREG, NONE)
+MINI_OP(OP_IA64_STOREI4_MEMBASE_INC_REG, "ia64_storei4_membase_inc_reg", IREG, IREG, NONE)
+MINI_OP(OP_IA64_STOREI8_MEMBASE_INC_REG, "ia64_storei8_membase_inc_reg", IREG, IREG, NONE)
+MINI_OP(OP_IA64_STORER4_MEMBASE_INC_REG, "ia64_storer4_membase_inc_reg", IREG, IREG, NONE)
+MINI_OP(OP_IA64_STORER8_MEMBASE_INC_REG, "ia64_storer8_membase_inc_reg", IREG, IREG, NONE)
+MINI_OP(OP_IA64_LOADI1_MEMBASE_INC,"ia64_loadi1_membase_inc", IREG, IREG, NONE)
+MINI_OP(OP_IA64_LOADU1_MEMBASE_INC,"ia64_loadu1_membase_inc", IREG, IREG, NONE)
+MINI_OP(OP_IA64_LOADI2_MEMBASE_INC,"ia64_loadi2_membase_inc", IREG, IREG, NONE)
+MINI_OP(OP_IA64_LOADU2_MEMBASE_INC,"ia64_loadu2_membase_inc", IREG, IREG, NONE)
+MINI_OP(OP_IA64_LOADI4_MEMBASE_INC,"ia64_loadi4_membase_inc", IREG, IREG, NONE)
+MINI_OP(OP_IA64_LOADU4_MEMBASE_INC,"ia64_loadu4_membase_inc", IREG, IREG, NONE)
+MINI_OP(OP_IA64_LOADI8_MEMBASE_INC,"ia64_loadi8_membase_inc", IREG, IREG, NONE)
+MINI_OP(OP_IA64_LOADR4_MEMBASE_INC,"ia64_loadr4_membase_inc", IREG, IREG, NONE)
+MINI_OP(OP_IA64_LOADR8_MEMBASE_INC,"ia64_loadr8_membase_inc", IREG, IREG, NONE)
#endif
#if defined(__alpha__)
#endif
#if defined(__mips__)
-MINI_OP(OP_LONG_SHRUN_32, "long_shrun_32", NONE, NONE, NONE)
-MINI_OP(OP_MIPS_BEQ, "mips_beq", NONE, NONE, NONE)
-MINI_OP(OP_MIPS_BGEZ, "mips_bgez", NONE, NONE, NONE)
-MINI_OP(OP_MIPS_BGTZ, "mips_bgtz", NONE, NONE, NONE)
-MINI_OP(OP_MIPS_BLEZ, "mips_blez", NONE, NONE, NONE)
-MINI_OP(OP_MIPS_BLTZ, "mips_bltz", NONE, NONE, NONE)
-MINI_OP(OP_MIPS_BNE, "mips_bne", NONE, NONE, NONE)
+MINI_OP(OP_MIPS_BEQ, "mips_beq", NONE, IREG, IREG)
+MINI_OP(OP_MIPS_BGEZ, "mips_bgez", NONE, IREG, NONE)
+MINI_OP(OP_MIPS_BGTZ, "mips_bgtz", NONE, IREG, NONE)
+MINI_OP(OP_MIPS_BLEZ, "mips_blez", NONE, IREG, NONE)
+MINI_OP(OP_MIPS_BLTZ, "mips_bltz", NONE, IREG, NONE)
+MINI_OP(OP_MIPS_BNE, "mips_bne", NONE, IREG, IREG)
MINI_OP(OP_MIPS_CVTSD, "mips_cvtsd", FREG, FREG, NONE)
MINI_OP(OP_MIPS_FBEQ, "mips_fbeq", NONE, FREG, FREG)
MINI_OP(OP_MIPS_FBGE, "mips_fbge", NONE, FREG, FREG)
MINI_OP(OP_MIPS_FBTRUE, "mips_fbtrue", NONE, NONE, NONE)
MINI_OP(OP_MIPS_LWC1, "mips_lwc1", NONE, NONE, NONE)
MINI_OP(OP_MIPS_MTC1S, "mips_mtc1_s", FREG, IREG, NONE)
+MINI_OP(OP_MIPS_MTC1S_2, "mips_mtc1_s2", FREG, IREG, IREG)
MINI_OP(OP_MIPS_MFC1S, "mips_mfc1_s", IREG, FREG, NONE)
MINI_OP(OP_MIPS_MTC1D, "mips_mtc1_d", FREG, IREG, NONE)
MINI_OP(OP_MIPS_MFC1D, "mips_mfc1_d", IREG, FREG, NONE)
MINI_OP(OP_MIPS_NOP, "mips_nop", NONE, NONE, NONE)
-MINI_OP(OP_MIPS_SLTI, "mips_slti", IREG, IREG, IREG)
+MINI_OP(OP_MIPS_SLTI, "mips_slti", IREG, IREG, NONE)
MINI_OP(OP_MIPS_SLT, "mips_slt", IREG, IREG, IREG)
-MINI_OP(OP_MIPS_SLTIU, "mips_sltiu", IREG, IREG, IREG)
+MINI_OP(OP_MIPS_SLTIU, "mips_sltiu", IREG, IREG, NONE)
MINI_OP(OP_MIPS_SLTU, "mips_sltu", IREG, IREG, IREG)
-MINI_OP(OP_MIPS_XORI, "mips_xori", IREG, IREG, IREG)
MINI_OP(OP_MIPS_COND_EXC_EQ, "mips_cond_exc_eq", NONE, IREG, IREG)
MINI_OP(OP_MIPS_COND_EXC_GE, "mips_cond_exc_ge", NONE, IREG, IREG)
MINI_OP(OP_HPPA_SETF4REG, "hppa_setf4reg", NONE, NONE, NONE)
#endif
+
+/* Same as OUTARG_VT, but has a dreg */
+#ifdef ENABLE_LLVM
+MINI_OP(OP_LLVM_OUTARG_VT, "llvm_outarg_vt", IREG, VREG, NONE)
+#endif
projects / mono.git / blobdiff