#include <mono/metadata/debug-helpers.h>
#include <mono/metadata/threads.h>
#include <mono/metadata/profiler-private.h>
+#include <mono/metadata/mempool-internals.h>
#include <mono/utils/mono-math.h>
#include "mini.h"
#define MONO_ARCH_CALLEE_XREGS 0
#endif
+
+
+#define MONO_ARCH_BANK_MIRRORED -2
+
+#ifdef MONO_ARCH_USE_SHARED_FP_SIMD_BANK
+
+#ifndef MONO_ARCH_NEED_SIMD_BANK
+#error "MONO_ARCH_USE_SHARED_FP_SIMD_BANK needs MONO_ARCH_NEED_SIMD_BANK to work"
+#endif
+
+#define get_mirrored_bank(bank) (((bank) == MONO_REG_SIMD ) ? MONO_REG_DOUBLE : (((bank) == MONO_REG_DOUBLE ) ? MONO_REG_SIMD : -1))
+
+#define is_hreg_mirrored(rs, bank, hreg) ((rs)->symbolic [(bank)] [(hreg)] == MONO_ARCH_BANK_MIRRORED)
+
+
+#else
+
+
+#define get_mirrored_bank(bank) (-1)
+
+#define is_hreg_mirrored(rs, bank, hreg) (0)
+
+#endif
+
+
+/* If the bank is mirrored return the true logical bank that the register in the
+ * physical register bank is allocated to.
+ */
+static inline int translate_bank (MonoRegState *rs, int bank, int hreg) {
+ return is_hreg_mirrored (rs, bank, hreg) ? get_mirrored_bank (bank) : bank;
+}
+
/*
* Every hardware register belongs to a register type or register bank. bank 0
* contains the int registers, bank 1 contains the fp registers.
static const int regbank_size [] = {
MONO_MAX_IREGS,
MONO_MAX_FREGS,
+ MONO_MAX_IREGS,
+ MONO_MAX_IREGS,
MONO_MAX_XREGS
};
static const int regbank_load_ops [] = {
- OP_LOAD_MEMBASE,
+ OP_LOADR_MEMBASE,
OP_LOADR8_MEMBASE,
+ OP_LOADR_MEMBASE,
+ OP_LOADR_MEMBASE,
OP_LOADX_MEMBASE
};
static const int regbank_store_ops [] = {
- OP_STORE_MEMBASE_REG,
+ OP_STORER_MEMBASE_REG,
OP_STORER8_MEMBASE_REG,
+ OP_STORER_MEMBASE_REG,
+ OP_STORER_MEMBASE_REG,
OP_STOREX_MEMBASE
};
static const int regbank_move_ops [] = {
OP_MOVE,
OP_FMOVE,
+ OP_MOVE,
+ OP_MOVE,
OP_XMOVE
};
static const regmask_t regbank_callee_saved_regs [] = {
MONO_ARCH_CALLEE_SAVED_REGS,
MONO_ARCH_CALLEE_SAVED_FREGS,
+ MONO_ARCH_CALLEE_SAVED_REGS,
+ MONO_ARCH_CALLEE_SAVED_REGS,
MONO_ARCH_CALLEE_SAVED_XREGS,
};
static const regmask_t regbank_callee_regs [] = {
MONO_ARCH_CALLEE_REGS,
MONO_ARCH_CALLEE_FREGS,
+ MONO_ARCH_CALLEE_REGS,
+ MONO_ARCH_CALLEE_REGS,
MONO_ARCH_CALLEE_XREGS,
};
static const int regbank_spill_var_size[] = {
- sizeof (gpointer),
+ sizeof (mgreg_t),
sizeof (double),
+ sizeof (mgreg_t),
+ sizeof (mgreg_t),
16 /*FIXME make this a constant. Maybe MONO_ARCH_SIMD_VECTOR_SIZE? */
};
#define DEBUG(a) MINI_DEBUG(cfg->verbose_level, 3, a;)
-static inline GSList*
-g_slist_append_mempool (MonoMemPool *mp, GSList *list, gpointer data)
-{
- GSList *new_list;
- GSList *last;
-
- new_list = mono_mempool_alloc (mp, sizeof (GSList));
- new_list->data = data;
- new_list->next = NULL;
-
- if (list) {
- last = list;
- while (last->next)
- last = last->next;
- last->next = new_list;
-
- return list;
- } else
- return new_list;
-}
-
static inline void
mono_regstate_assign (MonoRegState *rs)
{
+#ifdef MONO_ARCH_USE_SHARED_FP_SIMD_BANK
+ /* The regalloc may fail if fp and simd logical regbanks share the same physical reg bank and
+ * if the values here are not the same.
+ */
+ g_assert(regbank_callee_regs [MONO_REG_SIMD] == regbank_callee_regs [MONO_REG_DOUBLE]);
+ g_assert(regbank_callee_saved_regs [MONO_REG_SIMD] == regbank_callee_saved_regs [MONO_REG_DOUBLE]);
+ g_assert(regbank_size [MONO_REG_SIMD] == regbank_size [MONO_REG_DOUBLE]);
+#endif
+
if (rs->next_vreg > rs->vassign_size) {
g_free (rs->vassign);
rs->vassign_size = MAX (rs->next_vreg, 256);
- rs->vassign = g_malloc (rs->vassign_size * sizeof (int));
+ rs->vassign = g_malloc (rs->vassign_size * sizeof (gint32));
}
memset (rs->isymbolic, 0, MONO_MAX_IREGS * sizeof (rs->isymbolic [0]));
memset (rs->fsymbolic, 0, MONO_MAX_FREGS * sizeof (rs->fsymbolic [0]));
- rs->symbolic [0] = rs->isymbolic;
- rs->symbolic [1] = rs->fsymbolic;
+ rs->symbolic [MONO_REG_INT] = rs->isymbolic;
+ rs->symbolic [MONO_REG_DOUBLE] = rs->fsymbolic;
#ifdef MONO_ARCH_NEED_SIMD_BANK
memset (rs->xsymbolic, 0, MONO_MAX_XREGS * sizeof (rs->xsymbolic [0]));
- rs->symbolic [2] = rs->xsymbolic;
+ rs->symbolic [MONO_REG_SIMD] = rs->xsymbolic;
#endif
}
mono_regstate_alloc_general (MonoRegState *rs, regmask_t allow, int bank)
{
int i;
+ int mirrored_bank;
regmask_t mask = allow & rs->free_mask [bank];
for (i = 0; i < regbank_size [bank]; ++i) {
if (mask & ((regmask_t)1 << i)) {
rs->free_mask [bank] &= ~ ((regmask_t)1 << i);
+
+ mirrored_bank = get_mirrored_bank (bank);
+ if (mirrored_bank == -1)
+ return i;
+
+ rs->free_mask [mirrored_bank] = rs->free_mask [bank];
return i;
}
}
static inline void
mono_regstate_free_general (MonoRegState *rs, int reg, int bank)
{
+ int mirrored_bank;
+
if (reg >= 0) {
rs->free_mask [bank] |= (regmask_t)1 << reg;
rs->symbolic [bank][reg] = 0;
+
+ mirrored_bank = get_mirrored_bank (bank);
+ if (mirrored_bank == -1)
+ return;
+ rs->free_mask [mirrored_bank] = rs->free_mask [bank];
+ rs->symbolic [mirrored_bank][reg] = 0;
}
}
{
if (G_UNLIKELY (bank)) {
#if MONO_ARCH_NEED_SIMD_BANK
- if (bank == 2)
+ if (bank == MONO_REG_SIMD)
return mono_arch_xregname (reg);
#endif
- g_assert (bank == 1);
+ if (bank == MONO_REG_INT_REF || bank == MONO_REG_INT_MP)
+ return mono_arch_regname (reg);
+ g_assert (bank == MONO_REG_DOUBLE);
return mono_arch_fregname (reg);
} else {
return mono_arch_regname (reg);
}
}
+/*
+ * mono_call_inst_add_outarg_vt:
+ *
+ * Register OUTARG_VT as belonging to CALL.
+ */
+void
+mono_call_inst_add_outarg_vt (MonoCompile *cfg, MonoCallInst *call, MonoInst *outarg_vt)
+{
+ call->outarg_vts = g_slist_append_mempool (cfg->mempool, call->outarg_vts, outarg_vt);
+}
+
static void
resize_spill_info (MonoCompile *cfg, int bank)
{
g_assert (bank < MONO_NUM_REGBANKS);
- new_info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo) * new_len);
+ new_info = mono_mempool_alloc0 (cfg->mempool, sizeof (MonoSpillInfo) * new_len);
if (orig_info)
memcpy (new_info, orig_info, sizeof (MonoSpillInfo) * orig_len);
for (i = orig_len; i < new_len; ++i)
*/
info = &cfg->spill_info [bank][spillvar];
if (info->offset == -1) {
- cfg->stack_offset += sizeof (gpointer) - 1;
- cfg->stack_offset &= ~(sizeof (gpointer) - 1);
+ cfg->stack_offset += sizeof (mgreg_t) - 1;
+ cfg->stack_offset &= ~(sizeof (mgreg_t) - 1);
g_assert (bank < MONO_NUM_REGBANKS);
if (G_UNLIKELY (bank))
size = regbank_spill_var_size [bank];
else
- size = sizeof (gpointer);
+ size = sizeof (mgreg_t);
if (cfg->flags & MONO_CFG_HAS_SPILLUP) {
cfg->stack_offset += size - 1;
#define reg_is_fp(desc) (MONO_ARCH_INST_IS_FLOAT (desc))
#define dreg_is_fp(spec) (MONO_ARCH_INST_IS_FLOAT (spec [MONO_INST_DEST]))
-#define sreg1_is_fp(spec) (MONO_ARCH_INST_IS_FLOAT (spec [MONO_INST_SRC1]))
-#define sreg2_is_fp(spec) (MONO_ARCH_INST_IS_FLOAT (spec [MONO_INST_SRC2]))
+#define sreg_is_fp(n,spec) (MONO_ARCH_INST_IS_FLOAT (spec [MONO_INST_SRC1+(n)]))
+#define sreg1_is_fp(spec) sreg_is_fp (0,(spec))
+#define sreg2_is_fp(spec) sreg_is_fp (1,(spec))
#define reg_is_simd(desc) ((desc) == 'x')
#endif
-#define sreg1_bank(spec) reg_bank ((spec)[MONO_INST_SRC1])
-#define sreg2_bank(spec) reg_bank ((spec)[MONO_INST_SRC2])
+#define sreg_bank(n,spec) reg_bank ((spec)[MONO_INST_SRC1+(n)])
+#define sreg1_bank(spec) sreg_bank (0, (spec))
+#define sreg2_bank(spec) sreg_bank (1, (spec))
#define dreg_bank(spec) reg_bank ((spec)[MONO_INST_DEST])
-#define sreg1_bank_ins(ins) sreg1_bank (ins_get_spec ((ins)->opcode))
-#define sreg2_bank_ins(ins) sreg2_bank (ins_get_spec ((ins)->opcode))
+#define sreg_bank_ins(n,ins) sreg_bank ((n), ins_get_spec ((ins)->opcode))
+#define sreg1_bank_ins(ins) sreg_bank_ins (0, (ins))
+#define sreg2_bank_ins(ins) sreg_bank_ins (1, (ins))
#define dreg_bank_ins(ins) dreg_bank (ins_get_spec ((ins)->opcode))
#define regpair_reg2_mask(desc,hreg1) ((MONO_ARCH_INST_REGPAIR_REG2 (desc,hreg1) != -1) ? (regmask (MONO_ARCH_INST_REGPAIR_REG2 (desc,hreg1))) : MONO_ARCH_CALLEE_REGS)
} RegTrack;
#ifndef DISABLE_LOGGING
+
+static const char* const patch_info_str[] = {
+#define PATCH_INFO(a,b) "" #a,
+#include "patch-info.h"
+#undef PATCH_INFO
+};
+
+void
+mono_print_ji (const MonoJumpInfo *ji)
+{
+ switch (ji->type) {
+ case MONO_PATCH_INFO_RGCTX_FETCH: {
+ MonoJumpInfoRgctxEntry *entry = ji->data.rgctx_entry;
+
+ printf ("[RGCTX_FETCH ");
+ mono_print_ji (entry->data);
+ printf (" - %s]", mono_rgctx_info_type_to_str (entry->info_type));
+ break;
+ }
+ case MONO_PATCH_INFO_METHODCONST: {
+ char *s = mono_method_full_name (ji->data.method, TRUE);
+ printf ("[METHODCONST - %s]", s);
+ g_free (s);
+ break;
+ }
+ default:
+ printf ("[%s]", patch_info_str [ji->type]);
+ break;
+ }
+}
+
void
mono_print_ins_index (int i, MonoInst *ins)
{
const char *spec = ins_get_spec (ins->opcode);
+ int num_sregs, j;
+ int sregs [MONO_MAX_SRC_REGS];
if (i != -1)
printf ("\t%-2d %s", i, mono_inst_name (ins->opcode));
printf (" R%d", ins->sreg1);
if (ins->sreg2 != -1)
printf (" R%d", ins->sreg2);
+ if (ins->sreg3 != -1)
+ printf (" R%d", ins->sreg3);
switch (ins->opcode) {
case OP_LBNE_UN:
case OP_LBGE_UN:
case OP_LBLE:
case OP_LBLE_UN:
- if (!(ins->flags & MONO_INST_BRLABEL)) {
- if (!ins->inst_false_bb)
- printf (" [B%d]", ins->inst_true_bb->block_num);
- else
- printf (" [B%dB%d]", ins->inst_true_bb->block_num, ins->inst_false_bb->block_num);
- }
+ if (!ins->inst_false_bb)
+ printf (" [B%d]", ins->inst_true_bb->block_num);
+ else
+ printf (" [B%dB%d]", ins->inst_true_bb->block_num, ins->inst_false_bb->block_num);
break;
case OP_PHI:
+ case OP_VPHI:
+ case OP_XPHI:
case OP_FPHI: {
int i;
printf (" [%d (", (int)ins->inst_c0);
break;
case OP_REGOFFSET:
printf (" + 0x%lx", (long)ins->inst_offset);
+ break;
default:
break;
}
else
printf (" %s", mono_regname_full (ins->sreg1, bank));
}
- if (spec [MONO_INST_SRC2]) {
- int bank = sreg2_bank (spec);
- if (is_soft_reg (ins->sreg2, bank))
- printf (" R%d", ins->sreg2);
+ num_sregs = mono_inst_get_src_registers (ins, sregs);
+ for (j = 1; j < num_sregs; ++j) {
+ int bank = sreg_bank (j, spec);
+ if (is_soft_reg (sregs [j], bank))
+ printf (" R%d", sregs [j]);
else
- printf (" %s", mono_regname_full (ins->sreg2, bank));
+ printf (" %s", mono_regname_full (sregs [j], bank));
}
switch (ins->opcode) {
case OP_ICONST:
printf (" [%d]", (int)ins->inst_c0);
break;
-#if defined(__i386__) || defined(__x86_64__)
+#if defined(TARGET_X86) || defined(TARGET_AMD64)
case OP_X86_PUSH_IMM:
#endif
case OP_ICOMPARE_IMM:
case OP_IAND_IMM:
case OP_IOR_IMM:
case OP_IXOR_IMM:
+ case OP_SUB_IMM:
printf (" [%d]", (int)ins->inst_imm);
break;
case OP_ADD_IMM:
case OP_R4CONST:
printf (" [%f]", *(float*)ins->inst_p0);
break;
- case CEE_CALL:
- case CEE_CALLVIRT:
case OP_CALL:
case OP_CALL_MEMBASE:
case OP_CALL_REG:
case OP_VCALL2_REG:
case OP_VCALL2_MEMBASE:
case OP_VOIDCALL:
- case OP_VOIDCALLVIRT: {
+ case OP_VOIDCALL_MEMBASE:
+ case OP_VOIDCALLVIRT:
+ case OP_TAILCALL: {
MonoCallInst *call = (MonoCallInst*)ins;
GSList *list;
char *full_name = mono_method_full_name (call->method, TRUE);
printf (" [%s]", full_name);
g_free (full_name);
+ } else if (call->fptr_is_patch) {
+ MonoJumpInfo *ji = (MonoJumpInfo*)call->fptr;
+
+ printf (" ");
+ mono_print_ji (ji);
} else if (call->fptr) {
MonoJitICallInfo *info = mono_find_jit_icall_by_addr (call->fptr);
if (info)
case OP_CALL_HANDLER:
printf (" [B%d]", ins->inst_target_bb->block_num);
break;
- case CEE_BNE_UN:
- case CEE_BEQ:
- case CEE_BLT:
- case CEE_BLT_UN:
- case CEE_BGT:
- case CEE_BGT_UN:
- case CEE_BGE:
- case CEE_BGE_UN:
- case CEE_BLE:
- case CEE_BLE_UN:
case OP_IBNE_UN:
case OP_IBEQ:
case OP_IBLT:
case OP_LBGE_UN:
case OP_LBLE:
case OP_LBLE_UN:
- if (!(ins->flags & MONO_INST_BRLABEL)) {
- if (!ins->inst_false_bb)
- printf (" [B%d]", ins->inst_true_bb->block_num);
- else
- printf (" [B%dB%d]", ins->inst_true_bb->block_num, ins->inst_false_bb->block_num);
- }
+ if (!ins->inst_false_bb)
+ printf (" [B%d]", ins->inst_true_bb->block_num);
+ else
+ printf (" [B%dB%d]", ins->inst_true_bb->block_num, ins->inst_false_bb->block_num);
+ break;
+ case OP_LIVERANGE_START:
+ case OP_LIVERANGE_END:
+ case OP_GC_LIVENESS_DEF:
+ case OP_GC_LIVENESS_USE:
+ printf (" R%d", (int)ins->inst_c1);
+ break;
+ case OP_SEQ_POINT:
+ printf (" il: %x", (int)ins->inst_imm);
break;
default:
break;
}
}
#else
+
+void
+mono_print_ji (const MonoJumpInfo *ji)
+{
+}
+
void
mono_print_ins_index (int i, MonoInst *ins)
{
*last = to_insert;
}
+static inline int
+get_vreg_bank (MonoCompile *cfg, int reg, int bank)
+{
+ if (vreg_is_ref (cfg, reg))
+ return MONO_REG_INT_REF;
+ else if (vreg_is_mp (cfg, reg))
+ return MONO_REG_INT_MP;
+ else
+ return bank;
+}
+
/*
- * Force the spilling of the variable in the symbolic register 'reg'.
+ * Force the spilling of the variable in the symbolic register 'reg', and free
+ * the hreg it was assigned to.
*/
-static int
-get_register_force_spilling (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, int reg, int bank)
+static void
+spill_vreg (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, int reg, int bank)
{
MonoInst *load;
int i, sel, spill;
symbolic = rs->symbolic [bank];
sel = rs->vassign [reg];
+ /* the vreg we need to spill lives in another logical reg bank */
+ bank = translate_bank (cfg->rs, bank, sel);
+
/*i = rs->isymbolic [sel];
g_assert (i == reg);*/
i = reg;
MONO_INST_NEW (cfg, load, regbank_load_ops [bank]);
load->dreg = sel;
load->inst_basereg = cfg->frame_reg;
- load->inst_offset = mono_spillvar_offset (cfg, spill, bank);
+ load->inst_offset = mono_spillvar_offset (cfg, spill, get_vreg_bank (cfg, reg, bank));
insert_after_ins (bb, ins, last, load);
DEBUG (printf ("SPILLED LOAD (%d at 0x%08lx(%%ebp)) R%d (freed %s)\n", spill, (long)load->inst_offset, i, mono_regname_full (sel, bank)));
if (G_UNLIKELY (bank))
i = mono_regstate_alloc_int (rs, regmask (sel));
g_assert (i == sel);
- return sel;
+ if (G_UNLIKELY (bank))
+ mono_regstate_free_general (rs, sel, bank);
+ else
+ mono_regstate_free_int (rs, sel);
}
/* This isn't defined on older glib versions and on some platforms */
get_register_spilling (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, regmask_t regmask, int reg, int bank)
{
MonoInst *load;
- int i, sel, spill;
+ int i, sel, spill, num_sregs;
+ int sregs [MONO_MAX_SRC_REGS];
int *symbolic;
MonoRegState *rs = cfg->rs;
g_assert (bank < MONO_NUM_REGBANKS);
- DEBUG (printf ("\tstart regmask to assign R%d: 0x%08" G_GUINT64_FORMAT " (R%d <- R%d R%d)\n", reg, (guint64)regmask, ins->dreg, ins->sreg1, ins->sreg2));
+ DEBUG (printf ("\tstart regmask to assign R%d: 0x%08" G_GUINT64_FORMAT " (R%d <- R%d R%d R%d)\n", reg, (guint64)regmask, ins->dreg, ins->sreg1, ins->sreg2, ins->sreg3));
/* exclude the registers in the current instruction */
- if ((sreg1_bank_ins (ins) == bank) && (reg != ins->sreg1) && (reg_is_freeable (ins->sreg1, bank) || (is_soft_reg (ins->sreg1, bank) && rs->vassign [ins->sreg1] >= 0))) {
- if (is_soft_reg (ins->sreg1, bank))
- regmask &= ~ (regmask (rs->vassign [ins->sreg1]));
- else
- regmask &= ~ (regmask (ins->sreg1));
- DEBUG (printf ("\t\texcluding sreg1 %s\n", mono_regname_full (ins->sreg1, bank)));
- }
- if ((sreg2_bank_ins (ins) == bank) && (reg != ins->sreg2) && (reg_is_freeable (ins->sreg2, bank) || (is_soft_reg (ins->sreg2, bank) && rs->vassign [ins->sreg2] >= 0))) {
- if (is_soft_reg (ins->sreg2, bank))
- regmask &= ~ (regmask (rs->vassign [ins->sreg2]));
- else
- regmask &= ~ (regmask (ins->sreg2));
- DEBUG (printf ("\t\texcluding sreg2 %s %d\n", mono_regname_full (ins->sreg2, bank), ins->sreg2));
+ num_sregs = mono_inst_get_src_registers (ins, sregs);
+ for (i = 0; i < num_sregs; ++i) {
+ if ((sreg_bank_ins (i, ins) == bank) && (reg != sregs [i]) && (reg_is_freeable (sregs [i], bank) || (is_soft_reg (sregs [i], bank) && rs->vassign [sregs [i]] >= 0))) {
+ if (is_soft_reg (sregs [i], bank))
+ regmask &= ~ (regmask (rs->vassign [sregs [i]]));
+ else
+ regmask &= ~ (regmask (sregs [i]));
+ DEBUG (printf ("\t\texcluding sreg%d %s %d\n", i + 1, mono_regname_full (sregs [i], bank), sregs [i]));
+ }
}
if ((dreg_bank_ins (ins) == bank) && (reg != ins->dreg) && reg_is_freeable (ins->dreg, bank)) {
regmask &= ~ (regmask (ins->dreg));
for (i = 0; i < regbank_size [bank]; ++i) {
if (regmask & (regmask (i))) {
sel = i;
+
+ /* the vreg we need to load lives in another logical bank */
+ bank = translate_bank (cfg->rs, bank, sel);
+
DEBUG (printf ("\t\tselected register %s has assignment %d\n", mono_regname_full (sel, bank), rs->symbolic [bank] [sel]));
break;
}
MONO_INST_NEW (cfg, load, regbank_load_ops [bank]);
load->dreg = sel;
load->inst_basereg = cfg->frame_reg;
- load->inst_offset = mono_spillvar_offset (cfg, spill, bank);
+ load->inst_offset = mono_spillvar_offset (cfg, spill, get_vreg_bank (cfg, i, bank));
insert_after_ins (bb, ins, last, load);
DEBUG (printf ("\tSPILLED LOAD (%d at 0x%08lx(%%ebp)) R%d (freed %s)\n", spill, (long)load->inst_offset, i, mono_regname_full (sel, bank)));
if (G_UNLIKELY (bank))
return sel;
}
+/*
+ * free_up_hreg:
+ *
+ * Free up the hreg HREG by spilling the vreg allocated to it.
+ */
static void
-free_up_reg (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, int hreg, int bank)
+free_up_hreg (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, int hreg, int bank)
{
if (G_UNLIKELY (bank)) {
- if (!(cfg->rs->free_mask [1] & (regmask (hreg)))) {
+ if (!(cfg->rs->free_mask [bank] & (regmask (hreg)))) {
+ bank = translate_bank (cfg->rs, bank, hreg);
DEBUG (printf ("\tforced spill of R%d\n", cfg->rs->symbolic [bank] [hreg]));
- get_register_force_spilling (cfg, bb, last, ins, cfg->rs->symbolic [bank] [hreg], bank);
- mono_regstate_free_general (cfg->rs, hreg, bank);
+ spill_vreg (cfg, bb, last, ins, cfg->rs->symbolic [bank] [hreg], bank);
}
}
else {
if (!(cfg->rs->ifree_mask & (regmask (hreg)))) {
DEBUG (printf ("\tforced spill of R%d\n", cfg->rs->isymbolic [hreg]));
- get_register_force_spilling (cfg, bb, last, ins, cfg->rs->isymbolic [hreg], bank);
- mono_regstate_free_int (cfg->rs, hreg);
+ spill_vreg (cfg, bb, last, ins, cfg->rs->isymbolic [hreg], bank);
}
}
}
return copy;
}
-static MonoInst*
-create_spilled_store (MonoCompile *cfg, MonoBasicBlock *bb, int spill, int reg, int prev_reg, MonoInst **last, MonoInst *ins, int bank)
+static inline const char*
+regbank_to_string (int bank)
+{
+ if (bank == MONO_REG_INT_REF)
+ return "REF ";
+ else if (bank == MONO_REG_INT_MP)
+ return "MP ";
+ else
+ return "";
+}
+
+static void
+create_spilled_store (MonoCompile *cfg, MonoBasicBlock *bb, int spill, int reg, int prev_reg, MonoInst **last, MonoInst *ins, MonoInst *insert_before, int bank)
{
- MonoInst *store;
+ MonoInst *store, *def;
+
+ bank = get_vreg_bank (cfg, prev_reg, bank);
+
MONO_INST_NEW (cfg, store, regbank_store_ops [bank]);
store->sreg1 = reg;
store->inst_destbasereg = cfg->frame_reg;
if (ins) {
mono_bblock_insert_after_ins (bb, ins, store);
*last = store;
+ } else if (insert_before) {
+ insert_before_ins (bb, insert_before, store);
+ } else {
+ g_assert_not_reached ();
+ }
+ DEBUG (printf ("\t%sSPILLED STORE (%d at 0x%08lx(%%ebp)) R%d (from %s)\n", regbank_to_string (bank), spill, (long)store->inst_offset, prev_reg, mono_regname_full (reg, bank)));
+
+ if (((bank == MONO_REG_INT_REF) || (bank == MONO_REG_INT_MP)) && cfg->compute_gc_maps) {
+ g_assert (prev_reg != -1);
+ MONO_INST_NEW (cfg, def, OP_GC_SPILL_SLOT_LIVENESS_DEF);
+ def->inst_c0 = spill;
+ def->inst_c1 = bank;
+ mono_bblock_insert_after_ins (bb, store, def);
}
- DEBUG (printf ("\tSPILLED STORE (%d at 0x%08lx(%%ebp)) R%d (from %s)\n", spill, (long)store->inst_offset, prev_reg, mono_regname_full (reg, bank)));
- return store;
}
/* flags used in reginfo->flags */
assign_reg (MonoCompile *cfg, MonoRegState *rs, int reg, int hreg, int bank)
{
if (G_UNLIKELY (bank)) {
+ int mirrored_bank;
+
g_assert (reg >= regbank_size [bank]);
g_assert (hreg < regbank_size [bank]);
g_assert (! is_global_freg (hreg));
rs->vassign [reg] = hreg;
rs->symbolic [bank] [hreg] = reg;
rs->free_mask [bank] &= ~ (regmask (hreg));
+
+ mirrored_bank = get_mirrored_bank (bank);
+ if (mirrored_bank == -1)
+ return;
+
+ /* Make sure the other logical reg bank that this bank shares
+ * a single hard reg bank knows that this hard reg is not free.
+ */
+ rs->free_mask [mirrored_bank] = rs->free_mask [bank];
+
+ /* Mark the other logical bank that the this bank shares
+ * a single hard reg bank with as mirrored.
+ */
+ rs->symbolic [mirrored_bank] [hreg] = MONO_ARCH_BANK_MIRRORED;
+
}
else {
g_assert (reg >= MONO_MAX_IREGS);
g_assert (hreg < MONO_MAX_IREGS);
-#ifndef __arm__
+#ifndef TARGET_ARM
/* this seems to trigger a gcc compilation bug sometime (hreg is 0) */
g_assert (! is_global_ireg (hreg));
#endif
static gint8 desc_to_fixed_reg [256];
static gboolean desc_to_fixed_reg_inited = FALSE;
+#ifndef DISABLE_JIT
+
/*
* Local register allocation.
* We first scan the list of instructions and we save the liveness info of
MonoInst *ins, *prev, *last;
MonoInst **tmp;
MonoRegState *rs = cfg->rs;
- int i, val, max;
+ int i, j, val, max;
RegTrack *reginfo;
const char *spec;
- unsigned char spec_src1, spec_src2, spec_dest;
+ unsigned char spec_src1, spec_dest;
int bank = 0;
#if MONO_ARCH_USE_FPSTACK
gboolean has_fp = FALSE;
int fpstack [8];
int sp = 0;
#endif
+ int num_sregs = 0;
+ int sregs [MONO_MAX_SRC_REGS];
if (!bb->code)
return;
for (i = 0; i < 256; ++i)
desc_to_fixed_reg [i] = MONO_ARCH_INST_FIXED_REG (i);
desc_to_fixed_reg_inited = TRUE;
+
+ /* Validate the cpu description against the info in mini-ops.h */
+#if defined(TARGET_AMD64) || defined(TARGET_X86) || defined(TARGET_ARM)
+ for (i = OP_LOAD; i < OP_LAST; ++i) {
+ const char *ispec;
+
+ spec = ins_get_spec (i);
+ ispec = INS_INFO (i);
+
+ if ((spec [MONO_INST_DEST] && (ispec [MONO_INST_DEST] == ' ')))
+ printf ("Instruction metadata for %s inconsistent.\n", mono_inst_name (i));
+ if ((spec [MONO_INST_SRC1] && (ispec [MONO_INST_SRC1] == ' ')))
+ printf ("Instruction metadata for %s inconsistent.\n", mono_inst_name (i));
+ if ((spec [MONO_INST_SRC2] && (ispec [MONO_INST_SRC2] == ' ')))
+ printf ("Instruction metadata for %s inconsistent.\n", mono_inst_name (i));
+ }
+#endif
}
rs->next_vreg = bb->max_vreg;
if ((ins->dreg != -1) && (ins->dreg < max)) {
memset (®info [ins->dreg], 0, sizeof (RegTrack));
-#if SIZEOF_VOID_P == 4
+#if SIZEOF_REGISTER == 4
if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_DEST])) {
/**
* In the new IR, the two vregs of the regpair do not alias the
}
#endif
}
- if ((ins->sreg1 != -1) && (ins->sreg1 < max)) {
- memset (®info [ins->sreg1], 0, sizeof (RegTrack));
-#if SIZEOF_VOID_P == 4
- if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_SRC1])) {
- ins->sreg1 ++;
- memset (®info [ins->sreg1 + 1], 0, sizeof (RegTrack));
- }
+
+ num_sregs = mono_inst_get_src_registers (ins, sregs);
+ for (j = 0; j < num_sregs; ++j) {
+ g_assert (sregs [j] != -1);
+ if (sregs [j] < max) {
+ memset (®info [sregs [j]], 0, sizeof (RegTrack));
+#if SIZEOF_REGISTER == 4
+ if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_SRC1 + j])) {
+ sregs [j]++;
+ memset (®info [sregs [j] + 1], 0, sizeof (RegTrack));
+ }
#endif
- }
- if ((ins->sreg2 != -1) && (ins->sreg2 < max)) {
- memset (®info [ins->sreg2], 0, sizeof (RegTrack));
-#if SIZEOF_VOID_P == 4
- if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_SRC2])) {
- ins->sreg2 ++;
- memset (®info [ins->sreg2 + 1], 0, sizeof (RegTrack));
}
-#endif
}
+ mono_inst_set_src_registers (ins, sregs);
}
/*if (cfg->opt & MONO_OPT_COPYPROP)
local_copy_prop (cfg, ins);*/
i = 1;
- DEBUG (printf ("\nLOCAL REGALLOC: BASIC BLOCK %d:\n", bb->block_num));
+ DEBUG (printf ("\nLOCAL REGALLOC BLOCK %d:\n", bb->block_num));
/* forward pass on the instructions to collect register liveness info */
MONO_BB_FOR_EACH_INS (bb, ins) {
spec = ins_get_spec (ins->opcode);
- spec_src1 = spec [MONO_INST_SRC1];
- spec_src2 = spec [MONO_INST_SRC2];
spec_dest = spec [MONO_INST_DEST];
if (G_UNLIKELY (spec == MONO_ARCH_CPU_SPEC)) {
DEBUG (mono_print_ins_index (i, ins));
+ num_sregs = mono_inst_get_src_registers (ins, sregs);
+
#if MONO_ARCH_USE_FPSTACK
- if (sreg1_is_fp (spec) || sreg2_is_fp (spec) || dreg_is_fp (spec))
+ if (dreg_is_fp (spec)) {
has_fp = TRUE;
-#endif
-
- if (spec_src1) {
- bank = sreg1_bank (spec);
- g_assert (ins->sreg1 != -1);
- if (is_soft_reg (ins->sreg1, bank))
- /* This means the vreg is not local to this bb */
- g_assert (reginfo [ins->sreg1].born_in > 0);
- rs->vassign [ins->sreg1] = -1;
- //reginfo [ins->sreg1].prev_use = reginfo [ins->sreg1].last_use;
- //reginfo [ins->sreg1].last_use = i;
- if (MONO_ARCH_INST_IS_REGPAIR (spec_src2)) {
- /* The virtual register is allocated sequentially */
- rs->vassign [ins->sreg1 + 1] = -1;
- //reginfo [ins->sreg1 + 1].prev_use = reginfo [ins->sreg1 + 1].last_use;
- //reginfo [ins->sreg1 + 1].last_use = i;
- if (reginfo [ins->sreg1 + 1].born_in == 0 || reginfo [ins->sreg1 + 1].born_in > i)
- reginfo [ins->sreg1 + 1].born_in = i;
- }
} else {
- ins->sreg1 = -1;
+ for (j = 0; j < num_sregs; ++j) {
+ if (sreg_is_fp (j, spec))
+ has_fp = TRUE;
+ }
}
- if (spec_src2) {
- bank = sreg2_bank (spec);
- g_assert (ins->sreg2 != -1);
- if (is_soft_reg (ins->sreg2, bank))
- /* This means the vreg is not local to this bb */
- g_assert (reginfo [ins->sreg2].born_in > 0);
- rs->vassign [ins->sreg2] = -1;
- //reginfo [ins->sreg2].prev_use = reginfo [ins->sreg2].last_use;
- //reginfo [ins->sreg2].last_use = i;
- if (MONO_ARCH_INST_IS_REGPAIR (spec_src2)) {
- /* The virtual register is allocated sequentially */
- rs->vassign [ins->sreg2 + 1] = -1;
- //reginfo [ins->sreg2 + 1].prev_use = reginfo [ins->sreg2 + 1].last_use;
- //reginfo [ins->sreg2 + 1].last_use = i;
- if (reginfo [ins->sreg2 + 1].born_in == 0 || reginfo [ins->sreg2 + 1].born_in > i)
- reginfo [ins->sreg2 + 1].born_in = i;
+#endif
+
+ for (j = 0; j < num_sregs; ++j) {
+ int sreg = sregs [j];
+ int sreg_spec = spec [MONO_INST_SRC1 + j];
+ if (sreg_spec) {
+ bank = sreg_bank (j, spec);
+ g_assert (sreg != -1);
+ if (is_soft_reg (sreg, bank))
+ /* This means the vreg is not local to this bb */
+ g_assert (reginfo [sreg].born_in > 0);
+ rs->vassign [sreg] = -1;
+ //reginfo [ins->sreg2].prev_use = reginfo [ins->sreg2].last_use;
+ //reginfo [ins->sreg2].last_use = i;
+ if (MONO_ARCH_INST_IS_REGPAIR (sreg_spec)) {
+ /* The virtual register is allocated sequentially */
+ rs->vassign [sreg + 1] = -1;
+ //reginfo [ins->sreg2 + 1].prev_use = reginfo [ins->sreg2 + 1].last_use;
+ //reginfo [ins->sreg2 + 1].last_use = i;
+ if (reginfo [sreg + 1].born_in == 0 || reginfo [sreg + 1].born_in > i)
+ reginfo [sreg + 1].born_in = i;
+ }
+ } else {
+ sregs [j] = -1;
}
- } else {
- ins->sreg2 = -1;
}
+ mono_inst_set_src_registers (ins, sregs);
+
if (spec_dest) {
int dest_dreg;
ins->dreg = -1;
}
- if (spec [MONO_INST_CLOB] == 'c') {
+ if (spec [MONO_INST_CLOB] == 'c' && MONO_IS_CALL (ins)) {
/* A call instruction implicitly uses all registers in call->out_ireg_args */
MonoCallInst *call = (MonoCallInst*)ins;
DEBUG (print_regtrack (reginfo, rs->next_vreg));
MONO_BB_FOR_EACH_INS_REVERSE_SAFE (bb, prev, ins) {
- int prev_dreg, prev_sreg1, prev_sreg2, clob_dreg;
- int dest_dreg, dest_sreg1, dest_sreg2, clob_reg;
+ int prev_dreg, clob_dreg;
+ int dest_dreg, clob_reg;
+ int dest_sregs [MONO_MAX_SRC_REGS], prev_sregs [MONO_MAX_SRC_REGS];
int dreg_high, sreg1_high;
- regmask_t dreg_mask, sreg1_mask, sreg2_mask, mask;
- regmask_t dreg_fixed_mask, sreg1_fixed_mask, sreg2_fixed_mask;
+ regmask_t dreg_mask, mask;
+ regmask_t sreg_masks [MONO_MAX_SRC_REGS], sreg_fixed_masks [MONO_MAX_SRC_REGS];
+ regmask_t dreg_fixed_mask;
const unsigned char *ip;
--i;
spec = ins_get_spec (ins->opcode);
spec_src1 = spec [MONO_INST_SRC1];
- spec_src2 = spec [MONO_INST_SRC2];
spec_dest = spec [MONO_INST_DEST];
prev_dreg = -1;
- prev_sreg2 = -1;
clob_dreg = -1;
clob_reg = -1;
dest_dreg = -1;
- dest_sreg1 = -1;
- dest_sreg2 = -1;
- prev_sreg1 = -1;
dreg_high = -1;
sreg1_high = -1;
dreg_mask = get_callee_mask (spec_dest);
- sreg1_mask = get_callee_mask (spec_src1);
- sreg2_mask = get_callee_mask (spec_src2);
+ for (j = 0; j < MONO_MAX_SRC_REGS; ++j) {
+ prev_sregs [j] = -1;
+ sreg_masks [j] = get_callee_mask (spec [MONO_INST_SRC1 + j]);
+ dest_sregs [j] = desc_to_fixed_reg [(int)spec [MONO_INST_SRC1 + j]];
+#ifdef MONO_ARCH_INST_FIXED_MASK
+ sreg_fixed_masks [j] = MONO_ARCH_INST_FIXED_MASK (spec [MONO_INST_SRC1 + j]);
+#else
+ sreg_fixed_masks [j] = 0;
+#endif
+ }
DEBUG (printf ("processing:"));
DEBUG (mono_print_ins_index (i, ins));
/*
* FIXED REGS
*/
- dest_sreg1 = desc_to_fixed_reg [spec_src1];
- dest_sreg2 = desc_to_fixed_reg [spec_src2];
dest_dreg = desc_to_fixed_reg [spec_dest];
clob_reg = desc_to_fixed_reg [(int)spec [MONO_INST_CLOB]];
- sreg2_mask &= ~ (MONO_ARCH_INST_SREG2_MASK (spec));
+ sreg_masks [1] &= ~ (MONO_ARCH_INST_SREG2_MASK (spec));
#ifdef MONO_ARCH_INST_FIXED_MASK
- sreg1_fixed_mask = MONO_ARCH_INST_FIXED_MASK (spec_src1);
- sreg2_fixed_mask = MONO_ARCH_INST_FIXED_MASK (spec_src2);
dreg_fixed_mask = MONO_ARCH_INST_FIXED_MASK (spec_dest);
#else
- sreg1_fixed_mask = sreg2_fixed_mask = dreg_fixed_mask = 0;
+ dreg_fixed_mask = 0;
#endif
+ num_sregs = mono_inst_get_src_registers (ins, sregs);
+
/*
- * TRACK FIXED SREG2
+ * TRACK FIXED SREG2, 3, ...
*/
- if (dest_sreg2 != -1) {
- if (rs->ifree_mask & (regmask (dest_sreg2))) {
- if (is_global_ireg (ins->sreg2)) {
+ for (j = 1; j < num_sregs; ++j) {
+ int sreg = sregs [j];
+ int dest_sreg = dest_sregs [j];
+
+ if (dest_sreg == -1)
+ continue;
+
+ if (j == 2) {
+ int k;
+
+ /*
+ * CAS.
+ * We need to special case this, since on x86, there are only 3
+ * free registers, and the code below assigns one of them to
+ * sreg, so we can run out of registers when trying to assign
+ * dreg. Instead, we just set up the register masks, and let the
+ * normal sreg2 assignment code handle this. It would be nice to
+ * do this for all the fixed reg cases too, but there is too much
+ * risk of breakage.
+ */
+
+ /* Make sure sreg will be assigned to dest_sreg, and the other sregs won't */
+ sreg_masks [j] = regmask (dest_sreg);
+ for (k = 0; k < num_sregs; ++k) {
+ if (k != j)
+ sreg_masks [k] &= ~ (regmask (dest_sreg));
+ }
+
+ /*
+ * Spill sreg1/2 if they are assigned to dest_sreg.
+ */
+ for (k = 0; k < num_sregs; ++k) {
+ if (k != j && is_soft_reg (sregs [k], 0) && rs->vassign [sregs [k]] == dest_sreg)
+ free_up_hreg (cfg, bb, tmp, ins, dest_sreg, 0);
+ }
+
+ /*
+ * We can also run out of registers while processing sreg2 if sreg3 is
+ * assigned to another hreg, so spill sreg3 now.
+ */
+ if (is_soft_reg (sreg, 0) && rs->vassign [sreg] >= 0 && rs->vassign [sreg] != dest_sreg) {
+ spill_vreg (cfg, bb, tmp, ins, sreg, 0);
+ }
+ continue;
+ }
+
+ if (rs->ifree_mask & (regmask (dest_sreg))) {
+ if (is_global_ireg (sreg)) {
+ int k;
/* Argument already in hard reg, need to copy */
- MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sreg2, ins->sreg2, NULL, ip, 0);
+ MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sreg, sreg, NULL, ip, 0);
insert_before_ins (bb, ins, copy);
- }
- else {
- val = rs->vassign [ins->sreg2];
+ for (k = 0; k < num_sregs; ++k) {
+ if (k != j)
+ sreg_masks [k] &= ~ (regmask (dest_sreg));
+ }
+ } else {
+ val = rs->vassign [sreg];
if (val == -1) {
- DEBUG (printf ("\tshortcut assignment of R%d to %s\n", ins->sreg2, mono_arch_regname (dest_sreg2)));
- assign_reg (cfg, rs, ins->sreg2, dest_sreg2, 0);
+ DEBUG (printf ("\tshortcut assignment of R%d to %s\n", sreg, mono_arch_regname (dest_sreg)));
+ assign_reg (cfg, rs, sreg, dest_sreg, 0);
} else if (val < -1) {
/* FIXME: */
g_assert_not_reached ();
} else {
/* Argument already in hard reg, need to copy */
- MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sreg2, val, NULL, ip, 0);
+ MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sreg, val, NULL, ip, 0);
+ int k;
+
insert_before_ins (bb, ins, copy);
+ for (k = 0; k < num_sregs; ++k) {
+ if (k != j)
+ sreg_masks [k] &= ~ (regmask (dest_sreg));
+ }
+ /*
+ * Prevent the dreg from being allocate to dest_sreg
+ * too, since it could force sreg1 to be allocated to
+ * the same reg on x86.
+ */
+ dreg_mask &= ~ (regmask (dest_sreg));
}
}
} else {
gboolean need_spill = TRUE;
gboolean need_assign = TRUE;
+ int k;
- dreg_mask &= ~ (regmask (dest_sreg2));
- sreg1_mask &= ~ (regmask (dest_sreg2));
+ dreg_mask &= ~ (regmask (dest_sreg));
+ for (k = 0; k < num_sregs; ++k) {
+ if (k != j)
+ sreg_masks [k] &= ~ (regmask (dest_sreg));
+ }
/*
* First check if dreg is assigned to dest_sreg2, since we
* can't spill a dreg.
*/
- val = rs->vassign [ins->dreg];
- if (val == dest_sreg2 && ins->dreg != ins->sreg2) {
+ if (spec [MONO_INST_DEST])
+ val = rs->vassign [ins->dreg];
+ else
+ val = -1;
+ if (val == dest_sreg && ins->dreg != sreg) {
/*
* the destination register is already assigned to
* dest_sreg2: we need to allocate another register for it
int new_dest;
new_dest = alloc_int_reg (cfg, bb, tmp, ins, dreg_mask, ins->dreg, ®info [ins->dreg]);
g_assert (new_dest >= 0);
- DEBUG (printf ("\tchanging dreg R%d to %s from %s\n", ins->dreg, mono_arch_regname (new_dest), mono_arch_regname (dest_sreg2)));
+ DEBUG (printf ("\tchanging dreg R%d to %s from %s\n", ins->dreg, mono_arch_regname (new_dest), mono_arch_regname (dest_sreg)));
prev_dreg = ins->dreg;
assign_reg (cfg, rs, ins->dreg, new_dest, 0);
clob_dreg = ins->dreg;
- create_copy_ins (cfg, bb, tmp, dest_sreg2, new_dest, ins, ip, 0);
- mono_regstate_free_int (rs, dest_sreg2);
+ create_copy_ins (cfg, bb, tmp, dest_sreg, new_dest, ins, ip, 0);
+ mono_regstate_free_int (rs, dest_sreg);
need_spill = FALSE;
}
- if (is_global_ireg (ins->sreg2)) {
- MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sreg2, ins->sreg2, NULL, ip, 0);
+ if (is_global_ireg (sreg)) {
+ MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sreg, sreg, NULL, ip, 0);
insert_before_ins (bb, ins, copy);
need_assign = FALSE;
}
else {
- val = rs->vassign [ins->sreg2];
- if (val == dest_sreg2) {
+ val = rs->vassign [sreg];
+ if (val == dest_sreg) {
/* sreg2 is already assigned to the correct register */
need_spill = FALSE;
} else if (val < -1) {
* instruction. So we spill sreg2 so it can be allocated to
* dest_sreg2.
*/
- DEBUG (printf ("\tforced spill of R%d\n", ins->sreg2));
- free_up_reg (cfg, bb, tmp, ins, val, 0);
+ free_up_hreg (cfg, bb, tmp, ins, val, 0);
}
}
if (need_spill) {
- DEBUG (printf ("\tforced spill of R%d\n", rs->isymbolic [dest_sreg2]));
- free_up_reg (cfg, bb, tmp, ins, dest_sreg2, 0);
+ free_up_hreg (cfg, bb, tmp, ins, dest_sreg, 0);
}
if (need_assign) {
- if (rs->vassign [ins->sreg2] < -1) {
- MonoInst *store;
+ if (rs->vassign [sreg] < -1) {
int spill;
/* Need to emit a spill store */
- spill = - rs->vassign [ins->sreg2] - 1;
- store = create_spilled_store (cfg, bb, spill, dest_sreg2, ins->sreg2, tmp, NULL, bank);
- insert_before_ins (bb, ins, store);
+ spill = - rs->vassign [sreg] - 1;
+ create_spilled_store (cfg, bb, spill, dest_sreg, sreg, tmp, NULL, ins, bank);
}
/* force-set sreg2 */
- assign_reg (cfg, rs, ins->sreg2, dest_sreg2, 0);
+ assign_reg (cfg, rs, sregs [j], dest_sreg, 0);
}
}
- ins->sreg2 = dest_sreg2;
+ sregs [j] = dest_sreg;
}
+ mono_inst_set_src_registers (ins, sregs);
/*
* TRACK DREG
* The dest reg is read by the instruction, not written, so
* avoid allocating sreg1/sreg2 to the same reg.
*/
- if (!dest_sreg1 != -1)
- dreg_mask &= ~ (regmask (dest_sreg1));
- if (dest_sreg2 != -1)
- dreg_mask &= ~ (regmask (dest_sreg2));
+ if (dest_sregs [0] != -1)
+ dreg_mask &= ~ (regmask (dest_sregs [0]));
+ for (j = 1; j < num_sregs; ++j) {
+ if (dest_sregs [j] != -1)
+ dreg_mask &= ~ (regmask (dest_sregs [j]));
+ }
val = rs->vassign [ins->dreg];
if (is_soft_reg (ins->dreg, bank) && (val >= 0) && (!(regmask (val) & dreg_mask))) {
/* DREG is already allocated to a register needed for sreg1 */
- get_register_force_spilling (cfg, bb, tmp, ins, ins->dreg, 0);
- mono_regstate_free_int (rs, val);
+ spill_vreg (cfg, bb, tmp, ins, ins->dreg, 0);
}
}
if (dest_dreg != -1) {
if (rs->vassign [ins->dreg] != dest_dreg)
- free_up_reg (cfg, bb, tmp, ins, dest_dreg, 0);
+ free_up_hreg (cfg, bb, tmp, ins, dest_dreg, 0);
dreg2 = ins->dreg + 1;
dest_dreg2 = MONO_ARCH_INST_REGPAIR_REG2 (spec_dest, dest_dreg);
if (dest_dreg2 != -1) {
if (rs->vassign [dreg2] != dest_dreg2)
- free_up_reg (cfg, bb, tmp, ins, dest_dreg2, 0);
+ free_up_hreg (cfg, bb, tmp, ins, dest_dreg2, 0);
}
}
}
val = alloc_reg (cfg, bb, tmp, ins, dreg_mask, ins->dreg, ®info [ins->dreg], bank);
assign_reg (cfg, rs, ins->dreg, val, bank);
if (spill)
- create_spilled_store (cfg, bb, spill, val, prev_dreg, tmp, ins, bank);
+ create_spilled_store (cfg, bb, spill, val, prev_dreg, tmp, ins, NULL, bank);
}
DEBUG (printf ("\tassigned dreg %s to dest R%d\n", mono_regname_full (val, bank), ins->dreg));
g_assert (prev_dreg > -1);
g_assert (!is_global_ireg (rs->vassign [prev_dreg]));
mask = regpair_reg2_mask (spec_dest, rs->vassign [prev_dreg]);
-#ifdef __i386__
+#ifdef TARGET_X86
/* bug #80489 */
mask &= ~regmask (X86_ECX);
#endif
if (val < 0)
val = get_register_spilling (cfg, bb, tmp, ins, mask, reg2, bank);
if (spill)
- create_spilled_store (cfg, bb, spill, val, reg2, tmp, ins, bank);
+ create_spilled_store (cfg, bb, spill, val, reg2, tmp, ins, NULL, bank);
}
else {
if (! (mask & (regmask (val)))) {
ins->dreg = dest_dreg;
if (G_UNLIKELY (bank)) {
- if (rs->symbolic [bank] [dest_dreg] >= regbank_size [bank])
- free_up_reg (cfg, bb, tmp, ins, dest_dreg, bank);
+ /* the register we need to free up may be used in another logical regbank
+ * so do a translate just in case.
+ */
+ int translated_bank = translate_bank (cfg->rs, bank, dest_dreg);
+ if (rs->symbolic [translated_bank] [dest_dreg] >= regbank_size [translated_bank])
+ free_up_hreg (cfg, bb, tmp, ins, dest_dreg, translated_bank);
}
else {
if (rs->isymbolic [dest_dreg] >= MONO_MAX_IREGS)
- free_up_reg (cfg, bb, tmp, ins, dest_dreg, bank);
+ free_up_hreg (cfg, bb, tmp, ins, dest_dreg, bank);
}
}
* The dest reg is read by the instruction, not written, so
* avoid allocating sreg1/sreg2 to the same reg.
*/
- if (!sreg1_bank (spec))
- sreg1_mask &= ~ (regmask (ins->dreg));
- if (!sreg2_bank (spec))
- sreg2_mask &= ~ (regmask (ins->dreg));
+ for (j = 0; j < num_sregs; ++j)
+ if (!sreg_bank (j, spec))
+ sreg_masks [j] &= ~ (regmask (ins->dreg));
}
/*
*/
if ((clob_reg != -1) && (!(rs->ifree_mask & (regmask (clob_reg))))) {
DEBUG (printf ("\tforced spill of clobbered reg R%d\n", rs->isymbolic [clob_reg]));
- get_register_force_spilling (cfg, bb, tmp, ins, rs->isymbolic [clob_reg], 0);
- mono_regstate_free_int (rs, clob_reg);
+ free_up_hreg (cfg, bb, tmp, ins, clob_reg, 0);
}
if (spec [MONO_INST_CLOB] == 'c') {
s = regmask (j);
if ((clob_mask & s) && !(rs->ifree_mask & s) && (j != ins->sreg1)) {
if ((j != dreg) && (j != dreg2))
- get_register_force_spilling (cfg, bb, tmp, ins, rs->isymbolic [j], 0);
+ free_up_hreg (cfg, bb, tmp, ins, j, 0);
else if (rs->isymbolic [j])
/* The hreg is assigned to the dreg of this instruction */
rs->vassign [rs->isymbolic [j]] = -1;
dreg = -1;
for (j = 0; j < regbank_size [cur_bank]; ++j) {
+
+ /* we are looping though the banks in the outer loop
+ * so, we don't need to deal with mirrored hregs
+ * because we will get them in one of the other bank passes.
+ */
+ if (is_hreg_mirrored (rs, cur_bank, j))
+ continue;
+
s = regmask (j);
if ((clob_mask & s) && !(rs->free_mask [cur_bank] & s) && (j != ins->sreg1)) {
if (j != dreg)
- get_register_force_spilling (cfg, bb, tmp, ins, rs->symbolic [cur_bank] [j], cur_bank);
+ free_up_hreg (cfg, bb, tmp, ins, j, cur_bank);
else if (rs->symbolic [cur_bank] [j])
/* The hreg is assigned to the dreg of this instruction */
rs->vassign [rs->symbolic [cur_bank] [j]] = -1;
/*
* TRACK ARGUMENT REGS
*/
- if (spec [MONO_INST_CLOB] == 'c') {
+ if (spec [MONO_INST_CLOB] == 'c' && MONO_IS_CALL (ins)) {
MonoCallInst *call = (MonoCallInst*)ins;
GSList *list;
assign_reg (cfg, rs, reg, hreg, 0);
- sreg1_mask &= ~(regmask (hreg));
+ sreg_masks [0] &= ~(regmask (hreg));
DEBUG (printf ("\tassigned arg reg %s to R%d\n", mono_arch_regname (hreg), reg));
*/
bank = sreg1_bank (spec);
if (MONO_ARCH_INST_IS_REGPAIR (spec_dest) && (spec [MONO_INST_CLOB] == '1')) {
- g_assert (is_soft_reg (ins->sreg1, bank));
+ int sreg1 = sregs [0];
+ int dest_sreg1 = dest_sregs [0];
+
+ g_assert (is_soft_reg (sreg1, bank));
/* To simplify things, we allocate the same regpair to sreg1 and dreg */
if (dest_sreg1 != -1)
val = mono_regstate_alloc_int (rs, regmask (ins->dreg));
g_assert (val >= 0);
- if (rs->vassign [ins->sreg1] >= 0 && rs->vassign [ins->sreg1] != val)
+ if (rs->vassign [sreg1] >= 0 && rs->vassign [sreg1] != val)
// FIXME:
g_assert_not_reached ();
- assign_reg (cfg, rs, ins->sreg1, val, bank);
+ assign_reg (cfg, rs, sreg1, val, bank);
- DEBUG (printf ("\tassigned sreg1-low %s to R%d\n", mono_regname_full (val, bank), ins->sreg1));
+ DEBUG (printf ("\tassigned sreg1-low %s to R%d\n", mono_regname_full (val, bank), sreg1));
g_assert ((regmask (dreg_high)) & regpair_reg2_mask (spec_src1, ins->dreg));
val = mono_regstate_alloc_int (rs, regmask (dreg_high));
g_assert (val >= 0);
- if (rs->vassign [ins->sreg1 + 1] >= 0 && rs->vassign [ins->sreg1 + 1] != val)
+ if (rs->vassign [sreg1 + 1] >= 0 && rs->vassign [sreg1 + 1] != val)
// FIXME:
g_assert_not_reached ();
- assign_reg (cfg, rs, ins->sreg1 + 1, val, bank);
+ assign_reg (cfg, rs, sreg1 + 1, val, bank);
- DEBUG (printf ("\tassigned sreg1-high %s to R%d\n", mono_regname_full (val, bank), ins->sreg1 + 1));
+ DEBUG (printf ("\tassigned sreg1-high %s to R%d\n", mono_regname_full (val, bank), sreg1 + 1));
/* Skip rest of this section */
- dest_sreg1 = -1;
+ dest_sregs [0] = -1;
}
- if (sreg1_fixed_mask) {
+ if (sreg_fixed_masks [0]) {
g_assert (!bank);
- if (is_global_ireg (ins->sreg1)) {
+ if (is_global_ireg (sregs [0])) {
/*
* The argument is already in a hard reg, but that reg is
* not usable by this instruction, so allocate a new one.
*/
- val = mono_regstate_alloc_int (rs, sreg1_fixed_mask);
+ val = mono_regstate_alloc_int (rs, sreg_fixed_masks [0]);
if (val < 0)
- val = get_register_spilling (cfg, bb, tmp, ins, sreg1_fixed_mask, -1, bank);
+ val = get_register_spilling (cfg, bb, tmp, ins, sreg_fixed_masks [0], -1, bank);
mono_regstate_free_int (rs, val);
- dest_sreg1 = val;
+ dest_sregs [0] = val;
/* Fall through to the dest_sreg1 != -1 case */
}
else
- sreg1_mask &= sreg1_fixed_mask;
+ sreg_masks [0] &= sreg_fixed_masks [0];
}
- if (dest_sreg1 != -1) {
- sreg1_mask = regmask (dest_sreg1);
+ if (dest_sregs [0] != -1) {
+ sreg_masks [0] = regmask (dest_sregs [0]);
- if ((rs->vassign [ins->sreg1] != dest_sreg1) && !(rs->ifree_mask & (regmask (dest_sreg1)))) {
- DEBUG (printf ("\tforced spill of R%d\n", rs->isymbolic [dest_sreg1]));
- get_register_force_spilling (cfg, bb, tmp, ins, rs->isymbolic [dest_sreg1], 0);
- mono_regstate_free_int (rs, dest_sreg1);
+ if ((rs->vassign [sregs [0]] != dest_sregs [0]) && !(rs->ifree_mask & (regmask (dest_sregs [0])))) {
+ free_up_hreg (cfg, bb, tmp, ins, dest_sregs [0], 0);
}
- if (is_global_ireg (ins->sreg1)) {
+ if (is_global_ireg (sregs [0])) {
/* The argument is already in a hard reg, need to copy */
- MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sreg1, ins->sreg1, NULL, ip, 0);
+ MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sregs [0], sregs [0], NULL, ip, 0);
insert_before_ins (bb, ins, copy);
- ins->sreg1 = dest_sreg1;
+ sregs [0] = dest_sregs [0];
}
}
- if (is_soft_reg (ins->sreg1, bank)) {
- val = rs->vassign [ins->sreg1];
- prev_sreg1 = ins->sreg1;
+ if (is_soft_reg (sregs [0], bank)) {
+ val = rs->vassign [sregs [0]];
+ prev_sregs [0] = sregs [0];
if (val < 0) {
int spill = 0;
if (val < -1) {
* Allocate the same hreg to sreg1 as well so the
* peephole can get rid of the move.
*/
- sreg1_mask = regmask (ins->dreg);
+ sreg_masks [0] = regmask (ins->dreg);
}
if (spec [MONO_INST_CLOB] == '1' && !dreg_bank (spec) && (rs->ifree_mask & (regmask (ins->dreg))))
/* Allocate the same reg to sreg1 to avoid a copy later */
- sreg1_mask = regmask (ins->dreg);
+ sreg_masks [0] = regmask (ins->dreg);
- val = alloc_reg (cfg, bb, tmp, ins, sreg1_mask, ins->sreg1, ®info [ins->sreg1], bank);
- assign_reg (cfg, rs, ins->sreg1, val, bank);
- DEBUG (printf ("\tassigned sreg1 %s to R%d\n", mono_regname_full (val, bank), ins->sreg1));
+ val = alloc_reg (cfg, bb, tmp, ins, sreg_masks [0], sregs [0], ®info [sregs [0]], bank);
+ assign_reg (cfg, rs, sregs [0], val, bank);
+ DEBUG (printf ("\tassigned sreg1 %s to R%d\n", mono_regname_full (val, bank), sregs [0]));
if (spill) {
- MonoInst *store = create_spilled_store (cfg, bb, spill, val, prev_sreg1, tmp, NULL, bank);
/*
* Need to insert before the instruction since it can
* overwrite sreg1.
*/
- insert_before_ins (bb, ins, store);
+ create_spilled_store (cfg, bb, spill, val, prev_sregs [0], tmp, NULL, ins, bank);
}
}
- else if ((dest_sreg1 != -1) && (dest_sreg1 != val)) {
- MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sreg1, val, NULL, ip, bank);
+ else if ((dest_sregs [0] != -1) && (dest_sregs [0] != val)) {
+ MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sregs [0], val, NULL, ip, bank);
insert_before_ins (bb, ins, copy);
- sreg2_mask &= ~(regmask (dest_sreg1));
- val = dest_sreg1;
+ for (j = 1; j < num_sregs; ++j)
+ sreg_masks [j] &= ~(regmask (dest_sregs [0]));
+ val = dest_sregs [0];
}
- ins->sreg1 = val;
+ sregs [0] = val;
}
else {
- prev_sreg1 = -1;
+ prev_sregs [0] = -1;
}
- sreg2_mask &= ~(regmask (ins->sreg1));
+ mono_inst_set_src_registers (ins, sregs);
+
+ for (j = 1; j < num_sregs; ++j)
+ sreg_masks [j] &= ~(regmask (sregs [0]));
/* Handle the case when sreg1 is a regpair but dreg is not */
if (MONO_ARCH_INST_IS_REGPAIR (spec_src1) && (spec [MONO_INST_CLOB] != '1')) {
- int reg2 = prev_sreg1 + 1;
+ int reg2 = prev_sregs [0] + 1;
g_assert (!bank);
- g_assert (prev_sreg1 > -1);
- g_assert (!is_global_ireg (rs->vassign [prev_sreg1]));
- mask = regpair_reg2_mask (spec_src1, rs->vassign [prev_sreg1]);
+ g_assert (prev_sregs [0] > -1);
+ g_assert (!is_global_ireg (rs->vassign [prev_sregs [0]]));
+ mask = regpair_reg2_mask (spec_src1, rs->vassign [prev_sregs [0]]);
val = rs->vassign [reg2];
if (val < 0) {
int spill = 0;
}
/* Handle dreg==sreg1 */
- if (((dreg_is_fp (spec) && sreg1_is_fp (spec)) || spec [MONO_INST_CLOB] == '1') && ins->dreg != ins->sreg1) {
+ if (((dreg_is_fp (spec) && sreg1_is_fp (spec)) || spec [MONO_INST_CLOB] == '1') && ins->dreg != sregs [0]) {
MonoInst *sreg2_copy = NULL;
MonoInst *copy;
int bank = reg_bank (spec_src1);
- if (ins->dreg == ins->sreg2) {
+ if (ins->dreg == sregs [1]) {
/*
* copying sreg1 to dreg could clobber sreg2, so allocate a new
* register for it.
*/
- int reg2 = alloc_reg (cfg, bb, tmp, ins, dreg_mask, ins->sreg2, NULL, bank);
+ int reg2 = alloc_reg (cfg, bb, tmp, ins, dreg_mask, sregs [1], NULL, bank);
- DEBUG (printf ("\tneed to copy sreg2 %s to reg %s\n", mono_regname_full (ins->sreg2, bank), mono_regname_full (reg2, bank)));
- sreg2_copy = create_copy_ins (cfg, bb, tmp, reg2, ins->sreg2, NULL, ip, bank);
- prev_sreg2 = ins->sreg2 = reg2;
+ DEBUG (printf ("\tneed to copy sreg2 %s to reg %s\n", mono_regname_full (sregs [1], bank), mono_regname_full (reg2, bank)));
+ sreg2_copy = create_copy_ins (cfg, bb, tmp, reg2, sregs [1], NULL, ip, bank);
+ prev_sregs [1] = sregs [1] = reg2;
if (G_UNLIKELY (bank))
mono_regstate_free_general (rs, reg2, bank);
if (MONO_ARCH_INST_IS_REGPAIR (spec_src1)) {
/* Copying sreg1_high to dreg could also clobber sreg2 */
- if (rs->vassign [prev_sreg1 + 1] == ins->sreg2)
+ if (rs->vassign [prev_sregs [0] + 1] == sregs [1])
/* FIXME: */
g_assert_not_reached ();
* sreg1 and dest are already allocated to the same regpair by the
* SREG1 allocation code.
*/
- g_assert (ins->sreg1 == ins->dreg);
+ g_assert (sregs [0] == ins->dreg);
g_assert (dreg_high == sreg1_high);
}
- DEBUG (printf ("\tneed to copy sreg1 %s to dreg %s\n", mono_regname_full (ins->sreg1, bank), mono_regname_full (ins->dreg, bank)));
- copy = create_copy_ins (cfg, bb, tmp, ins->dreg, ins->sreg1, NULL, ip, bank);
+ DEBUG (printf ("\tneed to copy sreg1 %s to dreg %s\n", mono_regname_full (sregs [0], bank), mono_regname_full (ins->dreg, bank)));
+ copy = create_copy_ins (cfg, bb, tmp, ins->dreg, sregs [0], NULL, ip, bank);
insert_before_ins (bb, ins, copy);
if (sreg2_copy)
* Need to prevent sreg2 to be allocated to sreg1, since that
* would screw up the previous copy.
*/
- sreg2_mask &= ~ (regmask (ins->sreg1));
+ sreg_masks [1] &= ~ (regmask (sregs [0]));
/* we set sreg1 to dest as well */
- prev_sreg1 = ins->sreg1 = ins->dreg;
- sreg2_mask &= ~ (regmask (ins->dreg));
+ prev_sregs [0] = sregs [0] = ins->dreg;
+ sreg_masks [1] &= ~ (regmask (ins->dreg));
}
+ mono_inst_set_src_registers (ins, sregs);
/*
- * TRACK SREG2
+ * TRACK SREG2, 3, ...
*/
- bank = sreg2_bank (spec);
- if (MONO_ARCH_INST_IS_REGPAIR (spec_src2))
- g_assert_not_reached ();
- if (is_soft_reg (ins->sreg2, bank)) {
- val = rs->vassign [ins->sreg2];
+ for (j = 1; j < num_sregs; ++j) {
+ int k;
- if (val < 0) {
- int spill = 0;
- if (val < -1) {
- /* the register gets spilled after this inst */
- spill = -val -1;
- }
- val = alloc_reg (cfg, bb, tmp, ins, sreg2_mask, ins->sreg2, ®info [ins->sreg2], bank);
- assign_reg (cfg, rs, ins->sreg2, val, bank);
- DEBUG (printf ("\tassigned sreg2 %s to R%d\n", mono_regname_full (val, bank), ins->sreg2));
- if (spill) {
- MonoInst *store = create_spilled_store (cfg, bb, spill, val, prev_sreg2, tmp, NULL, bank);
+ bank = sreg_bank (j, spec);
+ if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_SRC1 + j]))
+ g_assert_not_reached ();
+
+ if (dest_sregs [j] != -1 && is_global_ireg (sregs [j])) {
+ /*
+ * Argument already in a global hard reg, copy it to the fixed reg, without
+ * allocating it to the fixed reg.
+ */
+ MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sregs [j], sregs [j], NULL, ip, 0);
+ insert_before_ins (bb, ins, copy);
+ sregs [j] = dest_sregs [j];
+ } else if (is_soft_reg (sregs [j], bank)) {
+ val = rs->vassign [sregs [j]];
+
+ if (dest_sregs [j] != -1 && val >= 0 && dest_sregs [j] != val) {
/*
- * Need to insert before the instruction since it can
- * overwrite sreg2.
+ * The sreg is already allocated to a hreg, but not to the fixed
+ * reg required by the instruction. Spill the sreg, so it can be
+ * allocated to the fixed reg by the code below.
*/
- insert_before_ins (bb, ins, store);
+ /* Currently, this code should only be hit for CAS */
+ spill_vreg (cfg, bb, tmp, ins, sregs [j], 0);
+ val = rs->vassign [sregs [j]];
}
+
+ if (val < 0) {
+ int spill = 0;
+ if (val < -1) {
+ /* the register gets spilled after this inst */
+ spill = -val -1;
+ }
+ val = alloc_reg (cfg, bb, tmp, ins, sreg_masks [j], sregs [j], ®info [sregs [j]], bank);
+ assign_reg (cfg, rs, sregs [j], val, bank);
+ DEBUG (printf ("\tassigned sreg%d %s to R%d\n", j + 1, mono_regname_full (val, bank), sregs [j]));
+ if (spill) {
+ /*
+ * Need to insert before the instruction since it can
+ * overwrite sreg2.
+ */
+ create_spilled_store (cfg, bb, spill, val, sregs [j], tmp, NULL, ins, bank);
+ }
+ }
+ sregs [j] = val;
+ for (k = j + 1; k < num_sregs; ++k)
+ sreg_masks [k] &= ~ (regmask (sregs [j]));
+ }
+ else {
+ prev_sregs [j] = -1;
}
- ins->sreg2 = val;
}
- else {
- prev_sreg2 = -1;
+ mono_inst_set_src_registers (ins, sregs);
+
+ /* Sanity check */
+ /* Do this only for CAS for now */
+ for (j = 1; j < num_sregs; ++j) {
+ int sreg = sregs [j];
+ int dest_sreg = dest_sregs [j];
+
+ if (j == 2 && dest_sreg != -1) {
+ int k;
+
+ g_assert (sreg == dest_sreg);
+
+ for (k = 0; k < num_sregs; ++k) {
+ if (k != j)
+ g_assert (sregs [k] != dest_sreg);
+ }
+ }
}
/*if (reg_is_freeable (ins->sreg1) && prev_sreg1 >= 0 && reginfo [prev_sreg1].born_in >= i) {
MonoInst *fxch;
int tmp;
+ g_assert (num_sregs <= 2);
+
for (ins = bb->code; ins; ins = ins->next) {
spec = ins_get_spec (ins->opcode);
MONO_INST_NEW (cfg, fxch, OP_X86_FXCH);
fxch->inst_imm = sp - 1 - i;
- prev->next = fxch;
- fxch->next = ins;
+ mono_bblock_insert_after_ins (bb, prev, fxch);
prev = fxch;
tmp = fpstack [sp - 1];
MONO_INST_NEW (cfg, fxch, OP_X86_FXCH);
fxch->inst_imm = 1;
- prev->next = fxch;
- fxch->next = ins;
+ mono_bblock_insert_after_ins (bb, prev, fxch);
prev = fxch;
tmp = fpstack [sp - 1];
MONO_INST_NEW (cfg, fxch, OP_X86_FXCH);
fxch->inst_imm = sp - 1 - i;
- prev->next = fxch;
- fxch->next = ins;
+ mono_bblock_insert_after_ins (bb, prev, fxch);
prev = fxch;
tmp = fpstack [sp - 1];
MONO_INST_NEW (cfg, fxch, OP_X86_FXCH);
fxch->inst_imm = sp - 1 - i;
- prev->next = fxch;
- fxch->next = ins;
+ mono_bblock_insert_after_ins (bb, prev, fxch);
prev = fxch;
tmp = fpstack [sp - 1];
mono_opcode_to_cond (int opcode)
{
switch (opcode) {
- case CEE_BEQ:
case OP_CEQ:
case OP_IBEQ:
case OP_ICEQ:
case OP_CMOV_IEQ:
case OP_CMOV_LEQ:
return CMP_EQ;
- case CEE_BNE_UN:
case OP_IBNE_UN:
case OP_LBNE_UN:
case OP_FBNE_UN:
case OP_CMOV_INE_UN:
case OP_CMOV_LNE_UN:
return CMP_NE;
- case CEE_BLE:
case OP_IBLE:
case OP_LBLE:
case OP_FBLE:
case OP_CMOV_ILE:
case OP_CMOV_LLE:
return CMP_LE;
- case CEE_BGE:
case OP_IBGE:
case OP_LBGE:
case OP_FBGE:
case OP_CMOV_IGE:
case OP_CMOV_LGE:
return CMP_GE;
- case CEE_BLT:
case OP_CLT:
case OP_IBLT:
case OP_ICLT:
case OP_CMOV_ILT:
case OP_CMOV_LLT:
return CMP_LT;
- case CEE_BGT:
case OP_CGT:
case OP_IBGT:
case OP_ICGT:
case OP_CMOV_LGT:
return CMP_GT;
- case CEE_BLE_UN:
case OP_IBLE_UN:
case OP_LBLE_UN:
case OP_FBLE_UN:
case OP_CMOV_ILE_UN:
case OP_CMOV_LLE_UN:
return CMP_LE_UN;
- case CEE_BGE_UN:
case OP_IBGE_UN:
case OP_LBGE_UN:
case OP_FBGE_UN:
case OP_CMOV_IGE_UN:
case OP_CMOV_LGE_UN:
return CMP_GE_UN;
- case CEE_BLT_UN:
case OP_CLT_UN:
case OP_IBLT_UN:
case OP_ICLT_UN:
case OP_CMOV_ILT_UN:
case OP_CMOV_LLT_UN:
return CMP_LT_UN;
- case CEE_BGT_UN:
case OP_CGT_UN:
case OP_IBGT_UN:
case OP_ICGT_UN:
CompType
mono_opcode_to_type (int opcode, int cmp_opcode)
{
- if ((opcode >= CEE_BEQ) && (opcode <= CEE_BLT_UN))
- return CMP_TYPE_L;
- else if ((opcode >= OP_CEQ) && (opcode <= OP_CLT_UN))
+ if ((opcode >= OP_CEQ) && (opcode <= OP_CLT_UN))
return CMP_TYPE_L;
else if ((opcode >= OP_IBEQ) && (opcode <= OP_IBLT_UN))
return CMP_TYPE_I;
switch (cmp_opcode) {
case OP_ICOMPARE:
case OP_ICOMPARE_IMM:
- case OP_LCOMPARE_IMM:
return CMP_TYPE_I;
default:
return CMP_TYPE_L;
}
}
+#endif /* DISABLE_JIT */
+
gboolean
mono_is_regsize_var (MonoType *t)
{
case MONO_TYPE_U:
case MONO_TYPE_PTR:
case MONO_TYPE_FNPTR:
-#if SIZEOF_VOID_P == 8
+#if SIZEOF_REGISTER == 8
case MONO_TYPE_I8:
case MONO_TYPE_U8:
#endif
return FALSE;
case MONO_TYPE_VALUETYPE:
return FALSE;
+ default:
+ return FALSE;
}
- return FALSE;
}
+#ifndef DISABLE_JIT
+
/*
* mono_peephole_ins:
*
* OP_STORE_MEMBASE_REG reg1, offset(basereg)
* OP_MOVE reg1, reg2
*/
+ if (last_ins && last_ins->opcode == OP_GC_LIVENESS_DEF)
+ last_ins = last_ins->prev;
if (last_ins &&
(((ins->opcode == OP_LOADI4_MEMBASE) && (last_ins->opcode == OP_STOREI4_MEMBASE_REG)) ||
((ins->opcode == OP_LOAD_MEMBASE) && (last_ins->opcode == OP_STORE_MEMBASE_REG))) &&
if (last_ins && (last_ins->opcode == OP_STOREI2_MEMBASE_REG) &&
ins->inst_basereg == last_ins->inst_destbasereg &&
ins->inst_offset == last_ins->inst_offset) {
-#if SIZEOF_VOID_P == 8
+#if SIZEOF_REGISTER == 8
ins->opcode = (ins->opcode == OP_LOADI2_MEMBASE) ? OP_PCONV_TO_I2 : OP_PCONV_TO_U2;
#else
/* The definition of OP_PCONV_TO_U2 is wrong */
* OP_MOVE sreg, dreg
* OP_MOVE dreg, sreg
*/
- if (last_ins && last_ins->opcode == OP_MOVE &&
+ if (last_ins && last_ins->opcode == ins->opcode &&
ins->sreg1 == last_ins->dreg &&
ins->dreg == last_ins->sreg1) {
MONO_DELETE_INS (bb, ins);
}
}
+#endif /* DISABLE_JIT */
projects / mono.git / blobdiff