static const int regbank_size [] = {
MONO_MAX_IREGS,
MONO_MAX_FREGS,
+ MONO_MAX_IREGS,
+ MONO_MAX_IREGS,
MONO_MAX_XREGS
};
static const int regbank_load_ops [] = {
OP_LOADR_MEMBASE,
OP_LOADR8_MEMBASE,
+ OP_LOADR_MEMBASE,
+ OP_LOADR_MEMBASE,
OP_LOADX_MEMBASE
};
static const int regbank_store_ops [] = {
OP_STORER_MEMBASE_REG,
OP_STORER8_MEMBASE_REG,
+ OP_STORER_MEMBASE_REG,
+ OP_STORER_MEMBASE_REG,
OP_STOREX_MEMBASE
};
static const int regbank_move_ops [] = {
OP_MOVE,
OP_FMOVE,
+ OP_MOVE,
+ OP_MOVE,
OP_XMOVE
};
static const regmask_t regbank_callee_saved_regs [] = {
MONO_ARCH_CALLEE_SAVED_REGS,
MONO_ARCH_CALLEE_SAVED_FREGS,
+ MONO_ARCH_CALLEE_SAVED_REGS,
+ MONO_ARCH_CALLEE_SAVED_REGS,
MONO_ARCH_CALLEE_SAVED_XREGS,
};
static const regmask_t regbank_callee_regs [] = {
MONO_ARCH_CALLEE_REGS,
MONO_ARCH_CALLEE_FREGS,
+ MONO_ARCH_CALLEE_REGS,
+ MONO_ARCH_CALLEE_REGS,
MONO_ARCH_CALLEE_XREGS,
};
static const int regbank_spill_var_size[] = {
sizeof (mgreg_t),
sizeof (double),
+ sizeof (mgreg_t),
+ sizeof (mgreg_t),
16 /*FIXME make this a constant. Maybe MONO_ARCH_SIMD_VECTOR_SIZE? */
};
memset (rs->isymbolic, 0, MONO_MAX_IREGS * sizeof (rs->isymbolic [0]));
memset (rs->fsymbolic, 0, MONO_MAX_FREGS * sizeof (rs->fsymbolic [0]));
- rs->symbolic [0] = rs->isymbolic;
- rs->symbolic [1] = rs->fsymbolic;
+ rs->symbolic [MONO_REG_INT] = rs->isymbolic;
+ rs->symbolic [MONO_REG_DOUBLE] = rs->fsymbolic;
#ifdef MONO_ARCH_NEED_SIMD_BANK
memset (rs->xsymbolic, 0, MONO_MAX_XREGS * sizeof (rs->xsymbolic [0]));
- rs->symbolic [2] = rs->xsymbolic;
+ rs->symbolic [MONO_REG_SIMD] = rs->xsymbolic;
#endif
}
{
if (G_UNLIKELY (bank)) {
#if MONO_ARCH_NEED_SIMD_BANK
- if (bank == 2)
+ if (bank == MONO_REG_SIMD)
return mono_arch_xregname (reg);
#endif
- g_assert (bank == 1);
+ if (bank == MONO_REG_INT_REF || bank == MONO_REG_INT_MP)
+ return mono_arch_regname (reg);
+ g_assert (bank == MONO_REG_DOUBLE);
return mono_arch_fregname (reg);
} else {
return mono_arch_regname (reg);
}
}
+/*
+ * mono_call_inst_add_outarg_vt:
+ *
+ * Register OUTARG_VT as belonging to CALL.
+ */
+void
+mono_call_inst_add_outarg_vt (MonoCompile *cfg, MonoCallInst *call, MonoInst *outarg_vt)
+{
+ call->outarg_vts = g_slist_append_mempool (cfg->mempool, call->outarg_vts, outarg_vt);
+}
+
static void
resize_spill_info (MonoCompile *cfg, int bank)
{
g_assert (bank < MONO_NUM_REGBANKS);
- new_info = mono_mempool_alloc (cfg->mempool, sizeof (MonoSpillInfo) * new_len);
+ new_info = mono_mempool_alloc0 (cfg->mempool, sizeof (MonoSpillInfo) * new_len);
if (orig_info)
memcpy (new_info, orig_info, sizeof (MonoSpillInfo) * orig_len);
for (i = orig_len; i < new_len; ++i)
} RegTrack;
#ifndef DISABLE_LOGGING
+
+static const char* const patch_info_str[] = {
+#define PATCH_INFO(a,b) "" #a,
+#include "patch-info.h"
+#undef PATCH_INFO
+};
+
+void
+mono_print_ji (const MonoJumpInfo *ji)
+{
+ switch (ji->type) {
+ case MONO_PATCH_INFO_RGCTX_FETCH: {
+ MonoJumpInfoRgctxEntry *entry = ji->data.rgctx_entry;
+
+ printf ("[RGCTX_FETCH ");
+ mono_print_ji (entry->data);
+ printf (" - %s]", mono_rgctx_info_type_to_str (entry->info_type));
+ break;
+ }
+ case MONO_PATCH_INFO_METHODCONST: {
+ char *s = mono_method_full_name (ji->data.method, TRUE);
+ printf ("[METHODCONST - %s]", s);
+ g_free (s);
+ break;
+ }
+ default:
+ printf ("[%s]", patch_info_str [ji->type]);
+ break;
+ }
+}
+
void
mono_print_ins_index (int i, MonoInst *ins)
{
case OP_IAND_IMM:
case OP_IOR_IMM:
case OP_IXOR_IMM:
+ case OP_SUB_IMM:
printf (" [%d]", (int)ins->inst_imm);
break;
case OP_ADD_IMM:
case OP_VCALL2_MEMBASE:
case OP_VOIDCALL:
case OP_VOIDCALL_MEMBASE:
- case OP_VOIDCALLVIRT: {
+ case OP_VOIDCALLVIRT:
+ case OP_TAILCALL: {
MonoCallInst *call = (MonoCallInst*)ins;
GSList *list;
char *full_name = mono_method_full_name (call->method, TRUE);
printf (" [%s]", full_name);
g_free (full_name);
+ } else if (call->fptr_is_patch) {
+ MonoJumpInfo *ji = (MonoJumpInfo*)call->fptr;
+
+ printf (" ");
+ mono_print_ji (ji);
} else if (call->fptr) {
MonoJitICallInfo *info = mono_find_jit_icall_by_addr (call->fptr);
if (info)
break;
case OP_LIVERANGE_START:
case OP_LIVERANGE_END:
+ case OP_GC_LIVENESS_DEF:
+ case OP_GC_LIVENESS_USE:
printf (" R%d", (int)ins->inst_c1);
break;
+ case OP_SEQ_POINT:
+ printf (" il: %x", (int)ins->inst_imm);
+ break;
default:
break;
}
}
}
#else
+
+void
+mono_print_ji (const MonoJumpInfo *ji)
+{
+}
+
void
mono_print_ins_index (int i, MonoInst *ins)
{
*last = to_insert;
}
+static inline int
+get_vreg_bank (MonoCompile *cfg, int reg, int bank)
+{
+ if (vreg_is_ref (cfg, reg))
+ return MONO_REG_INT_REF;
+ else if (vreg_is_mp (cfg, reg))
+ return MONO_REG_INT_MP;
+ else
+ return bank;
+}
+
/*
- * Force the spilling of the variable in the symbolic register 'reg'.
+ * Force the spilling of the variable in the symbolic register 'reg', and free
+ * the hreg it was assigned to.
*/
-static int
-get_register_force_spilling (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, int reg, int bank)
+static void
+spill_vreg (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, int reg, int bank)
{
MonoInst *load;
int i, sel, spill;
MONO_INST_NEW (cfg, load, regbank_load_ops [bank]);
load->dreg = sel;
load->inst_basereg = cfg->frame_reg;
- load->inst_offset = mono_spillvar_offset (cfg, spill, bank);
+ load->inst_offset = mono_spillvar_offset (cfg, spill, get_vreg_bank (cfg, reg, bank));
insert_after_ins (bb, ins, last, load);
DEBUG (printf ("SPILLED LOAD (%d at 0x%08lx(%%ebp)) R%d (freed %s)\n", spill, (long)load->inst_offset, i, mono_regname_full (sel, bank)));
if (G_UNLIKELY (bank))
i = mono_regstate_alloc_int (rs, regmask (sel));
g_assert (i == sel);
- return sel;
+ if (G_UNLIKELY (bank))
+ mono_regstate_free_general (rs, sel, bank);
+ else
+ mono_regstate_free_int (rs, sel);
}
/* This isn't defined on older glib versions and on some platforms */
MONO_INST_NEW (cfg, load, regbank_load_ops [bank]);
load->dreg = sel;
load->inst_basereg = cfg->frame_reg;
- load->inst_offset = mono_spillvar_offset (cfg, spill, bank);
+ load->inst_offset = mono_spillvar_offset (cfg, spill, get_vreg_bank (cfg, i, bank));
insert_after_ins (bb, ins, last, load);
DEBUG (printf ("\tSPILLED LOAD (%d at 0x%08lx(%%ebp)) R%d (freed %s)\n", spill, (long)load->inst_offset, i, mono_regname_full (sel, bank)));
if (G_UNLIKELY (bank))
return sel;
}
+/*
+ * free_up_hreg:
+ *
+ * Free up the hreg HREG by spilling the vreg allocated to it.
+ */
static void
-free_up_reg (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, int hreg, int bank)
+free_up_hreg (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, int hreg, int bank)
{
if (G_UNLIKELY (bank)) {
- if (!(cfg->rs->free_mask [1] & (regmask (hreg)))) {
+ if (!(cfg->rs->free_mask [bank] & (regmask (hreg)))) {
bank = translate_bank (cfg->rs, bank, hreg);
DEBUG (printf ("\tforced spill of R%d\n", cfg->rs->symbolic [bank] [hreg]));
- get_register_force_spilling (cfg, bb, last, ins, cfg->rs->symbolic [bank] [hreg], bank);
- mono_regstate_free_general (cfg->rs, hreg, bank);
+ spill_vreg (cfg, bb, last, ins, cfg->rs->symbolic [bank] [hreg], bank);
}
}
else {
if (!(cfg->rs->ifree_mask & (regmask (hreg)))) {
DEBUG (printf ("\tforced spill of R%d\n", cfg->rs->isymbolic [hreg]));
- get_register_force_spilling (cfg, bb, last, ins, cfg->rs->isymbolic [hreg], bank);
- mono_regstate_free_int (cfg->rs, hreg);
+ spill_vreg (cfg, bb, last, ins, cfg->rs->isymbolic [hreg], bank);
}
}
}
return copy;
}
-static MonoInst*
-create_spilled_store (MonoCompile *cfg, MonoBasicBlock *bb, int spill, int reg, int prev_reg, MonoInst **last, MonoInst *ins, int bank)
+static inline const char*
+regbank_to_string (int bank)
{
- MonoInst *store;
+ if (bank == MONO_REG_INT_REF)
+ return "REF ";
+ else if (bank == MONO_REG_INT_MP)
+ return "MP ";
+ else
+ return "";
+}
+
+static void
+create_spilled_store (MonoCompile *cfg, MonoBasicBlock *bb, int spill, int reg, int prev_reg, MonoInst **last, MonoInst *ins, MonoInst *insert_before, int bank)
+{
+ MonoInst *store, *def;
+
+ bank = get_vreg_bank (cfg, prev_reg, bank);
+
MONO_INST_NEW (cfg, store, regbank_store_ops [bank]);
store->sreg1 = reg;
store->inst_destbasereg = cfg->frame_reg;
if (ins) {
mono_bblock_insert_after_ins (bb, ins, store);
*last = store;
+ } else if (insert_before) {
+ insert_before_ins (bb, insert_before, store);
+ } else {
+ g_assert_not_reached ();
+ }
+ DEBUG (printf ("\t%sSPILLED STORE (%d at 0x%08lx(%%ebp)) R%d (from %s)\n", regbank_to_string (bank), spill, (long)store->inst_offset, prev_reg, mono_regname_full (reg, bank)));
+
+ if (((bank == MONO_REG_INT_REF) || (bank == MONO_REG_INT_MP)) && cfg->compute_gc_maps) {
+ g_assert (prev_reg != -1);
+ MONO_INST_NEW (cfg, def, OP_GC_SPILL_SLOT_LIVENESS_DEF);
+ def->inst_c0 = spill;
+ def->inst_c1 = bank;
+ mono_bblock_insert_after_ins (bb, store, def);
}
- DEBUG (printf ("\tSPILLED STORE (%d at 0x%08lx(%%ebp)) R%d (from %s)\n", spill, (long)store->inst_offset, prev_reg, mono_regname_full (reg, bank)));
- return store;
}
/* flags used in reginfo->flags */
int fpstack [8];
int sp = 0;
#endif
- int num_sregs;
+ int num_sregs = 0;
int sregs [MONO_MAX_SRC_REGS];
if (!bb->code)
local_copy_prop (cfg, ins);*/
i = 1;
- DEBUG (printf ("\nLOCAL REGALLOC: BASIC BLOCK %d:\n", bb->block_num));
+ DEBUG (printf ("\nLOCAL REGALLOC BLOCK %d:\n", bb->block_num));
/* forward pass on the instructions to collect register liveness info */
MONO_BB_FOR_EACH_INS (bb, ins) {
spec = ins_get_spec (ins->opcode);
* do this for all the fixed reg cases too, but there is too much
* risk of breakage.
*/
+
+ /* Make sure sreg will be assigned to dest_sreg, and the other sregs won't */
+ sreg_masks [j] = regmask (dest_sreg);
for (k = 0; k < num_sregs; ++k) {
if (k != j)
sreg_masks [k] &= ~ (regmask (dest_sreg));
}
+ /*
+ * Spill sreg1/2 if they are assigned to dest_sreg.
+ */
+ for (k = 0; k < num_sregs; ++k) {
+ if (k != j && is_soft_reg (sregs [k], 0) && rs->vassign [sregs [k]] == dest_sreg)
+ free_up_hreg (cfg, bb, tmp, ins, dest_sreg, 0);
+ }
+
/*
* We can also run out of registers while processing sreg2 if sreg3 is
* assigned to another hreg, so spill sreg3 now.
*/
if (is_soft_reg (sreg, 0) && rs->vassign [sreg] >= 0 && rs->vassign [sreg] != dest_sreg) {
- get_register_force_spilling (cfg, bb, tmp, ins, sreg, 0);
- mono_regstate_free_int (rs, dest_sreg);
+ spill_vreg (cfg, bb, tmp, ins, sreg, 0);
}
continue;
}
* instruction. So we spill sreg2 so it can be allocated to
* dest_sreg2.
*/
- DEBUG (printf ("\tforced spill of R%d\n", sreg));
- free_up_reg (cfg, bb, tmp, ins, val, 0);
+ free_up_hreg (cfg, bb, tmp, ins, val, 0);
}
}
if (need_spill) {
- DEBUG (printf ("\tforced spill of R%d\n", rs->isymbolic [dest_sreg]));
- free_up_reg (cfg, bb, tmp, ins, dest_sreg, 0);
+ free_up_hreg (cfg, bb, tmp, ins, dest_sreg, 0);
}
if (need_assign) {
if (rs->vassign [sreg] < -1) {
- MonoInst *store;
int spill;
/* Need to emit a spill store */
spill = - rs->vassign [sreg] - 1;
- store = create_spilled_store (cfg, bb, spill, dest_sreg, sreg, tmp, NULL, bank);
- insert_before_ins (bb, ins, store);
+ create_spilled_store (cfg, bb, spill, dest_sreg, sreg, tmp, NULL, ins, bank);
}
/* force-set sreg2 */
assign_reg (cfg, rs, sregs [j], dest_sreg, 0);
val = rs->vassign [ins->dreg];
if (is_soft_reg (ins->dreg, bank) && (val >= 0) && (!(regmask (val) & dreg_mask))) {
/* DREG is already allocated to a register needed for sreg1 */
- get_register_force_spilling (cfg, bb, tmp, ins, ins->dreg, 0);
- mono_regstate_free_int (rs, val);
+ spill_vreg (cfg, bb, tmp, ins, ins->dreg, 0);
}
}
if (dest_dreg != -1) {
if (rs->vassign [ins->dreg] != dest_dreg)
- free_up_reg (cfg, bb, tmp, ins, dest_dreg, 0);
+ free_up_hreg (cfg, bb, tmp, ins, dest_dreg, 0);
dreg2 = ins->dreg + 1;
dest_dreg2 = MONO_ARCH_INST_REGPAIR_REG2 (spec_dest, dest_dreg);
if (dest_dreg2 != -1) {
if (rs->vassign [dreg2] != dest_dreg2)
- free_up_reg (cfg, bb, tmp, ins, dest_dreg2, 0);
+ free_up_hreg (cfg, bb, tmp, ins, dest_dreg2, 0);
}
}
}
val = alloc_reg (cfg, bb, tmp, ins, dreg_mask, ins->dreg, ®info [ins->dreg], bank);
assign_reg (cfg, rs, ins->dreg, val, bank);
if (spill)
- create_spilled_store (cfg, bb, spill, val, prev_dreg, tmp, ins, bank);
+ create_spilled_store (cfg, bb, spill, val, prev_dreg, tmp, ins, NULL, bank);
}
DEBUG (printf ("\tassigned dreg %s to dest R%d\n", mono_regname_full (val, bank), ins->dreg));
if (val < 0)
val = get_register_spilling (cfg, bb, tmp, ins, mask, reg2, bank);
if (spill)
- create_spilled_store (cfg, bb, spill, val, reg2, tmp, ins, bank);
+ create_spilled_store (cfg, bb, spill, val, reg2, tmp, ins, NULL, bank);
}
else {
if (! (mask & (regmask (val)))) {
*/
int translated_bank = translate_bank (cfg->rs, bank, dest_dreg);
if (rs->symbolic [translated_bank] [dest_dreg] >= regbank_size [translated_bank])
- free_up_reg (cfg, bb, tmp, ins, dest_dreg, translated_bank);
+ free_up_hreg (cfg, bb, tmp, ins, dest_dreg, translated_bank);
}
else {
if (rs->isymbolic [dest_dreg] >= MONO_MAX_IREGS)
- free_up_reg (cfg, bb, tmp, ins, dest_dreg, bank);
+ free_up_hreg (cfg, bb, tmp, ins, dest_dreg, bank);
}
}
*/
if ((clob_reg != -1) && (!(rs->ifree_mask & (regmask (clob_reg))))) {
DEBUG (printf ("\tforced spill of clobbered reg R%d\n", rs->isymbolic [clob_reg]));
- get_register_force_spilling (cfg, bb, tmp, ins, rs->isymbolic [clob_reg], 0);
- mono_regstate_free_int (rs, clob_reg);
+ free_up_hreg (cfg, bb, tmp, ins, clob_reg, 0);
}
if (spec [MONO_INST_CLOB] == 'c') {
s = regmask (j);
if ((clob_mask & s) && !(rs->ifree_mask & s) && (j != ins->sreg1)) {
if ((j != dreg) && (j != dreg2))
- get_register_force_spilling (cfg, bb, tmp, ins, rs->isymbolic [j], 0);
+ free_up_hreg (cfg, bb, tmp, ins, j, 0);
else if (rs->isymbolic [j])
/* The hreg is assigned to the dreg of this instruction */
rs->vassign [rs->isymbolic [j]] = -1;
s = regmask (j);
if ((clob_mask & s) && !(rs->free_mask [cur_bank] & s) && (j != ins->sreg1)) {
if (j != dreg)
- get_register_force_spilling (cfg, bb, tmp, ins, rs->symbolic [cur_bank] [j], cur_bank);
+ free_up_hreg (cfg, bb, tmp, ins, j, cur_bank);
else if (rs->symbolic [cur_bank] [j])
/* The hreg is assigned to the dreg of this instruction */
rs->vassign [rs->symbolic [cur_bank] [j]] = -1;
sreg_masks [0] = regmask (dest_sregs [0]);
if ((rs->vassign [sregs [0]] != dest_sregs [0]) && !(rs->ifree_mask & (regmask (dest_sregs [0])))) {
- DEBUG (printf ("\tforced spill of R%d\n", rs->isymbolic [dest_sregs [0]]));
- get_register_force_spilling (cfg, bb, tmp, ins, rs->isymbolic [dest_sregs [0]], 0);
- mono_regstate_free_int (rs, dest_sregs [0]);
+ free_up_hreg (cfg, bb, tmp, ins, dest_sregs [0], 0);
}
if (is_global_ireg (sregs [0])) {
/* The argument is already in a hard reg, need to copy */
DEBUG (printf ("\tassigned sreg1 %s to R%d\n", mono_regname_full (val, bank), sregs [0]));
if (spill) {
- MonoInst *store = create_spilled_store (cfg, bb, spill, val, prev_sregs [0], tmp, NULL, bank);
/*
* Need to insert before the instruction since it can
* overwrite sreg1.
*/
- insert_before_ins (bb, ins, store);
+ create_spilled_store (cfg, bb, spill, val, prev_sregs [0], tmp, NULL, ins, bank);
}
}
else if ((dest_sregs [0] != -1) && (dest_sregs [0] != val)) {
* allocated to the fixed reg by the code below.
*/
/* Currently, this code should only be hit for CAS */
- g_assert (j == 2);
- get_register_force_spilling (cfg, bb, tmp, ins, sregs [j], 0);
- mono_regstate_free_int (rs, val);
+ spill_vreg (cfg, bb, tmp, ins, sregs [j], 0);
val = rs->vassign [sregs [j]];
}
assign_reg (cfg, rs, sregs [j], val, bank);
DEBUG (printf ("\tassigned sreg%d %s to R%d\n", j + 1, mono_regname_full (val, bank), sregs [j]));
if (spill) {
- MonoInst *store = create_spilled_store (cfg, bb, spill, val, prev_sregs [j], tmp, NULL, bank);
/*
* Need to insert before the instruction since it can
* overwrite sreg2.
*/
- insert_before_ins (bb, ins, store);
+ create_spilled_store (cfg, bb, spill, val, sregs [j], tmp, NULL, ins, bank);
}
}
sregs [j] = val;
MONO_INST_NEW (cfg, fxch, OP_X86_FXCH);
fxch->inst_imm = sp - 1 - i;
- prev->next = fxch;
- fxch->next = ins;
+ mono_bblock_insert_after_ins (bb, prev, fxch);
prev = fxch;
tmp = fpstack [sp - 1];
MONO_INST_NEW (cfg, fxch, OP_X86_FXCH);
fxch->inst_imm = 1;
- prev->next = fxch;
- fxch->next = ins;
+ mono_bblock_insert_after_ins (bb, prev, fxch);
prev = fxch;
tmp = fpstack [sp - 1];
MONO_INST_NEW (cfg, fxch, OP_X86_FXCH);
fxch->inst_imm = sp - 1 - i;
- prev->next = fxch;
- fxch->next = ins;
+ mono_bblock_insert_after_ins (bb, prev, fxch);
prev = fxch;
tmp = fpstack [sp - 1];
MONO_INST_NEW (cfg, fxch, OP_X86_FXCH);
fxch->inst_imm = sp - 1 - i;
- prev->next = fxch;
- fxch->next = ins;
+ mono_bblock_insert_after_ins (bb, prev, fxch);
prev = fxch;
tmp = fpstack [sp - 1];
switch (cmp_opcode) {
case OP_ICOMPARE:
case OP_ICOMPARE_IMM:
- case OP_LCOMPARE_IMM:
return CMP_TYPE_I;
default:
return CMP_TYPE_L;
return FALSE;
case MONO_TYPE_VALUETYPE:
return FALSE;
+ default:
+ return FALSE;
}
- return FALSE;
}
#ifndef DISABLE_JIT
* OP_STORE_MEMBASE_REG reg1, offset(basereg)
* OP_MOVE reg1, reg2
*/
+ if (last_ins && last_ins->opcode == OP_GC_LIVENESS_DEF)
+ last_ins = last_ins->prev;
if (last_ins &&
(((ins->opcode == OP_LOADI4_MEMBASE) && (last_ins->opcode == OP_STOREI4_MEMBASE_REG)) ||
((ins->opcode == OP_LOAD_MEMBASE) && (last_ins->opcode == OP_STORE_MEMBASE_REG))) &&