#include <mono/metadata/debug-helpers.h>
#include <mono/metadata/threads.h>
#include <mono/metadata/profiler-private.h>
+#include <mono/metadata/mempool-internals.h>
#include <mono/utils/mono-math.h>
#include "mini.h"
#define MONO_ARCH_CALLEE_XREGS 0
#endif
+
+
+#define MONO_ARCH_BANK_MIRRORED -2
+
+#ifdef MONO_ARCH_USE_SHARED_FP_SIMD_BANK
+
+#ifndef MONO_ARCH_NEED_SIMD_BANK
+#error "MONO_ARCH_USE_SHARED_FP_SIMD_BANK needs MONO_ARCH_NEED_SIMD_BANK to work"
+#endif
+
+#define get_mirrored_bank(bank) (((bank) == MONO_REG_SIMD ) ? MONO_REG_DOUBLE : (((bank) == MONO_REG_DOUBLE ) ? MONO_REG_SIMD : -1))
+
+#define is_hreg_mirrored(rs, bank, hreg) ((rs)->symbolic [(bank)] [(hreg)] == MONO_ARCH_BANK_MIRRORED)
+
+
+#else
+
+
+#define get_mirrored_bank(bank) (-1)
+
+#define is_hreg_mirrored(rs, bank, hreg) (0)
+
+#endif
+
+
+/* If the bank is mirrored return the true logical bank that the register in the
+ * physical register bank is allocated to.
+ */
+static inline int translate_bank (MonoRegState *rs, int bank, int hreg) {
+ return is_hreg_mirrored (rs, bank, hreg) ? get_mirrored_bank (bank) : bank;
+}
+
/*
* Every hardware register belongs to a register type or register bank. bank 0
* contains the int registers, bank 1 contains the fp registers.
};
static const int regbank_load_ops [] = {
- OP_LOAD_MEMBASE,
+ OP_LOADR_MEMBASE,
OP_LOADR8_MEMBASE,
OP_LOADX_MEMBASE
};
static const int regbank_store_ops [] = {
- OP_STORE_MEMBASE_REG,
+ OP_STORER_MEMBASE_REG,
OP_STORER8_MEMBASE_REG,
OP_STOREX_MEMBASE
};
};
static const int regbank_spill_var_size[] = {
- sizeof (gpointer),
+ sizeof (mgreg_t),
sizeof (double),
16 /*FIXME make this a constant. Maybe MONO_ARCH_SIMD_VECTOR_SIZE? */
};
#define DEBUG(a) MINI_DEBUG(cfg->verbose_level, 3, a;)
-static inline GSList*
-g_slist_append_mempool (MonoMemPool *mp, GSList *list, gpointer data)
-{
- GSList *new_list;
- GSList *last;
-
- new_list = mono_mempool_alloc (mp, sizeof (GSList));
- new_list->data = data;
- new_list->next = NULL;
-
- if (list) {
- last = list;
- while (last->next)
- last = last->next;
- last->next = new_list;
-
- return list;
- } else
- return new_list;
-}
-
static inline void
mono_regstate_assign (MonoRegState *rs)
{
+#ifdef MONO_ARCH_USE_SHARED_FP_SIMD_BANK
+ /* The regalloc may fail if fp and simd logical regbanks share the same physical reg bank and
+ * if the values here are not the same.
+ */
+ g_assert(regbank_callee_regs [MONO_REG_SIMD] == regbank_callee_regs [MONO_REG_DOUBLE]);
+ g_assert(regbank_callee_saved_regs [MONO_REG_SIMD] == regbank_callee_saved_regs [MONO_REG_DOUBLE]);
+ g_assert(regbank_size [MONO_REG_SIMD] == regbank_size [MONO_REG_DOUBLE]);
+#endif
+
if (rs->next_vreg > rs->vassign_size) {
g_free (rs->vassign);
rs->vassign_size = MAX (rs->next_vreg, 256);
mono_regstate_alloc_general (MonoRegState *rs, regmask_t allow, int bank)
{
int i;
+ int mirrored_bank;
regmask_t mask = allow & rs->free_mask [bank];
for (i = 0; i < regbank_size [bank]; ++i) {
if (mask & ((regmask_t)1 << i)) {
rs->free_mask [bank] &= ~ ((regmask_t)1 << i);
+
+ mirrored_bank = get_mirrored_bank (bank);
+ if (mirrored_bank == -1)
+ return i;
+
+ rs->free_mask [mirrored_bank] = rs->free_mask [bank];
return i;
}
}
static inline void
mono_regstate_free_general (MonoRegState *rs, int reg, int bank)
{
+ int mirrored_bank;
+
if (reg >= 0) {
rs->free_mask [bank] |= (regmask_t)1 << reg;
rs->symbolic [bank][reg] = 0;
+
+ mirrored_bank = get_mirrored_bank (bank);
+ if (mirrored_bank == -1)
+ return;
+ rs->free_mask [mirrored_bank] = rs->free_mask [bank];
+ rs->symbolic [mirrored_bank][reg] = 0;
}
}
*/
info = &cfg->spill_info [bank][spillvar];
if (info->offset == -1) {
- cfg->stack_offset += sizeof (gpointer) - 1;
- cfg->stack_offset &= ~(sizeof (gpointer) - 1);
+ cfg->stack_offset += sizeof (mgreg_t) - 1;
+ cfg->stack_offset &= ~(sizeof (mgreg_t) - 1);
g_assert (bank < MONO_NUM_REGBANKS);
if (G_UNLIKELY (bank))
size = regbank_spill_var_size [bank];
else
- size = sizeof (gpointer);
+ size = sizeof (mgreg_t);
if (cfg->flags & MONO_CFG_HAS_SPILLUP) {
cfg->stack_offset += size - 1;
case OP_LBGE_UN:
case OP_LBLE:
case OP_LBLE_UN:
- if (!(ins->flags & MONO_INST_BRLABEL)) {
- if (!ins->inst_false_bb)
- printf (" [B%d]", ins->inst_true_bb->block_num);
- else
- printf (" [B%dB%d]", ins->inst_true_bb->block_num, ins->inst_false_bb->block_num);
- }
+ if (!ins->inst_false_bb)
+ printf (" [B%d]", ins->inst_true_bb->block_num);
+ else
+ printf (" [B%dB%d]", ins->inst_true_bb->block_num, ins->inst_false_bb->block_num);
break;
case OP_PHI:
case OP_VPHI:
case OP_ICONST:
printf (" [%d]", (int)ins->inst_c0);
break;
-#if defined(__i386__) || defined(__x86_64__)
+#if defined(TARGET_X86) || defined(TARGET_AMD64)
case OP_X86_PUSH_IMM:
#endif
case OP_ICOMPARE_IMM:
case OP_R4CONST:
printf (" [%f]", *(float*)ins->inst_p0);
break;
- case CEE_CALL:
- case CEE_CALLVIRT:
case OP_CALL:
case OP_CALL_MEMBASE:
case OP_CALL_REG:
case OP_CALL_HANDLER:
printf (" [B%d]", ins->inst_target_bb->block_num);
break;
- case CEE_BNE_UN:
- case CEE_BEQ:
- case CEE_BLT:
- case CEE_BLT_UN:
- case CEE_BGT:
- case CEE_BGT_UN:
- case CEE_BGE:
- case CEE_BGE_UN:
- case CEE_BLE:
- case CEE_BLE_UN:
case OP_IBNE_UN:
case OP_IBEQ:
case OP_IBLT:
case OP_LBGE_UN:
case OP_LBLE:
case OP_LBLE_UN:
- if (!(ins->flags & MONO_INST_BRLABEL)) {
- if (!ins->inst_false_bb)
- printf (" [B%d]", ins->inst_true_bb->block_num);
- else
- printf (" [B%dB%d]", ins->inst_true_bb->block_num, ins->inst_false_bb->block_num);
- }
+ if (!ins->inst_false_bb)
+ printf (" [B%d]", ins->inst_true_bb->block_num);
+ else
+ printf (" [B%dB%d]", ins->inst_true_bb->block_num, ins->inst_false_bb->block_num);
break;
case OP_LIVERANGE_START:
case OP_LIVERANGE_END:
}
/*
- * Force the spilling of the variable in the symbolic register 'reg'.
+ * Force the spilling of the variable in the symbolic register 'reg', and free
+ * the hreg it was assigned to.
*/
-static int
-get_register_force_spilling (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, int reg, int bank)
+static void
+spill_vreg (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, int reg, int bank)
{
MonoInst *load;
int i, sel, spill;
symbolic = rs->symbolic [bank];
sel = rs->vassign [reg];
+ /* the vreg we need to spill lives in another logical reg bank */
+ bank = translate_bank (cfg->rs, bank, sel);
+
/*i = rs->isymbolic [sel];
g_assert (i == reg);*/
i = reg;
i = mono_regstate_alloc_int (rs, regmask (sel));
g_assert (i == sel);
- return sel;
+ if (G_UNLIKELY (bank))
+ mono_regstate_free_general (rs, sel, bank);
+ else
+ mono_regstate_free_int (rs, sel);
}
/* This isn't defined on older glib versions and on some platforms */
for (i = 0; i < regbank_size [bank]; ++i) {
if (regmask & (regmask (i))) {
sel = i;
+
+ /* the vreg we need to load lives in another logical bank */
+ bank = translate_bank (cfg->rs, bank, sel);
+
DEBUG (printf ("\t\tselected register %s has assignment %d\n", mono_regname_full (sel, bank), rs->symbolic [bank] [sel]));
break;
}
return sel;
}
+/*
+ * free_up_hreg:
+ *
+ * Free up the hreg HREG by spilling the vreg allocated to it.
+ */
static void
-free_up_reg (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, int hreg, int bank)
+free_up_hreg (MonoCompile *cfg, MonoBasicBlock *bb, MonoInst **last, MonoInst *ins, int hreg, int bank)
{
if (G_UNLIKELY (bank)) {
if (!(cfg->rs->free_mask [1] & (regmask (hreg)))) {
+ bank = translate_bank (cfg->rs, bank, hreg);
DEBUG (printf ("\tforced spill of R%d\n", cfg->rs->symbolic [bank] [hreg]));
- get_register_force_spilling (cfg, bb, last, ins, cfg->rs->symbolic [bank] [hreg], bank);
- mono_regstate_free_general (cfg->rs, hreg, bank);
+ spill_vreg (cfg, bb, last, ins, cfg->rs->symbolic [bank] [hreg], bank);
}
}
else {
if (!(cfg->rs->ifree_mask & (regmask (hreg)))) {
DEBUG (printf ("\tforced spill of R%d\n", cfg->rs->isymbolic [hreg]));
- get_register_force_spilling (cfg, bb, last, ins, cfg->rs->isymbolic [hreg], bank);
- mono_regstate_free_int (cfg->rs, hreg);
+ spill_vreg (cfg, bb, last, ins, cfg->rs->isymbolic [hreg], bank);
}
}
}
assign_reg (MonoCompile *cfg, MonoRegState *rs, int reg, int hreg, int bank)
{
if (G_UNLIKELY (bank)) {
+ int mirrored_bank;
+
g_assert (reg >= regbank_size [bank]);
g_assert (hreg < regbank_size [bank]);
g_assert (! is_global_freg (hreg));
rs->vassign [reg] = hreg;
rs->symbolic [bank] [hreg] = reg;
rs->free_mask [bank] &= ~ (regmask (hreg));
+
+ mirrored_bank = get_mirrored_bank (bank);
+ if (mirrored_bank == -1)
+ return;
+
+ /* Make sure the other logical reg bank that this bank shares
+ * a single hard reg bank knows that this hard reg is not free.
+ */
+ rs->free_mask [mirrored_bank] = rs->free_mask [bank];
+
+ /* Mark the other logical bank that the this bank shares
+ * a single hard reg bank with as mirrored.
+ */
+ rs->symbolic [mirrored_bank] [hreg] = MONO_ARCH_BANK_MIRRORED;
+
}
else {
g_assert (reg >= MONO_MAX_IREGS);
g_assert (hreg < MONO_MAX_IREGS);
-#ifndef __arm__
+#ifndef TARGET_ARM
/* this seems to trigger a gcc compilation bug sometime (hreg is 0) */
g_assert (! is_global_ireg (hreg));
#endif
static gint8 desc_to_fixed_reg [256];
static gboolean desc_to_fixed_reg_inited = FALSE;
+#ifndef DISABLE_JIT
+
/*
* Local register allocation.
* We first scan the list of instructions and we save the liveness info of
for (i = 0; i < 256; ++i)
desc_to_fixed_reg [i] = MONO_ARCH_INST_FIXED_REG (i);
desc_to_fixed_reg_inited = TRUE;
+
+ /* Validate the cpu description against the info in mini-ops.h */
+#if defined(TARGET_AMD64) || defined(TARGET_X86) || defined(TARGET_ARM)
+ for (i = OP_LOAD; i < OP_LAST; ++i) {
+ const char *ispec;
+
+ spec = ins_get_spec (i);
+ ispec = INS_INFO (i);
+
+ if ((spec [MONO_INST_DEST] && (ispec [MONO_INST_DEST] == ' ')))
+ printf ("Instruction metadata for %s inconsistent.\n", mono_inst_name (i));
+ if ((spec [MONO_INST_SRC1] && (ispec [MONO_INST_SRC1] == ' ')))
+ printf ("Instruction metadata for %s inconsistent.\n", mono_inst_name (i));
+ if ((spec [MONO_INST_SRC2] && (ispec [MONO_INST_SRC2] == ' ')))
+ printf ("Instruction metadata for %s inconsistent.\n", mono_inst_name (i));
+ }
+#endif
}
rs->next_vreg = bb->max_vreg;
ins->dreg = -1;
}
- if (spec [MONO_INST_CLOB] == 'c') {
+ if (spec [MONO_INST_CLOB] == 'c' && MONO_IS_CALL (ins)) {
/* A call instruction implicitly uses all registers in call->out_ireg_args */
MonoCallInst *call = (MonoCallInst*)ins;
for (j = 1; j < num_sregs; ++j) {
int sreg = sregs [j];
int dest_sreg = dest_sregs [j];
- if (dest_sreg != -1) {
- if (rs->ifree_mask & (regmask (dest_sreg))) {
- if (is_global_ireg (sreg)) {
- int k;
+
+ if (dest_sreg == -1)
+ continue;
+
+ if (j == 2) {
+ int k;
+
+ /*
+ * CAS.
+ * We need to special case this, since on x86, there are only 3
+ * free registers, and the code below assigns one of them to
+ * sreg, so we can run out of registers when trying to assign
+ * dreg. Instead, we just set up the register masks, and let the
+ * normal sreg2 assignment code handle this. It would be nice to
+ * do this for all the fixed reg cases too, but there is too much
+ * risk of breakage.
+ */
+
+ /* Make sure sreg will be assigned to dest_sreg, and the other sregs won't */
+ sreg_masks [j] = regmask (dest_sreg);
+ for (k = 0; k < num_sregs; ++k) {
+ if (k != j)
+ sreg_masks [k] &= ~ (regmask (dest_sreg));
+ }
+
+ /*
+ * Spill sreg1/2 if they are assigned to dest_sreg.
+ */
+ for (k = 0; k < num_sregs; ++k) {
+ if (k != j && is_soft_reg (sregs [k], 0) && rs->vassign [sregs [k]] == dest_sreg)
+ free_up_hreg (cfg, bb, tmp, ins, dest_sreg, 0);
+ }
+
+ /*
+ * We can also run out of registers while processing sreg2 if sreg3 is
+ * assigned to another hreg, so spill sreg3 now.
+ */
+ if (is_soft_reg (sreg, 0) && rs->vassign [sreg] >= 0 && rs->vassign [sreg] != dest_sreg) {
+ spill_vreg (cfg, bb, tmp, ins, sreg, 0);
+ }
+ continue;
+ }
+
+ if (rs->ifree_mask & (regmask (dest_sreg))) {
+ if (is_global_ireg (sreg)) {
+ int k;
+ /* Argument already in hard reg, need to copy */
+ MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sreg, sreg, NULL, ip, 0);
+ insert_before_ins (bb, ins, copy);
+ for (k = 0; k < num_sregs; ++k) {
+ if (k != j)
+ sreg_masks [k] &= ~ (regmask (dest_sreg));
+ }
+ } else {
+ val = rs->vassign [sreg];
+ if (val == -1) {
+ DEBUG (printf ("\tshortcut assignment of R%d to %s\n", sreg, mono_arch_regname (dest_sreg)));
+ assign_reg (cfg, rs, sreg, dest_sreg, 0);
+ } else if (val < -1) {
+ /* FIXME: */
+ g_assert_not_reached ();
+ } else {
/* Argument already in hard reg, need to copy */
- MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sreg, sreg, NULL, ip, 0);
+ MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sreg, val, NULL, ip, 0);
+ int k;
+
insert_before_ins (bb, ins, copy);
for (k = 0; k < num_sregs; ++k) {
if (k != j)
sreg_masks [k] &= ~ (regmask (dest_sreg));
}
+ /*
+ * Prevent the dreg from being allocate to dest_sreg
+ * too, since it could force sreg1 to be allocated to
+ * the same reg on x86.
+ */
+ dreg_mask &= ~ (regmask (dest_sreg));
}
- else {
- val = rs->vassign [sreg];
- if (val == -1) {
- DEBUG (printf ("\tshortcut assignment of R%d to %s\n", sreg, mono_arch_regname (dest_sreg)));
- assign_reg (cfg, rs, sreg, dest_sreg, 0);
- } else if (val < -1) {
- /* FIXME: */
- g_assert_not_reached ();
- } else {
- /* Argument already in hard reg, need to copy */
- MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sreg, val, NULL, ip, 0);
- insert_before_ins (bb, ins, copy);
- }
- }
- } else {
- gboolean need_spill = TRUE;
- gboolean need_assign = TRUE;
- int k;
-
- dreg_mask &= ~ (regmask (dest_sreg));
- for (k = 0; k < num_sregs; ++k) {
- if (k != j)
- sreg_masks [k] &= ~ (regmask (dest_sreg));
- }
+ }
+ } else {
+ gboolean need_spill = TRUE;
+ gboolean need_assign = TRUE;
+ int k;
+
+ dreg_mask &= ~ (regmask (dest_sreg));
+ for (k = 0; k < num_sregs; ++k) {
+ if (k != j)
+ sreg_masks [k] &= ~ (regmask (dest_sreg));
+ }
+ /*
+ * First check if dreg is assigned to dest_sreg2, since we
+ * can't spill a dreg.
+ */
+ if (spec [MONO_INST_DEST])
+ val = rs->vassign [ins->dreg];
+ else
+ val = -1;
+ if (val == dest_sreg && ins->dreg != sreg) {
/*
- * First check if dreg is assigned to dest_sreg2, since we
- * can't spill a dreg.
+ * the destination register is already assigned to
+ * dest_sreg2: we need to allocate another register for it
+ * and then copy from this to dest_sreg2.
*/
- val = rs->vassign [ins->dreg];
- if (val == dest_sreg && ins->dreg != sreg) {
- /*
- * the destination register is already assigned to
- * dest_sreg2: we need to allocate another register for it
- * and then copy from this to dest_sreg2.
- */
- int new_dest;
- new_dest = alloc_int_reg (cfg, bb, tmp, ins, dreg_mask, ins->dreg, ®info [ins->dreg]);
- g_assert (new_dest >= 0);
- DEBUG (printf ("\tchanging dreg R%d to %s from %s\n", ins->dreg, mono_arch_regname (new_dest), mono_arch_regname (dest_sreg)));
-
- prev_dreg = ins->dreg;
- assign_reg (cfg, rs, ins->dreg, new_dest, 0);
- clob_dreg = ins->dreg;
- create_copy_ins (cfg, bb, tmp, dest_sreg, new_dest, ins, ip, 0);
- mono_regstate_free_int (rs, dest_sreg);
- need_spill = FALSE;
- }
+ int new_dest;
+ new_dest = alloc_int_reg (cfg, bb, tmp, ins, dreg_mask, ins->dreg, ®info [ins->dreg]);
+ g_assert (new_dest >= 0);
+ DEBUG (printf ("\tchanging dreg R%d to %s from %s\n", ins->dreg, mono_arch_regname (new_dest), mono_arch_regname (dest_sreg)));
+
+ prev_dreg = ins->dreg;
+ assign_reg (cfg, rs, ins->dreg, new_dest, 0);
+ clob_dreg = ins->dreg;
+ create_copy_ins (cfg, bb, tmp, dest_sreg, new_dest, ins, ip, 0);
+ mono_regstate_free_int (rs, dest_sreg);
+ need_spill = FALSE;
+ }
- if (is_global_ireg (sreg)) {
- MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sreg, sreg, NULL, ip, 0);
- insert_before_ins (bb, ins, copy);
- need_assign = FALSE;
- }
- else {
- val = rs->vassign [sreg];
- if (val == dest_sreg) {
- /* sreg2 is already assigned to the correct register */
- need_spill = FALSE;
- } else if (val < -1) {
- /* sreg2 is spilled, it can be assigned to dest_sreg2 */
- } else if (val >= 0) {
- /* sreg2 already assigned to another register */
- /*
- * We couldn't emit a copy from val to dest_sreg2, because
- * val might be spilled later while processing this
- * instruction. So we spill sreg2 so it can be allocated to
- * dest_sreg2.
- */
- DEBUG (printf ("\tforced spill of R%d\n", sreg));
- free_up_reg (cfg, bb, tmp, ins, val, 0);
- }
+ if (is_global_ireg (sreg)) {
+ MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sreg, sreg, NULL, ip, 0);
+ insert_before_ins (bb, ins, copy);
+ need_assign = FALSE;
+ }
+ else {
+ val = rs->vassign [sreg];
+ if (val == dest_sreg) {
+ /* sreg2 is already assigned to the correct register */
+ need_spill = FALSE;
+ } else if (val < -1) {
+ /* sreg2 is spilled, it can be assigned to dest_sreg2 */
+ } else if (val >= 0) {
+ /* sreg2 already assigned to another register */
+ /*
+ * We couldn't emit a copy from val to dest_sreg2, because
+ * val might be spilled later while processing this
+ * instruction. So we spill sreg2 so it can be allocated to
+ * dest_sreg2.
+ */
+ free_up_hreg (cfg, bb, tmp, ins, val, 0);
}
+ }
- if (need_spill) {
- DEBUG (printf ("\tforced spill of R%d\n", rs->isymbolic [dest_sreg]));
- free_up_reg (cfg, bb, tmp, ins, dest_sreg, 0);
- }
+ if (need_spill) {
+ free_up_hreg (cfg, bb, tmp, ins, dest_sreg, 0);
+ }
- if (need_assign) {
- if (rs->vassign [sreg] < -1) {
- MonoInst *store;
- int spill;
+ if (need_assign) {
+ if (rs->vassign [sreg] < -1) {
+ MonoInst *store;
+ int spill;
- /* Need to emit a spill store */
- spill = - rs->vassign [sreg] - 1;
- store = create_spilled_store (cfg, bb, spill, dest_sreg, sreg, tmp, NULL, bank);
- insert_before_ins (bb, ins, store);
- }
- /* force-set sreg2 */
- assign_reg (cfg, rs, sregs [j], dest_sreg, 0);
+ /* Need to emit a spill store */
+ spill = - rs->vassign [sreg] - 1;
+ store = create_spilled_store (cfg, bb, spill, dest_sreg, sreg, tmp, NULL, bank);
+ insert_before_ins (bb, ins, store);
}
+ /* force-set sreg2 */
+ assign_reg (cfg, rs, sregs [j], dest_sreg, 0);
}
- sregs [j] = dest_sreg;
}
+ sregs [j] = dest_sreg;
}
mono_inst_set_src_registers (ins, sregs);
val = rs->vassign [ins->dreg];
if (is_soft_reg (ins->dreg, bank) && (val >= 0) && (!(regmask (val) & dreg_mask))) {
/* DREG is already allocated to a register needed for sreg1 */
- get_register_force_spilling (cfg, bb, tmp, ins, ins->dreg, 0);
- mono_regstate_free_int (rs, val);
+ spill_vreg (cfg, bb, tmp, ins, ins->dreg, 0);
}
}
if (dest_dreg != -1) {
if (rs->vassign [ins->dreg] != dest_dreg)
- free_up_reg (cfg, bb, tmp, ins, dest_dreg, 0);
+ free_up_hreg (cfg, bb, tmp, ins, dest_dreg, 0);
dreg2 = ins->dreg + 1;
dest_dreg2 = MONO_ARCH_INST_REGPAIR_REG2 (spec_dest, dest_dreg);
if (dest_dreg2 != -1) {
if (rs->vassign [dreg2] != dest_dreg2)
- free_up_reg (cfg, bb, tmp, ins, dest_dreg2, 0);
+ free_up_hreg (cfg, bb, tmp, ins, dest_dreg2, 0);
}
}
}
g_assert (prev_dreg > -1);
g_assert (!is_global_ireg (rs->vassign [prev_dreg]));
mask = regpair_reg2_mask (spec_dest, rs->vassign [prev_dreg]);
-#ifdef __i386__
+#ifdef TARGET_X86
/* bug #80489 */
mask &= ~regmask (X86_ECX);
#endif
ins->dreg = dest_dreg;
if (G_UNLIKELY (bank)) {
- if (rs->symbolic [bank] [dest_dreg] >= regbank_size [bank])
- free_up_reg (cfg, bb, tmp, ins, dest_dreg, bank);
+ /* the register we need to free up may be used in another logical regbank
+ * so do a translate just in case.
+ */
+ int translated_bank = translate_bank (cfg->rs, bank, dest_dreg);
+ if (rs->symbolic [translated_bank] [dest_dreg] >= regbank_size [translated_bank])
+ free_up_hreg (cfg, bb, tmp, ins, dest_dreg, translated_bank);
}
else {
if (rs->isymbolic [dest_dreg] >= MONO_MAX_IREGS)
- free_up_reg (cfg, bb, tmp, ins, dest_dreg, bank);
+ free_up_hreg (cfg, bb, tmp, ins, dest_dreg, bank);
}
}
*/
if ((clob_reg != -1) && (!(rs->ifree_mask & (regmask (clob_reg))))) {
DEBUG (printf ("\tforced spill of clobbered reg R%d\n", rs->isymbolic [clob_reg]));
- get_register_force_spilling (cfg, bb, tmp, ins, rs->isymbolic [clob_reg], 0);
- mono_regstate_free_int (rs, clob_reg);
+ free_up_hreg (cfg, bb, tmp, ins, clob_reg, 0);
}
if (spec [MONO_INST_CLOB] == 'c') {
s = regmask (j);
if ((clob_mask & s) && !(rs->ifree_mask & s) && (j != ins->sreg1)) {
if ((j != dreg) && (j != dreg2))
- get_register_force_spilling (cfg, bb, tmp, ins, rs->isymbolic [j], 0);
+ free_up_hreg (cfg, bb, tmp, ins, j, 0);
else if (rs->isymbolic [j])
/* The hreg is assigned to the dreg of this instruction */
rs->vassign [rs->isymbolic [j]] = -1;
dreg = -1;
for (j = 0; j < regbank_size [cur_bank]; ++j) {
+
+ /* we are looping though the banks in the outer loop
+ * so, we don't need to deal with mirrored hregs
+ * because we will get them in one of the other bank passes.
+ */
+ if (is_hreg_mirrored (rs, cur_bank, j))
+ continue;
+
s = regmask (j);
if ((clob_mask & s) && !(rs->free_mask [cur_bank] & s) && (j != ins->sreg1)) {
if (j != dreg)
- get_register_force_spilling (cfg, bb, tmp, ins, rs->symbolic [cur_bank] [j], cur_bank);
+ free_up_hreg (cfg, bb, tmp, ins, j, cur_bank);
else if (rs->symbolic [cur_bank] [j])
/* The hreg is assigned to the dreg of this instruction */
rs->vassign [rs->symbolic [cur_bank] [j]] = -1;
/*
* TRACK ARGUMENT REGS
*/
- if (spec [MONO_INST_CLOB] == 'c') {
+ if (spec [MONO_INST_CLOB] == 'c' && MONO_IS_CALL (ins)) {
MonoCallInst *call = (MonoCallInst*)ins;
GSList *list;
sreg_masks [0] = regmask (dest_sregs [0]);
if ((rs->vassign [sregs [0]] != dest_sregs [0]) && !(rs->ifree_mask & (regmask (dest_sregs [0])))) {
- DEBUG (printf ("\tforced spill of R%d\n", rs->isymbolic [dest_sregs [0]]));
- get_register_force_spilling (cfg, bb, tmp, ins, rs->isymbolic [dest_sregs [0]], 0);
- mono_regstate_free_int (rs, dest_sregs [0]);
+ free_up_hreg (cfg, bb, tmp, ins, dest_sregs [0], 0);
}
if (is_global_ireg (sregs [0])) {
/* The argument is already in a hard reg, need to copy */
bank = sreg_bank (j, spec);
if (MONO_ARCH_INST_IS_REGPAIR (spec [MONO_INST_SRC1 + j]))
g_assert_not_reached ();
- if (is_soft_reg (sregs [j], bank)) {
+
+ if (dest_sregs [j] != -1 && is_global_ireg (sregs [j])) {
+ /*
+ * Argument already in a global hard reg, copy it to the fixed reg, without
+ * allocating it to the fixed reg.
+ */
+ MonoInst *copy = create_copy_ins (cfg, bb, tmp, dest_sregs [j], sregs [j], NULL, ip, 0);
+ insert_before_ins (bb, ins, copy);
+ sregs [j] = dest_sregs [j];
+ } else if (is_soft_reg (sregs [j], bank)) {
val = rs->vassign [sregs [j]];
+ if (dest_sregs [j] != -1 && val >= 0 && dest_sregs [j] != val) {
+ /*
+ * The sreg is already allocated to a hreg, but not to the fixed
+ * reg required by the instruction. Spill the sreg, so it can be
+ * allocated to the fixed reg by the code below.
+ */
+ /* Currently, this code should only be hit for CAS */
+ spill_vreg (cfg, bb, tmp, ins, sregs [j], 0);
+ val = rs->vassign [sregs [j]];
+ }
+
if (val < 0) {
int spill = 0;
if (val < -1) {
}
mono_inst_set_src_registers (ins, sregs);
+ /* Sanity check */
+ /* Do this only for CAS for now */
+ for (j = 1; j < num_sregs; ++j) {
+ int sreg = sregs [j];
+ int dest_sreg = dest_sregs [j];
+
+ if (j == 2 && dest_sreg != -1) {
+ int k;
+
+ g_assert (sreg == dest_sreg);
+
+ for (k = 0; k < num_sregs; ++k) {
+ if (k != j)
+ g_assert (sregs [k] != dest_sreg);
+ }
+ }
+ }
+
/*if (reg_is_freeable (ins->sreg1) && prev_sreg1 >= 0 && reginfo [prev_sreg1].born_in >= i) {
DEBUG (printf ("freeable %s\n", mono_arch_regname (ins->sreg1)));
mono_regstate_free_int (rs, ins->sreg1);
mono_opcode_to_cond (int opcode)
{
switch (opcode) {
- case CEE_BEQ:
case OP_CEQ:
case OP_IBEQ:
case OP_ICEQ:
case OP_CMOV_IEQ:
case OP_CMOV_LEQ:
return CMP_EQ;
- case CEE_BNE_UN:
case OP_IBNE_UN:
case OP_LBNE_UN:
case OP_FBNE_UN:
case OP_CMOV_INE_UN:
case OP_CMOV_LNE_UN:
return CMP_NE;
- case CEE_BLE:
case OP_IBLE:
case OP_LBLE:
case OP_FBLE:
case OP_CMOV_ILE:
case OP_CMOV_LLE:
return CMP_LE;
- case CEE_BGE:
case OP_IBGE:
case OP_LBGE:
case OP_FBGE:
case OP_CMOV_IGE:
case OP_CMOV_LGE:
return CMP_GE;
- case CEE_BLT:
case OP_CLT:
case OP_IBLT:
case OP_ICLT:
case OP_CMOV_ILT:
case OP_CMOV_LLT:
return CMP_LT;
- case CEE_BGT:
case OP_CGT:
case OP_IBGT:
case OP_ICGT:
case OP_CMOV_LGT:
return CMP_GT;
- case CEE_BLE_UN:
case OP_IBLE_UN:
case OP_LBLE_UN:
case OP_FBLE_UN:
case OP_CMOV_ILE_UN:
case OP_CMOV_LLE_UN:
return CMP_LE_UN;
- case CEE_BGE_UN:
case OP_IBGE_UN:
case OP_LBGE_UN:
case OP_FBGE_UN:
case OP_CMOV_IGE_UN:
case OP_CMOV_LGE_UN:
return CMP_GE_UN;
- case CEE_BLT_UN:
case OP_CLT_UN:
case OP_IBLT_UN:
case OP_ICLT_UN:
case OP_CMOV_ILT_UN:
case OP_CMOV_LLT_UN:
return CMP_LT_UN;
- case CEE_BGT_UN:
case OP_CGT_UN:
case OP_IBGT_UN:
case OP_ICGT_UN:
CompType
mono_opcode_to_type (int opcode, int cmp_opcode)
{
- if ((opcode >= CEE_BEQ) && (opcode <= CEE_BLT_UN))
- return CMP_TYPE_L;
- else if ((opcode >= OP_CEQ) && (opcode <= OP_CLT_UN))
+ if ((opcode >= OP_CEQ) && (opcode <= OP_CLT_UN))
return CMP_TYPE_L;
else if ((opcode >= OP_IBEQ) && (opcode <= OP_IBLT_UN))
return CMP_TYPE_I;
}
}
+#endif /* DISABLE_JIT */
+
gboolean
mono_is_regsize_var (MonoType *t)
{
return FALSE;
}
+#ifndef DISABLE_JIT
+
/*
* mono_peephole_ins:
*
* OP_MOVE sreg, dreg
* OP_MOVE dreg, sreg
*/
- if (last_ins && last_ins->opcode == OP_MOVE &&
+ if (last_ins && last_ins->opcode == ins->opcode &&
ins->sreg1 == last_ins->dreg &&
ins->dreg == last_ins->sreg1) {
MONO_DELETE_INS (bb, ins);
}
}
+#endif /* DISABLE_JIT */
projects / mono.git / blobdiff