{
mono_add_patch_info (cfg, code - cfg->native_code, patch_type, data);
- if (cfg->compile_aot) {
- amd64_call_membase (code, AMD64_RIP, 0);
- }
- else {
+ {
gboolean near_call = FALSE;
/*
/* These methods are allocated using malloc */
near_call = FALSE;
+ if (cfg->compile_aot)
+ near_call = TRUE;
+
if (near_call) {
amd64_call_code (code, 0);
}
offset += 8;
}
- amd64_shift_reg_imm (code, X86_SHR, sreg, 4);
+ amd64_shift_reg_imm (code, X86_SHR, sreg, 3);
if (sreg != AMD64_RCX)
amd64_mov_reg_reg (code, AMD64_RCX, sreg, 8);
amd64_alu_reg_reg (code, X86_XOR, AMD64_RAX, AMD64_RAX);
cpos += 6;
cov->data [bb->dfn].cil_code = bb->cil_code;
+ amd64_mov_reg_imm (code, AMD64_R11, (guint64)&cov->data [bb->dfn].count);
/* this is not thread save, but good enough */
- amd64_inc_mem (code, (guint64)&cov->data [bb->dfn].count);
+ amd64_inc_membase (code, AMD64_R11, 0);
}
offset = code - cfg->native_code;
+ mono_debug_open_block (cfg, bb, offset);
+
ins = bb->code;
while (ins) {
offset = code - cfg->native_code;
break;
case OP_ADDCC:
case CEE_ADD:
+ case OP_LADD:
amd64_alu_reg_reg (code, X86_ADD, ins->sreg1, ins->sreg2);
break;
case OP_ADC:
}
if (breg == AMD64_RAX) {
- amd64_mov_reg_reg (code, AMD64_R11, AMD64_RAX, size);
+ amd64_mov_reg_reg (code, AMD64_R11, AMD64_RAX, 8);
breg = AMD64_R11;
}
patch_info->ip.i = code - cfg->native_code;
if (cfg->compile_aot) {
- amd64_mov_reg_membase (code, GP_SCRATCH_REG, AMD64_RIP, 0, 8);
- amd64_call_reg (code, GP_SCRATCH_REG);
+ amd64_call_code (code, 0);
} else {
/* The callee is in memory allocated using the code manager */
amd64_call_code (code, 0);
save_mode = SAVE_XMM;
break;
case MONO_TYPE_GENERICINST:
- if (mono_type_generic_inst_is_valuetype (mono_method_signature (method)->ret)) {
+ if (!mono_type_generic_inst_is_valuetype (mono_method_signature (method)->ret)) {
save_mode = SAVE_EAX;
break;
}
guint32 opcode;
if (fsig->params [0]->type == MONO_TYPE_I4)
- opcode = OP_ATOMIC_ADD_I4;
+ opcode = OP_ATOMIC_ADD_NEW_I4;
else if (fsig->params [0]->type == MONO_TYPE_I8)
- opcode = OP_ATOMIC_ADD_I8;
+ opcode = OP_ATOMIC_ADD_NEW_I8;
else
g_assert_not_reached ();