#define ALPHA_PRINT if (mini_alpha_verbose_level)
-#define NEW_INS(cfg,ins,dest,op) do { \
- (dest) = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
- (dest)->opcode = (op); \
- MONO_INST_LIST_ADD_TAIL (&(dest)->node, &(ins)->node); \
+#define NEW_INS(cfg,dest,op) do { \
+ (dest) = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
+ (dest)->opcode = (op); \
+ insert_after_ins (bb, last_ins, (dest)); \
} while (0)
-#define NEW_ICONST(cfg,dest,val) do { \
- (dest) = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
- (dest)->opcode = OP_ICONST; \
- (dest)->inst_c0 = (val); \
- (dest)->type = STACK_I4; \
- } while (0)
-
-
#undef DEBUG
#define DEBUG(a) if (cfg->verbose_level > 1) a
#include "trace.h"
#include "mini-alpha.h"
-#include "inssel.h"
#include "cpu-alpha.h"
#include "jit-icalls.h"
}
}
+static void
+insert_after_ins (MonoBasicBlock *bb, MonoInst *ins, MonoInst *to_insert)
+{
+ if (ins == NULL)
+ {
+ ins = bb->code;
+ bb->code = to_insert;
+ to_insert->next = ins;
+ }
+ else
+ {
+ to_insert->next = ins->next;
+ ins->next = to_insert;
+ }
+}
+
static void add_got_entry(MonoCompile *cfg, AlphaGotType ge_type,
AlphaGotData ge_data,
int ip, MonoJumpInfoType type, gconstpointer target)
void
mono_arch_peephole_pass_2 (MonoCompile *cfg, MonoBasicBlock *bb)
{
- MonoInst *ins, *n;
+ MonoInst *ins, *n, *last_ins = NULL;
+ ins = bb->code;
CFG_DEBUG(3) g_print ("ALPHA: PEEPHOLE_2 pass\n");
- MONO_INST_LIST_FOR_EACH_ENTRY_SAFE (ins, n, &bb->ins_list, node) {
- MonoInst *last_ins = mono_inst_list_prev (&ins->node, &bb->ins_list);
+ MONO_BB_FOR_EACH_INS_SAFE (bb, n, ins) {
switch (ins->opcode)
{
case OP_MOVE:
break;
#endif
}
+
+ last_ins = ins;
+ ins = ins->next;
}
+
+ bb->last_ins = last_ins;
}
// Convert to opposite branch opcode
void
mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb)
{
- MonoInst *ins, *n, *next, *temp;
+ MonoInst *ins, *n, *temp, *last_ins = NULL;
+ MonoInst *next;
- if (bb->max_vreg > cfg->rs->next_vreg)
- cfg->rs->next_vreg = bb->max_vreg;
+ ins = bb->code;
/*
* FIXME: Need to add more instructions, but the current machine
* cdq.
*/
- MONO_INST_LIST_FOR_EACH_ENTRY_SAFE (ins, n, &bb->ins_list, node) {
+ MONO_BB_FOR_EACH_INS_SAFE (bb, n, ins) {
switch (ins->opcode)
{
case OP_DIV_IMM:
case OP_IDIV_IMM:
case OP_IREM_IMM:
case OP_MUL_IMM:
- NEW_INS (cfg, ins, temp, OP_I8CONST);
+ NEW_INS (cfg, temp, OP_I8CONST);
temp->inst_c0 = ins->inst_imm;
- temp->dreg = mono_regstate_next_int (cfg->rs);
+ temp->dreg = mono_alloc_ireg (cfg);
switch (ins->opcode)
{
// Instead of compare+b<cond>/fcompare+b<cond>,
// Alpha has compare<cond>+br<cond>/fcompare<cond>+br<cond>
// we need to convert
- next = mono_inst_list_next (&ins->node, &bb->ins_list);
- g_assert(next);
+ next = ins->next;
cvt_cmp_branch(ins, next);
}
case OP_COMPARE_IMM:
if (!alpha_is_imm (ins->inst_imm))
{
- NEW_INS (cfg, ins, temp, OP_I8CONST);
+ NEW_INS (cfg, temp, OP_I8CONST);
temp->inst_c0 = ins->inst_imm;
- temp->dreg = mono_regstate_next_int (cfg->rs);
+ temp->dreg = mono_alloc_ireg (cfg);
ins->opcode = OP_COMPARE;
ins->sreg2 = temp->dreg;
//continue;
}
- next = mono_inst_list_next (&ins->node, &bb->ins_list);
- g_assert(next);
+ next = ins->next;
cvt_cmp_branch(ins, next);
case OP_ICOMPARE_IMM:
if (!alpha_is_imm (ins->inst_imm))
{
- NEW_INS (cfg, ins, temp, OP_ICONST);
+ NEW_INS (cfg, temp, OP_ICONST);
temp->inst_c0 = ins->inst_imm;
- temp->dreg = mono_regstate_next_int (cfg->rs);
+ temp->dreg = mono_alloc_ireg (cfg);
ins->opcode = OP_ICOMPARE;
ins->sreg2 = temp->dreg;
//continue;
}
- next = mono_inst_list_next (&ins->node, &bb->ins_list);
- g_assert(next);
+ next = ins->next;
cvt_cmp_branch(ins, next);
case OP_STOREI8_MEMBASE_IMM:
if (ins->inst_imm != 0)
{
- NEW_INS (cfg, ins, temp, OP_I8CONST);
+ NEW_INS (cfg, temp, OP_I8CONST);
temp->inst_c0 = ins->inst_imm;
- temp->dreg = mono_regstate_next_int (cfg->rs);
+ temp->dreg = mono_alloc_ireg (cfg);
ins->opcode = OP_STOREI8_MEMBASE_REG;
ins->sreg1 = temp->dreg;
}
if (ins->inst_imm != 0)
{
MonoInst *temp;
- NEW_INS (cfg, ins, temp, OP_ICONST);
+ NEW_INS (cfg, temp, OP_ICONST);
temp->inst_c0 = ins->inst_imm;
- temp->dreg = mono_regstate_next_int (cfg->rs);
+ temp->dreg = mono_alloc_ireg (cfg);
ins->opcode = OP_STOREI4_MEMBASE_REG;
ins->sreg1 = temp->dreg;
}
if (ins->inst_imm != 0 || !bwx_supported)
{
MonoInst *temp;
- NEW_INS (cfg, ins, temp, OP_ICONST);
+ NEW_INS (cfg, temp, OP_ICONST);
temp->inst_c0 = ins->inst_imm;
- temp->dreg = mono_regstate_next_int (cfg->rs);
+ temp->dreg = mono_alloc_ireg (cfg);
ins->opcode = OP_STOREI1_MEMBASE_REG;
ins->sreg1 = temp->dreg;
}
if (ins->inst_imm != 0 || !bwx_supported)
{
MonoInst *temp;
- NEW_INS (cfg, ins, temp, OP_ICONST);
+ NEW_INS (cfg, temp, OP_ICONST);
temp->inst_c0 = ins->inst_imm;
- temp->dreg = mono_regstate_next_int (cfg->rs);
+ temp->dreg = mono_alloc_ireg (cfg);
ins->opcode = OP_STOREI2_MEMBASE_REG;
ins->sreg1 = temp->dreg;
}
if (!alpha_is_imm(ins->inst_imm))
{
MonoInst *temp;
- NEW_INS (cfg, ins, temp, OP_ICONST);
+ NEW_INS (cfg, temp, OP_ICONST);
temp->inst_c0 = ins->inst_imm;
- temp->dreg = mono_regstate_next_int (cfg->rs);
+ temp->dreg = mono_alloc_ireg (cfg);
switch(ins->opcode)
{
if (!alpha_is_imm(ins->inst_imm))
{
MonoInst *temp;
- NEW_INS (cfg, ins, temp, OP_ICONST);
+ NEW_INS (cfg, temp, OP_ICONST);
temp->inst_c0 = ins->inst_imm;
- temp->dreg = mono_regstate_next_int (cfg->rs);
+ temp->dreg = mono_alloc_ireg (cfg);
switch(ins->opcode)
{
if (!alpha_is_imm(ins->inst_imm))
{
MonoInst *temp;
- NEW_INS(cfg, ins, temp, OP_ICONST);
+ NEW_INS(cfg, temp, OP_ICONST);
temp->inst_c0 = ins->inst_imm;
- temp->dreg = mono_regstate_next_int(cfg->rs);
+ temp->dreg = mono_alloc_ireg (cfg);
ins->sreg2 = temp->dreg;
ins->opcode = OP_LSHR;
}
if (!alpha_is_imm(ins->inst_imm))
{
MonoInst *temp;
- NEW_INS(cfg, ins, temp, OP_ICONST);
+ NEW_INS(cfg, temp, OP_ICONST);
temp->inst_c0 = ins->inst_imm;
- temp->dreg = mono_regstate_next_int(cfg->rs);
+ temp->dreg = mono_alloc_ireg (cfg);
ins->sreg2 = temp->dreg;
ins->opcode = OP_LSHL;
}
default:
break;
}
+
+ last_ins = ins;
+ ins = ins->next;
}
- bb->max_vreg = cfg->rs->next_vreg;
+ bb->last_ins = last_ins;
+
+ bb->max_vreg = cfg->next_vreg;
}
/*========================= End of Function ========================*/
#define EMIT_ALPHA_BRANCH(Tins, PRED_REG, ALPHA_BR) \
offset = ((char *)code - \
(char *)cfg->native_code); \
- if (Tins->flags & MONO_INST_BRLABEL) \
- { \
- if (Tins->inst_i0->inst_c0) \
- { \
- CFG_DEBUG(3) g_print("inst_c0: %0lX, data: %p]\n", \
- Tins->inst_i0->inst_c0, \
- cfg->native_code + Tins->inst_i0->inst_c0); \
- alpha_##ALPHA_BR (code, PRED_REG, 0); \
- } \
- else \
- { \
- CFG_DEBUG(3) g_print("add patch info: MONO_PATCH_INFO_LABEL offset: %0X, inst_i0: %p]\n", \
- offset, Tins->inst_i0); \
- mono_add_patch_info (cfg, offset, \
- MONO_PATCH_INFO_LABEL, Tins->inst_i0); \
- alpha_##ALPHA_BR (code, PRED_REG, 0); \
- } \
- } \
- else \
- { \
if (Tins->inst_true_bb->native_offset) \
{ \
long br_offset = (char *)cfg->native_code + \
MONO_PATCH_INFO_BB, \
Tins->inst_true_bb); \
alpha_##ALPHA_BR (code, PRED_REG, 0); \
- } \
- }
+ }
#define EMIT_COND_EXC_BRANCH(ALPHA_BR, PRED_REG, EXC_NAME) \
MonoCallInst *call;
guint offset;
unsigned int *code = (unsigned int *)(cfg->native_code + cfg->code_len);
+ MonoInst *last_ins = NULL;
guint last_offset = 0;
int max_len, cpos;
switch (ins->opcode)
{
+ case OP_RELAXED_NOP:
+ break;
case OP_LSHR:
// Shift 64 bit value right
CFG_DEBUG(4) g_print("ALPHA_CHECK: [long_shr] dreg=%d, sreg1=%d, sreg2=%d\n",
break;
case OP_BR:
- if (ins->flags & MONO_INST_BRLABEL)
+ CFG_DEBUG(4) g_print("ALPHA_CHECK: [br] target: %p, next: %p, curr: %p, last: %p [",
+ ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
+
+ if (ins->inst_target_bb->native_offset)
{
- if (ins->inst_i0->inst_c0)
- {
- CFG_DEBUG(4) g_print("inst_c0: %0lX, data: %p]\n",
- ins->inst_i0->inst_c0,
- cfg->native_code + ins->inst_i0->inst_c0);
- alpha_br(code, alpha_zero, 0);
- }
- else
- {
- CFG_DEBUG(4) g_print("add patch info: MONO_PATCH_INFO_LABEL offset: %0X, inst_i0: %p]\n",
- offset, ins->inst_i0);
- mono_add_patch_info (cfg, offset,
- MONO_PATCH_INFO_LABEL, ins->inst_i0);
-
- alpha_br(code, alpha_zero, 0);
- }
+ // Somehow native offset is offset from
+ // start of the code. So convert it to
+ // offset branch
+ long br_offset = (char *)cfg->native_code +
+ ins->inst_target_bb->native_offset - 4 - (char *)code;
+
+ CFG_DEBUG(4) g_print("jump to: native_offset: %0X, address %p]\n",
+ ins->inst_target_bb->native_offset,
+ cfg->native_code +
+ ins->inst_target_bb->native_offset);
+ alpha_br(code, alpha_zero, br_offset/4);
}
else
{
- if (ins->inst_target_bb->native_offset)
- {
- // Somehow native offset is offset from
- // start of the code. So convert it to
- // offset branch
- long br_offset = (char *)cfg->native_code +
- ins->inst_target_bb->native_offset - 4 - (char *)code;
-
- CFG_DEBUG(4) g_print("jump to: native_offset: %0X, address %p]\n",
- ins->inst_target_bb->native_offset,
- cfg->native_code +
- ins->inst_target_bb->native_offset);
- alpha_br(code, alpha_zero, br_offset/4);
- }
- else
- {
- CFG_DEBUG(4) g_print("add patch info: MONO_PATCH_INFO_BB offset: %0X, target_bb: %p]\n",
- offset, ins->inst_target_bb);
-
- mono_add_patch_info (cfg, offset,
- MONO_PATCH_INFO_BB,
- ins->inst_target_bb);
- alpha_br(code, alpha_zero, 0);
- }
+ CFG_DEBUG(4) g_print("add patch info: MONO_PATCH_INFO_BB offset: %0X, target_bb: %p]\n",
+ offset, ins->inst_target_bb);
+
+ mono_add_patch_info (cfg, offset,
+ MONO_PATCH_INFO_BB,
+ ins->inst_target_bb);
+ alpha_br(code, alpha_zero, 0);
}
break;
cpos += max_len;
+ last_ins = ins;
last_offset = offset;
- }
+ }
cfg->code_len = ((char *)code) - ((char *)cfg->native_code);
}
{
MONO_INST_NEW (cfg, vtarg, OP_MOVE);
vtarg->sreg1 = vt_reg;
- vtarg->dreg = mono_regstate_next_int (cfg->rs);
+ vtarg->dreg = mono_alloc_ireg (cfg);
mono_bblock_add_inst (cfg->cbb, vtarg);
mono_call_inst_add_outarg_reg (cfg, call, vtarg->dreg,
MONO_INST_NEW (cfg, this, OP_MOVE);
this->type = this_type;
this->sreg1 = this_reg;
- this->dreg = mono_regstate_next_int (cfg->rs);
+ this->dreg = mono_alloc_ireg (cfg);
mono_bblock_add_inst (cfg->cbb, this);
mono_call_inst_add_outarg_reg (cfg, call, this->dreg,
cinfo->ret.reg = alpha_f0;
break;
case MONO_TYPE_GENERICINST:
- if (!mono_type_generic_inst_is_valuetype (sig->ret))
+ if (!mono_type_generic_inst_is_valuetype (ret_type))
{
cinfo->ret.storage = ArgInIReg;
cinfo->ret.reg = alpha_r0;
add_general (pgr, &stack_size, ainfo);
break;
case MONO_TYPE_GENERICINST:
- if (!mono_type_generic_inst_is_valuetype (sig->params [i]))
+ if (!mono_type_generic_inst_is_valuetype (ptype))
{
add_general (pgr, &stack_size, ainfo);
break;
MONO_INST_NEW (cfg, arg, OP_OUTARG);
arg->inst_left = sig_arg;
arg->type = STACK_PTR;
- MONO_INST_LIST_ADD (&arg->node, &call->out_args);
+
+ /* prepend, so they get reversed */
+ arg->next = call->out_args;
+ call->out_args = arg;
}
if (is_virtual && i == 0) {
arg->cil_code = in->cil_code;
arg->inst_left = in;
arg->type = in->type;
- MONO_INST_LIST_ADD (&arg->node, &call->out_args);
+ /* prepend, so they get reversed */
+ arg->next = call->out_args;
+ call->out_args = arg;
CFG_DEBUG(3) g_print("ALPHA: Param[%d] - ", i);
add_outarg_reg (cfg, call, set_reg, arg_storage,
dest_reg, load);
- if (&set_reg->node != call->out_args.next)
+ if (set_reg != call->out_args)
{
- MONO_INST_LIST_ADD (&set_reg->node, &call->out_args);
+ set_reg->next = call->out_args;
+ call->out_args = set_reg;
}
}
//outarg->inst_imm = 16 + ainfo->offset + (slot - 8) * 8;
outarg->dreg = ainfo->offset + (slot - 22) * 8;
- if (&outarg->node != call->out_args.next)
+ if (outarg != call->out_args)
{
- MONO_INST_LIST_ADD (&outarg->node, &call->out_args);
+ outarg->next = call->out_args;
+ call->out_args = outarg;
}
}
arg->inst_left = vtaddr;
arg->inst_right = in;
arg->type = in->type;
- MONO_INST_LIST_ADD (&arg->node, &call->out_args);
+
+ /* prepend, so they get reversed */
+ arg->next = call->out_args;
+ call->out_args = arg;
}
else
{
zero_inst->inst_p0 = 0;
arg->inst_left = zero_inst;
arg->type = STACK_PTR;
- MONO_INST_LIST_ADD (&arg->node, &call->out_args);
+ /* prepend, so they get reversed */
+ arg->next = call->out_args;
+ call->out_args = arg;
}
else
/* if the function returns a struct, the called method a
CFG_DEBUG(2) ALPHA_DEBUG("mono_arch_get_allocatable_int_vars");
- header = mono_method_get_header (cfg->method);
+ header = cfg->header;
sig = mono_method_signature (cfg->method);
/*========================= End of Function ========================*/
-/*------------------------------------------------------------------*/
-/* */
-/* Name - mono_arch_get_thread_intrinsic */
-/* */
-/* Function - */
-/* */
-/* Returns - */
-/* */
-/*------------------------------------------------------------------*/
-
-MonoInst *
-mono_arch_get_thread_intrinsic (MonoCompile* cfg)
-{
- MonoInst *ins;
-
- if (thread_tls_offset == -1)
- return NULL;
-
- MONO_INST_NEW (cfg, ins, OP_TLS_GET);
- ins->inst_offset = thread_tls_offset;
- return (ins);
-}
-
-/*========================= End of Function ========================*/
-
/*------------------------------------------------------------------*/
/* */
/* Name - mono_arch_get_inst_for_method */
/*------------------------------------------------------------------*/
void*
-mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p,
- gboolean enable_arguments)
+mono_arch_instrument_epilog_full (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments, gboolean preserve_argument_registers)
{
unsigned int *code = p;
int save_mode = SAVE_NONE;
CFG_DEBUG(2) ALPHA_DEBUG("mono_arch_allocate_vars");
- header = mono_method_get_header (cfg->method);
+ header = cfg->header;
sig = mono_method_signature (cfg->method);
*/
gpointer*
-mono_arch_get_vcall_slot_addr (guint8* code, gpointer *regs)
+mono_arch_get_vcall_slot_addr (guint8* code, mgreg_t *regs)
{
unsigned int *pc = (unsigned int *)code;
guint32 reg, disp;
}
gpointer
-mono_arch_get_this_arg_from_call (MonoMethodSignature *sig, gssize *regs, guint8 *code)
+mono_arch_get_this_arg_from_call (MonoGenericSharingContext *gsctx, MonoMethodSignature *sig, mgreg_t *regs, guint8 *code)
{
unsigned int *pc = (unsigned int *)code;
projects / mono.git / blobdiff