#define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \
MonoInst *inst; \
- inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
- inst->opcode = OP_X86_COMPARE_MEMBASE_REG; \
+ MONO_INST_NEW ((cfg), inst, OP_X86_COMPARE_MEMBASE_REG); \
inst->inst_basereg = basereg; \
inst->inst_offset = offset; \
inst->sreg2 = operand; \
#define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \
MonoInst *inst; \
- inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \
- inst->opcode = OP_X86_COMPARE_MEMBASE_IMM; \
+ MONO_INST_NEW ((cfg), inst, OP_X86_COMPARE_MEMBASE_IMM); \
inst->inst_basereg = basereg; \
inst->inst_offset = offset; \
inst->inst_imm = operand; \
} \
} while (0)
-int call_reg_to_call_membase (int opcode);
-
%%
#
# (C) 2002 Ximian, Inc.
#
-stmt: OP_START_HANDLER {
- MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
- MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
-}
-
-stmt: CEE_ENDFINALLY {
- MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
- MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
- tree->opcode = CEE_RET;
- mono_bblock_add_inst (s->cbb, tree);
-}
-
+stmt: OP_START_HANDLER,
+stmt: OP_ENDFINALLY,
stmt: OP_ENDFILTER (reg) {
- MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
- MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1);
- MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
- tree->opcode = CEE_RET;
mono_bblock_add_inst (s->cbb, tree);
}
MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
}
+reg: CEE_LDIND_I1 (OP_REGVAR) {
+ MONO_EMIT_UNALU (s, tree, OP_SEXT_I1, state->reg1, state->left->tree->dreg);}
+
+reg: CEE_LDIND_I2 (OP_REGVAR) {
+ MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);}
+
lreg: OP_LNEG (lreg) "3" {
int tmpr = mono_regstate_next_int (s->rs);
MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
tree->opcode = OP_X86_FP_LOAD_I8;
tree->inst_basereg = X86_ESP;
tree->inst_offset = 0;
+ tree->dreg = state->reg1;
mono_bblock_add_inst (s->cbb, tree);
MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
}
tree->opcode = OP_X86_FP_LOAD_I8;
tree->inst_basereg = X86_ESP;
tree->inst_offset = 0;
+ tree->dreg = state->reg1;
mono_bblock_add_inst (s->cbb, tree);
/* change precision */
MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
tree->opcode = OP_X86_FP_LOAD_I8;
tree->inst_basereg = X86_ESP;
tree->inst_offset = 0;
+ tree->dreg = state->reg1;
mono_bblock_add_inst (s->cbb, tree);
MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
}
mono_bblock_add_inst (s->cbb, tree);
} else {
guint32 size = state->left->tree->inst_c0;
- size = (size + (MONO_ARCH_FRAME_ALIGNMENT - 1)) & ~ (MONO_ARCH_FRAME_ALIGNMENT - 1);
+ size = (size + (MONO_ARCH_LOCALLOC_ALIGNMENT - 1)) & ~ (MONO_ARCH_LOCALLOC_ALIGNMENT - 1);
MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, size);
MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
}
mono_bblock_add_inst (s->cbb, tree);
}
-stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
- tree->opcode = OP_X86_PUSH;
- tree->sreg1 = state->left->reg1;
- mono_bblock_add_inst (s->cbb, tree);
-}
-
stmt: OP_OUTARG (freg) {
MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
tree->opcode = OP_STORER8_MEMBASE_REG;
}
stmt: OP_OUTARG_R8 (freg) {
- MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
+ int esp_displ = (tree->backend.arg_info >> 16) & 0xffff;
+ int esp_offset = tree->backend.arg_info & 0xffff;
+ if (esp_displ)
+ MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, esp_displ);
tree->opcode = OP_STORER8_MEMBASE_REG;
tree->sreg1 = state->left->reg1;
tree->inst_destbasereg = X86_ESP;
- tree->inst_offset = 0;
+ tree->inst_offset = esp_offset;
mono_bblock_add_inst (s->cbb, tree);
}
mono_bblock_add_inst (s->cbb, tree);
}
+stmt: OP_X86_OUTARG_ALIGN_STACK {
+ MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, tree->inst_c0);
+}
+
reg: OP_LDADDR (OP_REGOFFSET),
reg: CEE_LDOBJ (OP_REGOFFSET) {
if (state->left->tree->inst_offset) {
tree->sreg1 = state->left->reg1;
tree->sreg2 = state->right->reg1;
tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
- tree->unused = fast_log2 [size];
+ tree->backend.shift_amount = fast_log2 [size];
mono_bblock_add_inst (s->cbb, tree);
} else {
int mult_reg = mono_regstate_next_int (s->rs);
/* nothing to do: the value is already on the FP stack */
}
+stmt: CEE_STIND_I4 (base, CEE_AND (CEE_LDIND_U4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_OR (CEE_LDIND_U4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_XOR (CEE_LDIND_U4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_U4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_U4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_AND (CEE_LDIND_I4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_OR (CEE_LDIND_I4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_XOR (CEE_LDIND_I4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)),
stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
int con = state->right->right->tree->inst_c0;
-
- if (con == 1) {
- tree->opcode = OP_X86_INC_MEMBASE;
- } else {
- tree->opcode = OP_X86_ADD_MEMBASE_IMM;
- tree->inst_imm = con;
- }
-
- tree->inst_basereg = state->left->tree->inst_basereg;
- tree->inst_offset = state->left->tree->inst_offset;
- mono_bblock_add_inst (s->cbb, tree);
-} cost {
- MBTREE_TYPE *t1 = state->right->left->left->tree;
- MBTREE_TYPE *t2 = state->left->tree;
- MBCOND (t1->inst_basereg == t2->inst_basereg &&
- t1->inst_offset == t2->inst_offset);
- return 2;
-}
-
-stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
- int con = state->right->right->tree->inst_c0;
-
- if (con == 1) {
- tree->opcode = OP_X86_DEC_MEMBASE;
+ MBTREE_TYPE *t1 = state->left->tree;
+ MBTREE_TYPE *t2 = state->right->left->left->tree;
+ int op = state->right->tree->opcode;
+
+ /* inst_basereg/offset can't be used for base
+ * operands in cost functions, since they are not set yet,
+ * so we catch all the cases and handle them here.
+ */
+ if (t1->inst_basereg == t2->inst_basereg && t1->inst_offset == t2->inst_offset) {
+ if (con == 1 && op == CEE_ADD) {
+ tree->opcode = OP_X86_INC_MEMBASE;
+ } else if (con == 1 && op == CEE_SUB) {
+ tree->opcode = OP_X86_DEC_MEMBASE;
+ } else {
+ tree->opcode = alu_reg_to_alu_membase_imm (op);
+ tree->inst_imm = con;
+ }
+
+ tree->inst_basereg = state->left->tree->inst_basereg;
+ tree->inst_offset = state->left->tree->inst_offset;
+ mono_bblock_add_inst (s->cbb, tree);
} else {
- tree->opcode = OP_X86_SUB_MEMBASE_IMM;
- tree->inst_imm = con;
+ /* emit by hand */
+ int loaded_reg = mono_regstate_next_int (s->rs);
+ int add_reg = mono_regstate_next_int (s->rs);
+ MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADI4_MEMBASE, loaded_reg, t2->inst_basereg, t2->inst_offset);
+ MONO_EMIT_NEW_BIALU_IMM (s, alu_reg_to_alu_imm (op), add_reg, loaded_reg, con);
+ MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STOREI4_MEMBASE_REG, t1->inst_basereg, t1->inst_offset, add_reg);
}
-
- tree->inst_basereg = state->left->tree->inst_basereg;
- tree->inst_offset = state->left->tree->inst_offset;
- mono_bblock_add_inst (s->cbb, tree);
-} cost {
- MBTREE_TYPE *t1 = state->right->left->left->tree;
- MBTREE_TYPE *t2 = state->left->tree;
- MBCOND (t1->inst_basereg == t2->inst_basereg &&
- t1->inst_offset == t2->inst_offset);
- return 2;
}
#
tree->sreg1 = state->left->reg1;
tree->sreg2 = base->inst_basereg;
tree->inst_offset = base->inst_offset;
- tree->opcode = OP_X86_ADD_MEMBASE;
+ tree->opcode = OP_X86_ADD_REG_MEMBASE;
mono_bblock_add_inst (s->cbb, tree);
}
tree->sreg1 = state->left->reg1;
tree->sreg2 = base->inst_basereg;
tree->inst_offset = base->inst_offset;
- tree->opcode = OP_X86_SUB_MEMBASE;
+ tree->opcode = OP_X86_SUB_REG_MEMBASE;
mono_bblock_add_inst (s->cbb, tree);
}
tree->sreg1 = state->left->reg1;
tree->sreg2 = base->inst_basereg;
tree->inst_offset = base->inst_offset;
- tree->opcode = OP_X86_MUL_MEMBASE;
+ tree->opcode = OP_X86_MUL_REG_MEMBASE;
mono_bblock_add_inst (s->cbb, tree);
}
+reg: OP_IMIN (reg, reg),
+reg: OP_IMIN_UN (reg, reg),
+reg: OP_IMAX (reg, reg),
+reg: OP_IMAX_UN (reg, reg) {
+ MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
+}
+
lreg: OP_LSHL (lreg, reg) "0" {
MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
}
}
reg: OP_ATOMIC_ADD_NEW_I4 (base, reg),
-reg: OP_ATOMIC_ADD_I4 (base, reg) {
+reg: OP_ATOMIC_ADD_I4 (base, reg),
+reg: OP_ATOMIC_EXCHANGE_I4 (base, reg),
+reg: OP_ATOMIC_CAS_IMM_I4 (base, reg) {
tree->opcode = tree->opcode;
- tree->inst_basereg = state->left->tree->inst_basereg;
- tree->inst_offset = state->left->tree->inst_offset;
tree->dreg = state->reg1;
tree->sreg2 = state->right->reg1;
-
- mono_bblock_add_inst (s->cbb, tree);
-}
-
-reg: OP_ATOMIC_EXCHANGE_I4 (base, reg) {
- tree->opcode = OP_ATOMIC_EXCHANGE_I4;
- tree->dreg = state->reg1;
- tree->sreg2 = state->right->reg1;
- tree->inst_basereg = state->left->tree->inst_basereg;
- tree->inst_offset = state->left->tree->inst_offset;
+ tree->inst_basereg = state->left->tree->inst_basereg;
+ tree->inst_offset = state->left->tree->inst_offset;
mono_bblock_add_inst (s->cbb, tree);
}
# Optimized call instructions
-# mono_arch_patch_delegate_trampoline depends on these
reg: OP_CALL_REG (CEE_LDIND_I (base)),
-freg: OP_FCALL_REG (CEE_LDIND_I (base)),
-reg: OP_LCALL_REG (CEE_LDIND_I (base)) {
+freg: OP_FCALL_REG (CEE_LDIND_I (base)) {
tree->opcode = call_reg_to_call_membase (tree->opcode);
tree->inst_basereg = state->left->left->tree->inst_basereg;
tree->inst_offset = state->left->left->tree->inst_offset;
tree->dreg = state->reg1;
}
+reg: OP_STR_CHAR_ADDR (reg, reg) "2" {
+ /*
+ * The corlib functions check for oob already.
+ * MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoString, length, state->right->reg1);
+ */
+ tree->opcode = OP_X86_LEA;
+ tree->dreg = state->reg1;
+ tree->sreg1 = state->left->reg1;
+ tree->sreg2 = state->right->reg1;
+ tree->inst_imm = G_STRUCT_OFFSET (MonoString, chars);
+ tree->backend.shift_amount = 1; /* shift by two */
+ mono_bblock_add_inst (s->cbb, tree);
+}
+
%%
-int
+static int
+alu_reg_to_alu_imm (int op)
+{
+ switch (op) {
+ case CEE_ADD:
+ return OP_ADD_IMM;
+ case CEE_SUB:
+ return OP_SUB_IMM;
+ case CEE_AND:
+ return OP_AND_IMM;
+ case CEE_OR:
+ return OP_OR_IMM;
+ case CEE_XOR:
+ return OP_XOR_IMM;
+ default:
+ g_assert_not_reached ();
+ }
+ return -1;
+}
+
+static int
+alu_reg_to_alu_membase_imm (int op)
+{
+ switch (op) {
+ case CEE_ADD:
+ return OP_X86_ADD_MEMBASE_IMM;
+ case CEE_SUB:
+ return OP_X86_SUB_MEMBASE_IMM;
+ case CEE_AND:
+ return OP_X86_AND_MEMBASE_IMM;
+ case CEE_OR:
+ return OP_X86_OR_MEMBASE_IMM;
+ case CEE_XOR:
+ return OP_X86_XOR_MEMBASE_IMM;
+ default:
+ g_assert_not_reached ();
+ }
+ return -1;
+}
+
+static int
call_reg_to_call_membase (int opcode)
{
switch (opcode) {
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