2004-06-10 Atsushi Enomoto <atsushi@ximian.com>

[mono.git] / mono / mini / inssel-x86.brg

diff --git a/mono/mini/inssel-x86.brg b/mono/mini/inssel-x86.brg
index b0e5bd3b37cc44ab8b2f9214fd2982520bb35b9e..b1f1cf67c77c49610fdc68c8ca4931fbace2a243 100644 (file)
--- a/mono/mini/inssel-x86.brg
+++ b/mono/mini/inssel-x86.brg
@@ -24,13 +24,17 @@
 #undef MONO_EMIT_BOUNDS_CHECK_IMM
 
 #define MONO_EMIT_BOUNDS_CHECK(cfg, array_reg, array_type, array_length_field, index_reg) do { \
-               MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
-               MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
+               if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
+                       MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_reg); \
+                       MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
+               } \
        } while (0)
 
 #define MONO_EMIT_BOUNDS_CHECK_IMM(cfg, array_reg, array_type, array_length_field, index_imm) do { \
-               MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
-               MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
+               if (! (state->tree->flags & MONO_INST_NORANGECHECK)) { \
+                       MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM (cfg, array_reg, G_STRUCT_OFFSET (array_type, array_length_field), index_imm); \
+                       MONO_EMIT_NEW_COND_EXC (cfg, LE_UN, "IndexOutOfRangeException"); \
+               } \
        } while (0)
 
 
@@ -491,6 +495,7 @@ stmt: CEE_STIND_I4 (OP_REGVAR, CEE_SUB (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
        mono_bblock_add_inst (s->cbb, tree);
 }
 
+stmt: CEE_STIND_I (OP_REGVAR, CEE_ADD (CEE_LDIND_I (OP_REGVAR), OP_ICONST)),
 stmt: CEE_STIND_I4 (OP_REGVAR, CEE_ADD (CEE_LDIND_I4 (OP_REGVAR), OP_ICONST)) {
        int con = state->right->right->tree->inst_c0;
        int dreg = state->left->tree->dreg;
@@ -616,4 +621,60 @@ freg: OP_FCONV_TO_R4 (freg) "0" {
        /* fixme: nothing to do ??*/
 }
 
+reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
+       MonoInst *base = state->right->left->tree;
+
+       tree->dreg = state->reg1;
+       tree->sreg1 = state->left->reg1;
+       tree->sreg2 = base->inst_basereg; 
+       tree->inst_offset = base->inst_offset; 
+       tree->opcode = OP_X86_ADD_MEMBASE; 
+       mono_bblock_add_inst (s->cbb, tree);
+} 
+
+reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
+       MonoInst *base = state->right->left->tree;
+
+       tree->dreg = state->reg1;
+       tree->sreg1 = state->left->reg1;
+       tree->sreg2 = base->inst_basereg; 
+       tree->inst_offset = base->inst_offset; 
+       tree->opcode = OP_X86_SUB_MEMBASE; 
+       mono_bblock_add_inst (s->cbb, tree);
+} 
+
+reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
+       MonoInst *base = state->right->left->tree;
+
+       tree->dreg = state->reg1;
+       tree->sreg1 = state->left->reg1;
+       tree->sreg2 = base->inst_basereg; 
+       tree->inst_offset = base->inst_offset; 
+       tree->opcode = OP_X86_MUL_MEMBASE; 
+       mono_bblock_add_inst (s->cbb, tree);
+} 
+
+lreg: OP_LSHL (lreg, reg) "0" {
+       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+lreg: OP_LSHL (lreg, OP_ICONST) "0" {
+       MONO_EMIT_BIALU_IMM (s, tree, OP_LSHL_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+}
+
+lreg: OP_LSHR (lreg, reg) "0" {
+       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+lreg: OP_LSHR (lreg, OP_ICONST) "0" {
+       MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+}
+
+lreg: OP_LSHR_UN (lreg, reg) "0" {
+       MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1);
+}
+
+lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" {
+       MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
+}
 %%