} \
} while (0)
-int call_reg_to_call_membase (int opcode);
-int alu_reg_to_alu_imm (int op);
-int alu_reg_to_alu_membase_imm (int op);
-
%%
#
MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
}
-stmt: CEE_ENDFINALLY {
+stmt: OP_ENDFINALLY {
MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset);
tree->opcode = CEE_RET;
MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2);
}
+reg: CEE_LDIND_I1 (OP_REGVAR) {
+ MONO_EMIT_UNALU (s, tree, OP_SEXT_I1, state->reg1, state->left->tree->dreg);}
+
+reg: CEE_LDIND_I2 (OP_REGVAR) {
+ MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);}
+
lreg: OP_LNEG (lreg) "3" {
int tmpr = mono_regstate_next_int (s->rs);
MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1);
tree->opcode = OP_X86_FP_LOAD_I8;
tree->inst_basereg = X86_ESP;
tree->inst_offset = 0;
+ tree->dreg = state->reg1;
mono_bblock_add_inst (s->cbb, tree);
MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
}
tree->opcode = OP_X86_FP_LOAD_I8;
tree->inst_basereg = X86_ESP;
tree->inst_offset = 0;
+ tree->dreg = state->reg1;
mono_bblock_add_inst (s->cbb, tree);
/* change precision */
MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
tree->opcode = OP_X86_FP_LOAD_I8;
tree->inst_basereg = X86_ESP;
tree->inst_offset = 0;
+ tree->dreg = state->reg1;
mono_bblock_add_inst (s->cbb, tree);
MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
}
mono_bblock_add_inst (s->cbb, tree);
} else {
guint32 size = state->left->tree->inst_c0;
- size = (size + (MONO_ARCH_FRAME_ALIGNMENT - 1)) & ~ (MONO_ARCH_FRAME_ALIGNMENT - 1);
+ size = (size + (MONO_ARCH_LOCALLOC_ALIGNMENT - 1)) & ~ (MONO_ARCH_LOCALLOC_ALIGNMENT - 1);
MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, size);
MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
}
}
stmt: OP_OUTARG_R8 (freg) {
- MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
+ int esp_displ = (tree->backend.arg_info >> 16) & 0xffff;
+ int esp_offset = tree->backend.arg_info & 0xffff;
+ if (esp_displ)
+ MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, esp_displ);
tree->opcode = OP_STORER8_MEMBASE_REG;
tree->sreg1 = state->left->reg1;
tree->inst_destbasereg = X86_ESP;
- tree->inst_offset = 0;
+ tree->inst_offset = esp_offset;
mono_bblock_add_inst (s->cbb, tree);
}
mono_bblock_add_inst (s->cbb, tree);
}
+stmt: OP_X86_OUTARG_ALIGN_STACK {
+ MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, tree->inst_c0);
+}
+
reg: OP_LDADDR (OP_REGOFFSET),
reg: CEE_LDOBJ (OP_REGOFFSET) {
if (state->left->tree->inst_offset) {
tree->sreg1 = state->left->reg1;
tree->sreg2 = state->right->reg1;
tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
- tree->unused = fast_log2 [size];
+ tree->backend.shift_amount = fast_log2 [size];
mono_bblock_add_inst (s->cbb, tree);
} else {
int mult_reg = mono_regstate_next_int (s->rs);
tree->sreg1 = state->left->reg1;
tree->sreg2 = state->right->reg1;
tree->inst_imm = G_STRUCT_OFFSET (MonoString, chars);
- tree->unused = 1; /* shift by two */
+ tree->backend.shift_amount = 1; /* shift by two */
mono_bblock_add_inst (s->cbb, tree);
}
%%
-int
+static int
alu_reg_to_alu_imm (int op)
{
switch (op) {
return -1;
}
-int
+static int
alu_reg_to_alu_membase_imm (int op)
{
switch (op) {
return -1;
}
-int
+static int
call_reg_to_call_membase (int opcode)
{
switch (opcode) {