2007-05-27 Zoltan Varga <vargaz@gmail.com>
[mono.git] / mono / mini / inssel-x86.brg
index ad694bc889afaebf33e3b97156abcd47a6373498..47b52ce32a7ff988d3c5eda9eec93ed3b7b74b54 100644 (file)
@@ -37,7 +37,6 @@
                } \
        } while (0)
 
-
 %%
 
 #
@@ -55,7 +54,7 @@ stmt: OP_START_HANDLER {
        MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP);
 }
 
-stmt: CEE_ENDFINALLY {
+stmt: OP_ENDFINALLY {
        MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region);
        MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset); 
        tree->opcode = CEE_RET;
@@ -89,6 +88,7 @@ freg: OP_LCONV_TO_R8 (lreg) {
        tree->opcode = OP_X86_FP_LOAD_I8;
        tree->inst_basereg = X86_ESP;
        tree->inst_offset = 0;
+       tree->dreg = state->reg1;
        mono_bblock_add_inst (s->cbb, tree);
        MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
 }
@@ -99,6 +99,7 @@ freg: OP_LCONV_TO_R4 (lreg) {
        tree->opcode = OP_X86_FP_LOAD_I8;
        tree->inst_basereg = X86_ESP;
        tree->inst_offset = 0;
+       tree->dreg = state->reg1;
        mono_bblock_add_inst (s->cbb, tree);
        /* change precision */
        MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORER4_MEMBASE_REG, X86_ESP, 0, state->reg1);
@@ -112,6 +113,7 @@ freg: CEE_CONV_R_UN (reg) {
        tree->opcode = OP_X86_FP_LOAD_I8;
        tree->inst_basereg = X86_ESP;
        tree->inst_offset = 0;
+       tree->dreg = state->reg1;
        mono_bblock_add_inst (s->cbb, tree);
        MONO_EMIT_NEW_BIALU_IMM (s, OP_ADD_IMM, X86_ESP, X86_ESP, 8);
 }
@@ -149,6 +151,17 @@ cflags: OP_COMPARE (CEE_LDIND_U4 (base), OP_ICONST) {
        mono_bblock_add_inst (s->cbb, tree);
 }
 
+
+cflags: OP_COMPARE (CEE_LDIND_REF (OP_ICONST), OP_ICONST),
+cflags: OP_COMPARE (CEE_LDIND_I (OP_ICONST), OP_ICONST),
+cflags: OP_COMPARE (CEE_LDIND_I4 (OP_ICONST), OP_ICONST),
+cflags: OP_COMPARE (CEE_LDIND_U4 (OP_ICONST), OP_ICONST) {
+       tree->opcode = OP_X86_COMPARE_MEM_IMM;
+       tree->inst_offset = state->left->left->tree->inst_c0;
+       tree->inst_imm = state->right->tree->inst_c0;
+       mono_bblock_add_inst (s->cbb, tree);
+}
+
 cflags: OP_COMPARE (reg, CEE_LDIND_REF (base)),
 cflags: OP_COMPARE (reg, CEE_LDIND_I (base)),
 cflags: OP_COMPARE (reg, CEE_LDIND_I4 (base)),
@@ -205,7 +218,9 @@ reg: OP_LOCALLOC (OP_ICONST) {
                MONO_EMIT_NEW_ICONST (s, tree->sreg1, state->left->tree->inst_c0);
                mono_bblock_add_inst (s->cbb, tree);
        } else {
-               MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, state->left->tree->inst_c0);
+               guint32 size = state->left->tree->inst_c0;
+               size = (size + (MONO_ARCH_LOCALLOC_ALIGNMENT - 1)) & ~ (MONO_ARCH_LOCALLOC_ALIGNMENT - 1);
+               MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, size);
                MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP);
        }
 }
@@ -263,6 +278,15 @@ stmt: OP_OUTARG (CEE_LDIND_I (OP_REGVAR)) {
        mono_bblock_add_inst (s->cbb, tree);
 }
 
+stmt: OP_OUTARG (OP_GOT_ENTRY (CEE_LDIND_I (OP_REGVAR), OP_PATCH_INFO)) {
+       MonoInst *ins;
+       ins = mono_mempool_alloc0 (s->mempool, sizeof (MonoInst));
+       ins->opcode = OP_X86_PUSH_GOT_ENTRY;
+       ins->inst_right = state->left->right->tree;
+       ins->inst_basereg = state->left->left->left->tree->dreg;
+       mono_bblock_add_inst (s->cbb, ins);
+}
+
 stmt: OP_OUTARG (lreg) {
        MONO_EMIT_NEW_UNALU (s, OP_X86_PUSH, -1, state->left->reg2);
        tree->opcode = OP_X86_PUSH;
@@ -312,12 +336,6 @@ stmt: OP_OUTARG (CEE_LDIND_REF (base)) {
        mono_bblock_add_inst (s->cbb, tree);
 }
 
-stmt: OP_OUTARG (CEE_LDOBJ (reg)) {
-       tree->opcode = OP_X86_PUSH;
-       tree->sreg1 = state->left->reg1;
-       mono_bblock_add_inst (s->cbb, tree);
-}
-
 stmt: OP_OUTARG (freg) {
        MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
        tree->opcode = OP_STORER8_MEMBASE_REG;
@@ -379,10 +397,14 @@ stmt: OP_OUTARG_VT (OP_ICONST) {
 
 stmt: OP_OUTARG_VT (reg) {
        tree->opcode = OP_X86_PUSH;
-       tree->sreg1 = state->left->tree->dreg;
+       tree->sreg1 = state->left->reg1;
        mono_bblock_add_inst (s->cbb, tree);
 }
 
+stmt: OP_X86_OUTARG_ALIGN_STACK {
+       MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, tree->inst_c0);
+}      
+
 reg: OP_LDADDR (OP_REGOFFSET),
 reg: CEE_LDOBJ (OP_REGOFFSET) {
        if (state->left->tree->inst_offset) {
@@ -408,7 +430,7 @@ reg: CEE_LDELEMA (reg, reg) "15" {
                tree->sreg1 = state->left->reg1;
                tree->sreg2 = state->right->reg1;
                tree->inst_imm = G_STRUCT_OFFSET (MonoArray, vector);
-               tree->unused = fast_log2 [size];
+               tree->backend.shift_amount = fast_log2 [size];
                mono_bblock_add_inst (s->cbb, tree);
        } else {
                int mult_reg = mono_regstate_next_int (s->rs);
@@ -423,46 +445,46 @@ stmt: CEE_STIND_R8 (OP_REGVAR, freg) {
        /* nothing to do: the value is already on the FP stack */
 }
 
+stmt: CEE_STIND_I4 (base, CEE_AND (CEE_LDIND_U4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_OR (CEE_LDIND_U4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_XOR (CEE_LDIND_U4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_U4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_U4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_AND (CEE_LDIND_I4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_OR (CEE_LDIND_I4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_XOR (CEE_LDIND_I4 (base), OP_ICONST)),
+stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)),
 stmt: CEE_STIND_I4 (base, CEE_ADD (CEE_LDIND_I4 (base), OP_ICONST)) {
        int con = state->right->right->tree->inst_c0;   
-
-       if (con == 1) {
-               tree->opcode = OP_X86_INC_MEMBASE;
-       } else {
-               tree->opcode = OP_X86_ADD_MEMBASE_IMM;
-               tree->inst_imm = con;
-       }
-
-       tree->inst_basereg = state->left->tree->inst_basereg;
-       tree->inst_offset = state->left->tree->inst_offset;
-       mono_bblock_add_inst (s->cbb, tree);
-} cost {
-       MBTREE_TYPE *t1 = state->right->left->left->tree;
-       MBTREE_TYPE *t2 = state->left->tree;
-       MBCOND (t1->inst_basereg == t2->inst_basereg &&
-               t1->inst_offset == t2->inst_offset);
-       return 2;
-}
-
-stmt: CEE_STIND_I4 (base, CEE_SUB (CEE_LDIND_I4 (base), OP_ICONST)) {
-       int con = state->right->right->tree->inst_c0;   
-
-       if (con == 1) {
-               tree->opcode = OP_X86_DEC_MEMBASE;
+       MBTREE_TYPE *t1 = state->left->tree;
+       MBTREE_TYPE *t2 = state->right->left->left->tree;
+       int op = state->right->tree->opcode;
+
+       /* inst_basereg/offset can't be used for base
+        * operands in cost functions, since they are not set yet,
+        * so we catch all the cases and handle them here.
+        */
+       if (t1->inst_basereg == t2->inst_basereg && t1->inst_offset == t2->inst_offset) {
+               if (con == 1 && op == CEE_ADD) {
+                       tree->opcode = OP_X86_INC_MEMBASE;
+               } else if (con == 1 && op == CEE_SUB) {
+                       tree->opcode = OP_X86_DEC_MEMBASE;
+               } else {
+                       tree->opcode = alu_reg_to_alu_membase_imm (op);
+                       tree->inst_imm = con;
+               }
+
+               tree->inst_basereg = state->left->tree->inst_basereg;
+               tree->inst_offset = state->left->tree->inst_offset;
+               mono_bblock_add_inst (s->cbb, tree);
        } else {
-               tree->opcode = OP_X86_SUB_MEMBASE_IMM;
-               tree->inst_imm = con;
+               /* emit by hand */
+               int loaded_reg = mono_regstate_next_int (s->rs);
+               int add_reg = mono_regstate_next_int (s->rs);
+               MONO_EMIT_NEW_LOAD_MEMBASE_OP (s, OP_LOADI4_MEMBASE, loaded_reg, t2->inst_basereg, t2->inst_offset);
+               MONO_EMIT_NEW_BIALU_IMM (s, alu_reg_to_alu_imm (op), add_reg, loaded_reg, con);
+               MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STOREI4_MEMBASE_REG, t1->inst_basereg, t1->inst_offset, add_reg);
        }
-
-       tree->inst_basereg = state->left->tree->inst_basereg;
-       tree->inst_offset = state->left->tree->inst_offset;
-       mono_bblock_add_inst (s->cbb, tree);
-} cost {
-       MBTREE_TYPE *t1 = state->right->left->left->tree;
-       MBTREE_TYPE *t2 = state->left->tree;
-       MBCOND (t1->inst_basereg == t2->inst_basereg &&
-               t1->inst_offset == t2->inst_offset);
-       return 2;
 }
 
 #
@@ -700,9 +722,146 @@ lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" {
        MONO_EMIT_BIALU_IMM (s, tree, OP_LSHR_UN_IMM, state->reg1, state->left->reg1, state->right->tree->inst_c0);
 }
 
-reg: OP_X86_TLS_GET {
+reg: OP_ATOMIC_ADD_NEW_I4 (base, reg),
+reg: OP_ATOMIC_ADD_I4 (base, reg) {
+       tree->opcode = tree->opcode;
+       tree->inst_basereg = state->left->tree->inst_basereg; 
+       tree->inst_offset = state->left->tree->inst_offset; 
+       tree->dreg = state->reg1;
+       tree->sreg2 = state->right->reg1;
+    
+       mono_bblock_add_inst (s->cbb, tree);
+}
+
+reg: OP_ATOMIC_EXCHANGE_I4 (base, reg) {
+    tree->opcode = OP_ATOMIC_EXCHANGE_I4;
+    tree->dreg = state->reg1;
+    tree->sreg2 = state->right->reg1;
+    tree->inst_basereg = state->left->tree->inst_basereg; 
+    tree->inst_offset = state->left->tree->inst_offset; 
+    
+       mono_bblock_add_inst (s->cbb, tree);
+}
+
+# Optimized call instructions
+# mono_arch_patch_delegate_trampoline depends on these
+reg: OP_CALL_REG (CEE_LDIND_I (base)),
+freg: OP_FCALL_REG (CEE_LDIND_I (base)),
+reg: OP_LCALL_REG (CEE_LDIND_I (base)) {
+       tree->opcode = call_reg_to_call_membase (tree->opcode);
+       tree->inst_basereg = state->left->left->tree->inst_basereg;
+       tree->inst_offset = state->left->left->tree->inst_offset;
+       tree->dreg = state->reg1;
+       mono_bblock_add_inst (s->cbb, tree);
+}
+
+lreg: OP_LCALL_REG (CEE_LDIND_I (base)) {
+       tree->opcode = call_reg_to_call_membase (tree->opcode);
+       tree->inst_basereg = state->left->left->tree->inst_basereg;
+       tree->inst_offset = state->left->left->tree->inst_offset;
+       tree->dreg = state->reg1;
+       mono_bblock_add_inst (s->cbb, tree);
+}
+
+stmt: OP_VOIDCALL_REG (CEE_LDIND_I (base)) {
+       tree->opcode = call_reg_to_call_membase (tree->opcode);
+       tree->inst_basereg = state->left->left->tree->inst_basereg;
+       tree->inst_offset = state->left->left->tree->inst_offset;
+       mono_bblock_add_inst (s->cbb, tree);
+}
+
+stmt: OP_VCALL_REG (CEE_LDIND_I (base), reg) {
+       mono_arch_emit_this_vret_args (s, (MonoCallInst*)tree, -1, -1, state->right->reg1);
+       
+       tree->opcode = call_reg_to_call_membase (tree->opcode);
+       tree->inst_basereg = state->left->left->tree->inst_basereg;
+       tree->inst_offset = state->left->left->tree->inst_offset;
+       tree->dreg = state->reg1;
+       mono_bblock_add_inst (s->cbb, tree);
+}
+
+# Optimized ldind(reg) rules
+reg: CEE_LDIND_REF (OP_REGVAR),
+reg: CEE_LDIND_I (OP_REGVAR),
+reg: CEE_LDIND_I4 (OP_REGVAR),
+reg: CEE_LDIND_U4 (OP_REGVAR) "0" {
+       state->reg1 = state->left->tree->dreg;
        tree->dreg = state->reg1;
+}
+
+reg: OP_STR_CHAR_ADDR (reg, reg) "2" {
+       /*
+        * The corlib functions check for oob already.
+        * MONO_EMIT_BOUNDS_CHECK (s, state->left->reg1, MonoString, length, state->right->reg1);
+        */
+       tree->opcode = OP_X86_LEA;
+       tree->dreg = state->reg1;
+       tree->sreg1 = state->left->reg1;
+       tree->sreg2 = state->right->reg1;
+       tree->inst_imm = G_STRUCT_OFFSET (MonoString, chars);
+       tree->backend.shift_amount = 1; /* shift by two */
        mono_bblock_add_inst (s->cbb, tree);
 }
 
 %%
+
+static int
+alu_reg_to_alu_imm (int op)
+{
+       switch (op) {
+       case CEE_ADD:
+               return OP_ADD_IMM;
+       case CEE_SUB:
+               return OP_SUB_IMM;
+       case CEE_AND:
+               return OP_AND_IMM;
+       case CEE_OR:
+               return OP_OR_IMM;
+       case CEE_XOR:
+               return OP_XOR_IMM;
+       default:
+               g_assert_not_reached ();
+       }
+       return -1;
+}
+
+static int
+alu_reg_to_alu_membase_imm (int op)
+{
+       switch (op) {
+       case CEE_ADD:
+               return OP_X86_ADD_MEMBASE_IMM;
+       case CEE_SUB:
+               return OP_X86_SUB_MEMBASE_IMM;
+       case CEE_AND:
+               return OP_X86_AND_MEMBASE_IMM;
+       case CEE_OR:
+               return OP_X86_OR_MEMBASE_IMM;
+       case CEE_XOR:
+               return OP_X86_XOR_MEMBASE_IMM;
+       default:
+               g_assert_not_reached ();
+       }
+       return -1;
+}
+
+static int
+call_reg_to_call_membase (int opcode)
+{
+       switch (opcode) {
+       case OP_CALL_REG:
+               return OP_CALL_MEMBASE;
+       case OP_FCALL_REG:
+               return OP_FCALL_MEMBASE;
+       case OP_VCALL_REG:
+               return OP_VCALL_MEMBASE;
+       case OP_LCALL_REG:
+               return OP_LCALL_MEMBASE;
+       case OP_VOIDCALL_REG:
+               return OP_VOIDCALL_MEMBASE;
+       default:
+               g_assert_not_reached ();
+       }
+
+       return -1;
+}