MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8);
}
+stmt: OP_AMD64_SAVE_SP_TO_LMF {
+ mono_bblock_add_inst (s->cbb, tree);
+}
+
base: OP_INARG_VT (base) {
MONO_EMIT_NEW_LOAD_MEMBASE (s, state->reg1, state->left->tree->inst_basereg,
state->left->tree->inst_offset);
reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) {
MonoInst *base = state->right->left->tree;
- MONO_EMIT_BIALU_MEMBASE (cfg, tree, OP_X86_ADD_MEMBASE, state->reg1, state->left->reg1, base->inst_basereg, base->inst_offset);
+ MONO_EMIT_BIALU_MEMBASE (cfg, tree, OP_X86_ADD_REG_MEMBASE, state->reg1, state->left->reg1, base->inst_basereg, base->inst_offset);
}
reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) {
MonoInst *base = state->right->left->tree;
- MONO_EMIT_BIALU_MEMBASE (cfg, tree, OP_X86_SUB_MEMBASE, state->reg1, state->left->reg1, base->inst_basereg, base->inst_offset);
+ MONO_EMIT_BIALU_MEMBASE (cfg, tree, OP_X86_SUB_REG_MEMBASE, state->reg1, state->left->reg1, base->inst_basereg, base->inst_offset);
}
reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) {
MonoInst *base = state->right->left->tree;
- MONO_EMIT_BIALU_MEMBASE (cfg, tree, OP_X86_MUL_MEMBASE, state->reg1, state->left->reg1, base->inst_basereg, base->inst_offset);
+ MONO_EMIT_BIALU_MEMBASE (cfg, tree, OP_X86_MUL_REG_MEMBASE, state->reg1, state->left->reg1, base->inst_basereg, base->inst_offset);
}
reg: OP_LSHL (reg, reg),
}
# Optimized call instructions
-# mono_arch_patch_delegate_trampoline depends on these
reg: OP_CALL_REG (CEE_LDIND_I (base)),
freg: OP_FCALL_REG (CEE_LDIND_I (base)),
reg: OP_LCALL_REG (CEE_LDIND_I (base)) {