acfg->relocations = reloc;
if (strcmp (reloc->section->name, ".data") == 0) {
acfg->num_relocs++;
- g_print ("reloc: %s at %d\n", target, acfg->cur_section->cur_offset);
+ //g_print ("reloc: %s at %d\n", target, acfg->cur_section->cur_offset);
}
acfg->cur_section->cur_offset += sizeof (gpointer);
}
int offset = sect->cur_offset;
/*offset += (sheaders [sect->shidx].sh_addralign - 1);
offset &= ~(sheaders [sect->shidx].sh_addralign - 1);*/
+ offset += (8 - 1);
+ offset &= ~(8 - 1);
bin_writer_emit_ensure_buffer (sect, offset);
- g_print ("section %s aligned to %d from %d\n", sect->name, offset, sect->cur_offset);
+ //g_print ("section %s aligned to %d from %d\n", sect->name, offset, sect->cur_offset);
sect->cur_offset = offset;
bin_writer_emit_ensure_buffer (sect, add->cur_offset);
add->parent = sect;
sect->cur_offset += add->cur_offset;
add->cur_offset = offset; /* it becomes the offset in the parent section */
- g_print ("subsection %d of %s added at offset %d (align: %d)\n", add->subsection, sect->name, add->cur_offset, (int)sheaders [sect->shidx].sh_addralign);
+ //g_print ("subsection %d of %s added at offset %d (align: %d)\n", add->subsection, sect->name, add->cur_offset, (int)sheaders [sect->shidx].sh_addralign);
add->data = NULL;
add->data_len = 0;
}
* needed by the code we generate.
*/
switch (reloc->reloc_type) {
- case R_ARM_CALL: {
+ case R_ARM_CALL:
+ case R_ARM_JUMP24: {
guint32 *code = (guint32*)(gpointer)data;
guint32 ins = *code;
int diff = addr;
- /* bl */
- g_assert (data [3] == 0xeb);
+ if (reloc->reloc_type == R_ARM_CALL)
+ /* bl */
+ g_assert (data [3] == 0xeb);
+ else
+ /* b */
+ g_assert (data [3] == 0xea);
if (diff >= 0 && diff <= 33554431) {
diff >>= 2;
ins = (ins & 0xff000000) | diff;
guint8 *code = data;
guint32 val = addr;
- g_assert (val <= 0xffff);
- ARM_ADD_REG_IMM (code, ARMREG_IP, ARMREG_PC, 0, 0);
+ g_assert (val <= 0xffffff);
+ if (val & 0xff0000)
+ ARM_ADD_REG_IMM (code, ARMREG_IP, ARMREG_PC, (val & 0xFF0000) >> 16, 16);
+ else
+ ARM_ADD_REG_IMM (code, ARMREG_IP, ARMREG_PC, 0, 0);
ARM_ADD_REG_IMM (code, ARMREG_IP, ARMREG_IP, (val & 0xFF00) >> 8, 24);
ARM_LDR_IMM (code, ARMREG_PC, ARMREG_IP, val & 0xFF);
break;
num_sections = collect_sections (acfg, secth, all_sections, 16);
hash = build_hash (acfg, num_sections, &dyn_str_table);
num_symtab = hash [1]; /* FIXME */
+#if 0
g_print ("num_sections: %d\n", num_sections);
g_print ("dynsym: %d, dynstr size: %d\n", hash [1], (int)dyn_str_table.data->len);
for (i = 0; i < num_sections; ++i) {
g_print ("section %s, size: %d, %x\n", all_sections [i]->name, all_sections [i]->cur_offset, all_sections [i]->cur_offset);
}
-
+#endif
/* Associate the bin sections with the ELF sections */
memset (sections, 0, sizeof (sections));
for (i = 0; i < num_sections; ++i) {
}
sections [all_sections [i]->shidx] = sect;
- sections [all_sections [i]->shidx]->cur_offset += (8 - 1);
- sections [all_sections [i]->shidx]->cur_offset &= ~(8 - 1);
}
/* at this point we know where in the file the first segment sections go */