IL_000a: ret
}
- // Check that localloc can't be inlined
+ // Check that localloc cannot be inlined
.method static public int32 test_0_localloc_inline () cil managed {
.maxstack 16
.locals init (
ret
}
-#if !defined(__ppc__) && !defined(__powerpc__) && !defined(__arm__) && !defined(__sparc__)
- // PPC handles overflow by clipping, but this test assumes
- // no overflow handling. According to ECMA the result of
- // float->int conversion is undefined if overflow occurs, so
- // both behaviours are valid.
- .method public static int32 test_0_fconv_to_i () cil managed {
+ .method public static int32 test_1234_fconv_u () cil managed {
.maxstack 16
- ldc.r8 2147483648.0
- conv.i
- ldc.i8 2147483648
- conv.i
- beq L1
- ldc.i4.1
- ret
- L1:
- ldc.i4.0
+ ldc.r8 1234.0
+ conv.u
+ conv.i4
ret
}
-#endif
.method public static int32 test_0_get_type_from_handle_on_bblock_boundary () cil managed
{
.method private static hidebysig
default void regress_80622_inner (object x) cil managed
{
- .locals (unsigned int8 i)
+ .locals init (unsigned int8 i)
// Method begins at RVA 0x2050
// Code size 14 (0xe)
.maxstack 8
.method public static int32 test_0_long_shift_regalloc () cil managed
{
- .locals (unsigned int32 'cilsimp.28', unsigned int64 'cilsimp.27', int32 'cilsimp.26')
+ .locals init (unsigned int32 'cilsimp.28', unsigned int64 'cilsimp.27', int32 'cilsimp.26')
.maxstack 4
// Code size 34 (0x22)
.maxstack 17
IL_0000: ldarg.0
+ ldc.i4.1
+ add
IL_0001: ldarg.1
IL_0002: ldarg.2
IL_0003: ldarg.3
IL_0014: ldarg.s 12
IL_0016: ldarg.s 13
IL_0018: ldarg.s 14
+ ldc.i4.1
+ add
IL_001a: ldarg.s 15
+ ldc.i4.1
+ add
tail.
IL_001c: call int32 class Tests::manyargs_callee(int32, int32, int32, int32, int32, int32, int32, int32, int32, int32, int32, int32, int32, int32, int32, int32)
IL_0021: ret
// method line 4
.method public static hidebysig
- default int32 test_0_many_args_tail_call () cil managed
+ default int32 test_139_many_args_tail_call () cil managed
{
// Some platforms might not be able to AOT tail calls
.custom instance void class [TestDriver]CategoryAttribute::'.ctor'(string) = (01 00 08 21 46 55 4C 4C 41 4F 54 00 00 ) // ...!FULLAOT..
IL_0014: ldc.i4.s 0x0f
IL_0016: ldc.i4.s 0x10
IL_0018: call int32 class Tests::manyargs_tail_caller(int32, int32, int32, int32, int32, int32, int32, int32, int32, int32, int32, int32, int32, int32, int32, int32)
- IL_001d: ldc.i4 136
- IL_0022: beq IL_0029
-
- IL_0027: ldc.i4.1
IL_0028: ret
- IL_0029: ldc.i4.0
- IL_002a: ret
} // end of method main::Main
.class nested private auto ansi beforefieldinit R1
.method public static int32 test_0_regalloc_regress_497271 () cil managed
{
- .locals (int32 var)
+ .locals init (int32 var)
ldc.i4 4
stsfld int32 Tests::shift1
ldc.i4.0
ret
}
+
+ .method public hidebysig static int32 SizeOfT<T>() cil managed
+ {
+ .maxstack 8
+
+ sizeof !!0
+ ret
+ }
+
+ .method public static default int32 test_1_sizeof_gshared () cil managed {
+ call int32 Tests::SizeOfT<int8>()
+ ldc.i4.1
+ ceq
+ ret
+ }
+
+ .method public static default int32 test_1_sizeof_ref () cil managed {
+ call int32 Tests::SizeOfT<object>()
+ sizeof [mscorlib]System.IntPtr
+ ceq
+ ret
+ }
+
+ .field static public int32 volatile_int
+
+ .method public static default int32 test_5_volatile_load_store () cil managed {
+ ldsflda int32 class Tests::volatile_int
+ ldc.i4 5
+ volatile.
+ stind.i4
+ ldsflda int32 class Tests::volatile_int
+ volatile.
+ ldind.i4
+ ret
+ }
+
+ .method public static
+ default int32 regress_693905_inner (int32 x, int32 acc) cil managed
+ {
+ // Method begins at RVA 0x2050
+ // Code size 17 (0x11)
+ .maxstack 5
+ IL_0000: ldarg.0
+ IL_0001: brtrue.s IL_0005
+
+ IL_0003: ldarg.1
+ IL_0004: ret
+ IL_0005: ldarg.0
+ IL_0006: ldc.i4.1
+ IL_0007: sub
+ IL_0008: ldarg.1
+ IL_0009: ldc.i4.1
+ IL_000a: add
+ IL_000b: starg.s 1
+ IL_000d: starg.s 0
+ IL_000f: br.s IL_0000
+
+ } // end of method Test::f
+
+ .method public static
+ default int32 test_10_regress_693905 () cil managed
+ {
+ ldc.i4.s 0x0a
+ ldc.i4.0
+ call int32 class Tests::regress_693905_inner(int32, int32)
+ ret
+ }
+
+ .method public static
+ default int32 test_0_llvm_regress_171 () cil managed
+ {
+ .locals init (
+ int32 i
+ )
+
+ call int32 Tests::return_1_noinline ()
+ ldc.i4.1
+ beq L1
+ ldc.i4.1
+ stloc.s 0
+ call int32 Tests::return_1_noinline ()
+ ldc.i4.0
+ beq L1
+ L1:
+ ldloc.s 0
+ ret
+ }
+
+ .field public static int32 static_a
+
+ .method public static
+ default int32 test_4_ldfld_stfld_static () cil managed
+ {
+ ldnull
+ ldc.i4 2
+ stfld int32 Tests::static_a
+ ldnull
+ ldfld int32 Tests::static_a
+ ldnull
+ ldflda int32 Tests::static_a
+ ldind.i4
+ add
+ ret
+ }
+
+ .method public static default int32 no_initlocals_inner () cil managed
+ {
+ .locals (
+ int32 V_0,
+ float32 V_1,
+ float64 V_2,
+ valuetype Tests/TailCallStruct V_3)
+ ldloc V_0
+ ret
+ }
+
+ .method public static default int32 test_0_no_initlocals () cil managed
+ {
+ call int32 Tests::no_initlocals_inner()
+ pop
+ ldc.i4.0
+ ret
+ }
+
+ .method public hidebysig static int32 test_5_r4_fadd_mixed() cil managed
+ {
+ // Code size 17 (0x11)
+ .maxstack 2
+ .locals init (float32 V_0,
+ float64 V_1)
+ IL_0000: ldc.r4 3
+ IL_0005: stloc.0
+ IL_0006: ldc.r8 2
+ IL_000b: stloc.1
+ IL_000c: ldloc.0
+ IL_000d: ldloc.1
+ IL_000e: add
+ IL_000f: conv.i4
+ IL_0010: ret
+ }
+
+ .method public hidebysig static int32 test_0_fcmp_eq_r4_mixed() cil managed
+ {
+ // Code size 32 (0x20)
+ .maxstack 2
+ .locals init (float32 V_0,
+ float64 V_1)
+ IL_0000: ldc.r4 1
+ IL_0005: stloc.0
+ IL_0006: ldc.r8 1
+ IL_000f: stloc.1
+ IL_0010: ldloc.0
+ IL_0012: ldloc.1
+ IL_0013: bne.un IL_001e
+
+ IL_0018: ldc.i4.0
+ IL_0019: br IL_001f
+
+ IL_001e: ldc.i4.1
+ IL_001f: ret
+ } // end of method Tests::test_0_fcmp_eq_r4_mixed
+
+ .method public hidebysig static int32 test_0_fceq_r4_mixed() cil managed
+ {
+ // Code size 31 (0x1f)
+ .maxstack 2
+ .locals init (float32 V_0,
+ float64 V_1,
+ bool V_2)
+ IL_0000: ldc.r4 1
+ IL_0005: stloc.0
+ IL_0006: ldc.r8 1
+ IL_000b: stloc.1
+ IL_000c: ldloc.0
+ IL_000d: ldloc.1
+ IL_000e: ceq
+ IL_0010: stloc.2
+ IL_0011: ldloc.2
+ IL_0012: brfalse IL_001d
+
+ IL_0017: ldc.i4.0
+ IL_0018: br IL_001e
+
+ IL_001d: ldc.i4.1
+ IL_001e: ret
+ } // end of method Tests::test_0_fceq_r4
}
projects / mono.git / blobdiff