* cpu-x86.md: Added new instructions to handle float to int using SSE regs.

[mono.git] / mono / mini / cpu-x86.md

diff --git a/mono/mini/cpu-x86.md b/mono/mini/cpu-x86.md
index 67b9d2a671da80b42f42645b96a62dec90aaadc2..e3cb5afe52c7b4bb1d715d64cff92de1c15a07d7 100644 (file)
--- a/mono/mini/cpu-x86.md
+++ b/mono/mini/cpu-x86.md
@@ -21,6 +21,7 @@
 #      l  long reg (forced eax:edx)
 #      L  long reg (dynamic)
 #      y  the reg needs to be one of EAX,EBX,ECX,EDX (sete opcodes)
+#      x  XMM reg (XMM0 - X007)
 #
 # len:number         describe the maximun length in bytes of the instruction
 #                   number is a positive integer.  If the length is not specified
@@ -130,9 +131,9 @@ checkthis: src1:b len:3
 voidcall: len:17 clob:c
 voidcall_reg: src1:i len:11 clob:c
 voidcall_membase: src1:b len:16 clob:c
-fcall: dest:f len:22 clob:c
-fcall_reg: dest:f src1:i len:16 clob:c
-fcall_membase: dest:f src1:b len:22 clob:c
+fcall: dest:f len:48 clob:c
+fcall_reg: dest:f src1:i len:48 clob:c
+fcall_membase: dest:f src1:b len:48 clob:c
 lcall: dest:l len:17 clob:c
 lcall_reg: dest:l src1:i len:11 clob:c
 lcall_membase: dest:l src1:b len:16 clob:c
@@ -308,6 +309,8 @@ atomic_exchange_i4: src1:b src2:i dest:a len:24
 atomic_cas_imm_i4: src1:b src2:i dest:a len:24
 memory_barrier: len:16
 
+relaxed_nop: len:2
+
 # Linear IR opcodes
 nop: len:0
 dummy_use: len:0
@@ -403,4 +406,43 @@ x86_and_reg_membase: dest:i src1:i src2:b clob:1 len:6
 x86_or_reg_membase: dest:i src1:i src2:b clob:1 len:6
 x86_xor_reg_membase: dest:i src1:i src2:b clob:1 len:6
 
-x86_fxch: len:2
\ No newline at end of file
+x86_fxch: len:2
+
+addps: dest:x src1:x src2:x len:3 clob:1
+divps: dest:x src1:x src2:x len:3 clob:1
+mulps: dest:x src1:x src2:x len:3 clob:1
+subps: dest:x src1:x src2:x len:3 clob:1
+maxps: dest:x src1:x src2:x len:3 clob:1
+minps: dest:x src1:x src2:x len:3 clob:1
+
+haddps: dest:x src1:x src2:x len:4 clob:1
+hsubps: dest:x src1:x src2:x len:4 clob:1
+addsubps: dest:x src1:x src2:x len:4 clob:1
+
+pand: dest:x src1:x src2:x len:4 clob:1
+por: dest:x src1:x src2:x len:4 clob:1
+pxor: dest:x src1:x src2:x len:4 clob:1
+
+sqrtps: dest:x src1:x len:4
+rsqrtps: dest:x src1:x len:4
+shuffleps: dest:x src1:x len:5
+
+xmove: dest:x src1:x len:4
+xzero: dest:x len:4
+
+extract_i4: dest:i src1:x len:4
+iconv_to_r8_raw: dest:f src1:i len:17 
+
+loadx_membase: dest:x src1:b len:7
+storex_membase: dest:b src1:x len:7
+storex_membase_reg: dest:b src1:x len:7
+
+loadx_aligned_membase: dest:x src1:b len:7
+storex_aligned_membase_reg: dest:b src1:x len:7
+
+push_r4: src1:f len:13
+loadx_stack: dest:x len: 13
+
+fconv_to_r8_x: dest:x src1:f len:60 
+xconv_r8_to_i4: dest:y src1:x len:60
+