2005-07-21 Atsushi Enomoto <atsushi@ximian.com>

[mono.git] / mono / mini / cpu-sparc.md

diff --git a/mono/mini/cpu-sparc.md b/mono/mini/cpu-sparc.md
index 87e6555859051e7af52f76967b01a1d36caaad4d..10f8b321e153b3a6e5e419a30bcd202f9d8ef326 100644 (file)
--- a/mono/mini/cpu-sparc.md
+++ b/mono/mini/cpu-sparc.md
@@ -15,7 +15,9 @@
 #      i  integer register
 #      b  base register (used in address references)
 #      f  floating point register
-#   l  register pair (same as 'i' on v9)
+#   L  register pair (same as 'i' on v9)
+#   l  %o0:%o1 register pair (same as 'i' on v9)
+#   o  %o0
 #
 # len:number         describe the maximun length in bytes of the instruction
 # number is a positive integer
@@ -84,7 +86,6 @@ ldc.r8:
 dup:
 pop:
 jmp: len:64
-call: dest:i clob:c len:40
 calli:
 ret:
 br.s:
@@ -162,11 +163,11 @@ not: dest:i src1:i len:4
 conv.i1: dest:i src1:i len:8
 conv.i2: dest:i src1:i len:8
 conv.i4: dest:i src1:i len:4
-conv.i8:
+conv.i8: dest:i src1:i len:4
 conv.r4: dest:f src1:i len:64
 conv.r8: dest:f src1:i len:64
 conv.u4: dest:i src1:i len:
-conv.u8:
+conv.u8: dest:i src1:i len:4
 callvirt:
 cpobj:
 ldobj:
@@ -177,6 +178,7 @@ isinst:
 conv.r.un:
 unbox:
 throw: src1:i len:64
+op_rethrow: src1:i len:64
 ldfld:
 ldflda:
 stfld:
@@ -277,7 +279,6 @@ tail.:
 initobj:
 cpblk:
 initblk:
-rethrow:
 sizeof:
 refanytype:
 illegal:
@@ -305,17 +306,19 @@ outarg: src1:i len:1
 outarg_imm: len:5
 retarg:
 setret: dest:a src1:i len:4
-setlret: dest:l src1:i src2:i len:8
 setreg: dest:i src1:i len:4 clob:r
 setregimm: dest:i len:64 clob:r
 setfreg: dest:f src1:f len:4 clob:r
 sparc_setfreg_float: dest:f src1:f len:4 clob:r
 checkthis: src1:b len:4
 oparglist: src1:i len:64
+call: dest:o clob:c len:40
+call_reg: dest:o src1:i len:64 clob:c
+call_membase: dest:o src1:b len:64 clob:c
 voidcall: len:64 clob:c
 voidcall_reg: src1:i len:64 clob:c
 voidcall_membase: src1:b len:64 clob:c
-fcall: dest:f len:42 clob:c
+fcall: dest:f len:64 clob:c
 fcall_reg: dest:f src1:i len:64 clob:c
 fcall_membase: dest:f src1:b len:64 clob:c
 lcall: dest:l len:42 clob:c
@@ -324,8 +327,6 @@ lcall_membase: dest:l src1:b len:64 clob:c
 vcall: len:40 clob:c
 vcall_reg: src1:i len:64 clob:c
 vcall_membase: src1:b len:64 clob:c
-call_reg: dest:i src1:i len:64 clob:c
-call_membase: dest:i src1:b len:64 clob:c
 trap:
 iconst: dest:i len:64
 i8const: dest:i len:64
@@ -360,7 +361,9 @@ loadr8_membase: dest:f src1:b len:64
 loadu4_mem: dest:i len:8
 move: dest:i src1:i len:4
 add_imm: dest:i src1:i len:64
+addcc_imm: dest:i src1:i len:64
 sub_imm: dest:i src1:i len:64
+subcc_imm: dest:i src1:i len:64
 mul_imm: dest:i src1:i len:64
 div_imm: dest:a src1:i src2:i len:64
 div_un_imm: dest:a src1:i src2:i len:64
@@ -412,7 +415,7 @@ long_conv_to_u8:
 long_conv_to_u2:
 long_conv_to_u1:
 long_conv_to_i:
-long_conv_to_ovf_i: dest:i src1:i src2:i len:44
+long_conv_to_ovf_i: dest:i src1:i src2:i len:48
 long_conv_to_ovf_u:
 long_add_ovf:
 long_add_ovf_un:
@@ -482,11 +485,11 @@ float_not: dest:f src1:f len:4
 float_conv_to_i1: dest:i src1:f len:40
 float_conv_to_i2: dest:i src1:f len:40
 float_conv_to_i4: dest:i src1:f len:40
-float_conv_to_i8: dest:l src1:f len:40
+float_conv_to_i8: dest:L src1:f len:40
 float_conv_to_r4: dest:f src1:f len:8
 float_conv_to_r8:
 float_conv_to_u4: dest:i src1:f len:40
-float_conv_to_u8: dest:l src1:f len:40
+float_conv_to_u8: dest:L src1:f len:40
 float_conv_to_u2: dest:i src1:f len:40
 float_conv_to_u1: dest:i src1:f len:40
 float_conv_to_i: dest:i src1:f len:40
@@ -532,8 +535,8 @@ adc_imm: dest:i src1:i len:64
 sbb: dest:i src1:i src2:i len:4
 sbb_imm: dest:i src1:i len:64
 br_reg: src1:i len:8
-op_bigmul: len:2 dest:l src1:a src2:i
-op_bigmul_un: len:2 dest:l src1:a src2:i
+op_bigmul: len:2 dest:L src1:a src2:i
+op_bigmul_un: len:2 dest:L src1:a src2:i
 fmove: dest:f src1:f len:8
 
 # 32 bit opcodes