#
# See the code in mini-x86.c for more details on how the specifiers are used.
#
+memory_barrier: len:4
nop: len:4
break: len:4
ldarg.0:
dup:
pop:
jmp: len:92
-call: dest:a clob:c len:4
+call: dest:a clob:c len:16
calli:
ret:
br.s:
add: dest:i src1:i src2:i len:4
sub: dest:i src1:i src2:i len:4
mul: dest:i src1:i src2:i len:4
-div: dest:i src1:i src2:i len:12
-div.un: dest:i src1:i src2:i len:12
-rem: dest:i src1:i src2:i len:20
-rem.un: dest:i src1:i src2:i len:20
+div: dest:i src1:i src2:i len:40
+div.un: dest:i src1:i src2:i len:16
+rem: dest:i src1:i src2:i len:48
+rem.un: dest:i src1:i src2:i len:24
and: dest:i src1:i src2:i len:4
or: dest:i src1:i src2:i len:4
xor: dest:i src1:i src2:i len:4
newobj:
castclass:
isinst:
-conv.r.un: dest:f src1:i len:28
+conv.r.un: dest:f src1:i len:32
unbox:
-throw: src1:i len:8
+throw: src1:i len:20
+op_rethrow: src1:i len:20
ldfld:
ldflda:
stfld:
conv.i: dest:i src1:i len:4
conv.ovf.i:
conv.ovf.u:
-add.ovf: dest:i src1:i src2:i len:32
-add.ovf.un:
-mul.ovf: dest:i src1:i src2:i len:12
+add.ovf: dest:i src1:i src2:i len:16
+add.ovf.un: dest:i src1:i src2:i len:16
+mul.ovf: dest:i src1:i src2:i len:16
# this opcode is handled specially in the code generator
mul.ovf.un: dest:i src1:i src2:i len:16
-sub.ovf:
-sub.ovf.un:
+sub.ovf: dest:i src1:i src2:i len:16
+sub.ovf.un: dest:i src1:i src2:i len:16
+add_ovf_carry: dest:i src1:i src2:i len:16
+sub_ovf_carry: dest:i src1:i src2:i len:16
+add_ovf_un_carry: dest:i src1:i src2:i len:16
+sub_ovf_un_carry: dest:i src1:i src2:i len:16
start_handler: len:8
endfinally: len:12
leave:
ldloc:
ldloca:
stloc:
-localloc: dest:i src1:i len:30
+localloc: dest:i src1:i len:60
endfilter: len:12
unaligned.:
volatile.:
refanytype:
illegal:
endmac:
-mono_func1:
-mono_proc2:
-mono_proc3:
-mono_free:
mono_objaddr:
mono_ldptr:
mono_vtaddr:
lcompare:
local:
arg:
+oparglist: src1:i len:12
outarg: src1:i len:1
outarg_imm: len:5
retarg:
setregimm: dest:i len:8 clob:r
setfreg: dest:f src1:f len:4 clob:r
checkthis: src1:b len:4
-voidcall: len:8 clob:c
+voidcall: len:16 clob:c
voidcall_reg: src1:i len:8 clob:c
voidcall_membase: src1:b len:12 clob:c
-fcall: dest:f len:8 clob:c
+fcall: dest:f len:16 clob:c
fcall_reg: dest:f src1:i len:8 clob:c
fcall_membase: dest:f src1:b len:12 clob:c
-lcall: dest:l len:8 clob:c
+lcall: dest:l len:16 clob:c
lcall_reg: dest:l src1:i len:8 clob:c
lcall_membase: dest:l src1:b len:12 clob:c
-vcall: len:8 clob:c
+vcall: len:16 clob:c
vcall_reg: src1:i len:8 clob:c
vcall_membase: src1:b len:12 clob:c
call_reg: dest:a src1:i len:8 clob:c
reg:
regoffset:
label:
-store_membase_imm: dest:b len:12
-store_membase_reg: dest:b src1:i len:8
-storei1_membase_imm: dest:b len:12
-storei1_membase_reg: dest:b src1:i len:8
-storei2_membase_imm: dest:b len:12
-storei2_membase_reg: dest:b src1:i len:8
-storei4_membase_imm: dest:b len:12
-storei4_membase_reg: dest:b src1:i len:8
+store_membase_imm: dest:b len:20
+store_membase_reg: dest:b src1:i len:12
+storei1_membase_imm: dest:b len:20
+storei1_membase_reg: dest:b src1:i len:12
+storei2_membase_imm: dest:b len:20
+storei2_membase_reg: dest:b src1:i len:12
+storei4_membase_imm: dest:b len:20
+storei4_membase_reg: dest:b src1:i len:12
storei8_membase_imm: dest:b
storei8_membase_reg: dest:b src1:i
-storer4_membase_reg: dest:b src1:f len:8
-storer8_membase_reg: dest:b src1:f len:8
+storer4_membase_reg: dest:b src1:f len:16
+storer8_membase_reg: dest:b src1:f len:12
load_membase: dest:i src1:b len:12
loadi1_membase: dest:i src1:b len:12
loadu1_membase: dest:i src1:b len:12
loadi4_membase: dest:i src1:b len:12
loadu4_membase: dest:i src1:b len:12
loadi8_membase: dest:i src1:b
-loadr4_membase: dest:f src1:b len:8
+loadr4_membase: dest:f src1:b len:12
loadr8_membase: dest:f src1:b len:12
loadu4_mem: dest:i len:8
move: dest:i src1:i len:4
long_conv_to_u2:
long_conv_to_u1:
long_conv_to_i:
-long_conv_to_ovf_i: dest:i src1:i src2:i len:30
+long_conv_to_ovf_i: dest:i src1:i src2:i len:32
long_conv_to_ovf_u:
long_add_ovf:
long_add_ovf_un:
addcc: dest:i src1:i src2:i len:4
subcc: dest:i src1:i src2:i len:4
adc_imm: dest:i src1:i len:12
+addcc_imm: dest:i src1:i len:12
+subcc_imm: dest:i src1:i len:12
sbb: dest:i src1:i src2:i len:4
sbb_imm: dest:i src1:i len:12
br_reg: src1:i len:8
ppc_subfze: dest:i src1:i len:4
op_bigmul: len:8 dest:l src1:i src2:i
op_bigmul_un: len:8 dest:l src1:i src2:i
+tls_get: len:8 dest:i