-2009-07-10 Jerry Maine <crashfourit@gmail.com>
-
- Contributed under the terms of the MIT/X11 license by
- Jerry Maine <crashfourit@gail.com>.
+2010-03-30 Zoltan Varga <vargaz@gmail.com>
+
+ * arm/*.sh: Remove bash dependency.
- * amd64/amd64-codegen.h: Add marcos for coding several specific sse opcodes.
- * amd64/amd64-codegen.h: Fix bugs in simd marcos.
+2009-08-14 Zoltan Varga <vargaz@gmail.com>
-2009-06-24 Jerry Maine <crashfourit@gmail.com>
+ * arm/arm-codegen.h: Add armv6 MOVW/MOVT.
+
+2009-07-03 Jerry Maine <crashfourit@gmail.com>
Contributed under the terms of the MIT/X11 license by
Jerry Maine <crashfourit@gail.com>.
- * amd64/amd64-codegen.h: Add marcos for coding several specific sse opcodes.
+ * amd64/amd64-codegen.h: Added missing code gen marco for single packed square root.
+
+Fri Jul 24 16:54:13 CEST 2009 Steven Munroe <munroesj@us.ibm.com>
+
+ This patch is contributed under the terms of the MIT/X11 license
+
+ * arch/ppc/ppc-codegen.h (ppc_ha): Define high adjusted
+ conversion to support combining addis for bits 32-47 with
+ signed load/store diplacements for bits 48-63.
+ (ppc_fcfidx, ppc_fctidx, ppc_fctidzx): Share with PPC32.
+ These instructions are availble to 32-bit programs on 64-bit
+ hardware and 32-bit both starting with PowerISA V2.01.
+ [__mono_ppc64__]: Define ppc_mftgpr and ppc_mffgpr for Power6
+ native mode.
+ [!__mono_ppc64__]: Define ppc_is_imm32 as constant true for
+ ppc32.
+
+2009-07-20 Zoltan Varga <vargaz@gmail.com>
+
+ * amd64/amd64-codegen.h (amd64_sse_pminud_reg_reg): Fix the encoding
+ of this instruction.
+
+2009-07-13 Zoltan Varga <vargaz@gmail.com>
+
+ * x86/x86-codegen.h: Applied patch from Marian Salaj <salo3@atlas.cz>.
+ Fix encoding of PMINSW and PMINSD. Fixes #521662.
2009-06-22 Zoltan Varga <vargaz@gmail.com>