We have to use gnu as because the optimization level can change the code

[cacao.git] / jit / mips / codegen.h

diff --git a/jit/mips/codegen.h b/jit/mips/codegen.h
index 99f79c81e62fa6476ca760130fee96baaa0aa747..91e9928e31bf77bbc2853a075db2d3dd418a99f7 100644 (file)
--- a/jit/mips/codegen.h
+++ b/jit/mips/codegen.h
@@ -27,7 +27,7 @@
 
    Authors: Andreas Krall
 
-   $Id: codegen.h 564 2003-11-03 15:47:13Z twisti $
+   $Id: codegen.h 860 2004-01-06 18:49:09Z twisti $
 
 */
 
@@ -78,59 +78,13 @@
 
 #define REG_IFTMP       1    /* temporary integer and floating point register */
 
-/* register descripton - array ************************************************/
-
-/* #define REG_RES   0         reserved register for OS or code generator     */
-/* #define REG_RET   1         return value register                          */
-/* #define REG_EXC   2         exception value register (only old jit)        */
-/* #define REG_SAV   3         (callee) saved register                        */
-/* #define REG_TMP   4         scratch temporary register (caller saved)      */
-/* #define REG_ARG   5         argument register (caller saved)               */
-
-/* #define REG_END   -1        last entry in tables */
- 
-int nregdescint[] = {
-       REG_RES, REG_RES, REG_RET, REG_RES, REG_ARG, REG_ARG, REG_ARG, REG_ARG, 
-       REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP, REG_TMP, REG_TMP, 
-       REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
-       REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES,
-       REG_END };
 
 #define INT_SAV_CNT      8   /* number of int callee saved registers          */
 #define INT_ARG_CNT      8   /* number of int argument registers              */
 
-/* for use of reserved registers, see comment above */
-       
-int nregdescfloat[] = {
-       REG_RET, REG_RES, REG_RES, REG_RES, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
-       REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_ARG, REG_ARG, REG_ARG, REG_ARG, 
-       REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
-       REG_SAV, REG_TMP, REG_SAV, REG_TMP, REG_SAV, REG_TMP, REG_SAV, REG_TMP,
-       REG_END };
-
 #define FLT_SAV_CNT      4   /* number of flt callee saved registers          */
 #define FLT_ARG_CNT      8   /* number of flt argument registers              */
 
-/* for use of reserved registers, see comment above */
-
-
-/* parameter allocation mode */
-
-int nreg_parammode = PARAMMODE_NUMBERED;  
-
-   /* parameter-registers will be allocated by assigning the
-      1. parameter:   int/float-reg a0
-      2. parameter:   int/float-reg a1  
-      3. parameter:   int/float-reg a2 ....
-   */
-
-
-/* stackframe-infos ***********************************************************/
-
-int parentargs_base; /* offset in stackframe for the parameter from the caller*/
-
-/* -> see file 'calling.doc' */
-
 
 /* macros to create code ******************************************************/
 
@@ -343,8 +297,8 @@ int parentargs_base; /* offset in stackframe for the parameter from the caller*/
 #define M_MOVID(i,d)            M_FP3(0,4,d,i,0)                /* d = i      */
 #define M_MOVLD(l,d)            M_FP3(0,5,d,l,0)                /* d = l      */
 
-#define M_DMFC1(l,f)                           M_FP3(0,1,f,l,0)
-#define M_DMTC1(l,f)                           M_FP3(0,5,f,l,0)
+#define M_DMFC1(l,f)            M_FP3(0,1,f,l,0)
+#define M_DMTC1(l,f)            M_FP3(0,5,f,l,0)
 
 #define M_FCMPFF(a,b)           M_FP3(0x30,FMT_F,a,b,0)         /* c = a == b */
 #define M_FCMPFD(a,b)           M_FP3(0x30,FMT_D,a,b,0)         /* c = a == b */
@@ -361,13 +315,16 @@ int parentargs_base; /* offset in stackframe for the parameter from the caller*/
 #define M_FCMPOLEF(a,b)         M_FP3(0x36,FMT_F,a,b,0)         /* c = a <= b */
 #define M_FCMPOLED(a,b)         M_FP3(0x36,FMT_D,a,b,0)         /* c = a <= b */
 #define M_FCMPULEF(a,b)         M_FP3(0x37,FMT_F,a,b,0)         /* c = a <= b */
-#define M_FCMPULE(a,b)          M_FP3(0x37,FMT_D,a,b,0)         /* c = a <= b */
+#define M_FCMPULED(a,b)         M_FP3(0x37,FMT_D,a,b,0)         /* c = a <= b */
 
 #define M_FBF(disp)             M_ITYPE(0x11,8,0,disp)          /* br false   */
 #define M_FBT(disp)             M_ITYPE(0x11,8,1,disp)          /* br true    */
 #define M_FBFL(disp)            M_ITYPE(0x11,8,2,disp)          /* br false   */
 #define M_FBTL(disp)            M_ITYPE(0x11,8,3,disp)          /* br true    */
 
+#define M_CMOVF(a,b)                   M_RTYPE(0x00,a,0,b,0,1)
+#define M_CMOVT(a,b)                   M_RTYPE(0x00,a,1,b,0,1)
+
 /*
  * Load Address pseudo instruction:
  * -n32 addressing mode -> 32 bit addrs, -64 addressing mode -> 64 bit addrs
@@ -422,6 +379,17 @@ int parentargs_base; /* offset in stackframe for the parameter from the caller*/
 
 #define SOFTNULLPTRCHECK       /* soft null pointer check supportet as option */
 
+
+/* function prototypes */
+
+void codegen_init();
+void init_exceptions();
+void codegen();
+void codegen_close();
+void dseg_display(s4 *s4ptr);
+
+void docacheflush(u1 *p, long bytelen);
+
 #endif /* _CODEGEN_H */