-/* i386/ngen.c *****************************************************************
+/* i386/ngen.c - machine code generator for i386
- Copyright (c) 1997 A. Krall, R. Grafl, M. Gschwind, M. Probst
+ Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
+ Institut f. Computersprachen, TU Wien
+ R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, M. Probst,
+ S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich,
+ J. Wenninger
- See file COPYRIGHT for information on usage and disclaimer of warranties
+ This file is part of CACAO.
- Contains the codegenerator for an i386 processor.
- This module generates i386 machine code for a sequence of
- pseudo commands (ICMDs).
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2, or (at
+ your option) any later version.
- Authors: Andreas Krall EMAIL: cacao@complang.tuwien.ac.at
- Reinhard Grafl EMAIL: cacao@complang.tuwien.ac.at
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
- Last Change: $Id: ngen.c 255 2003-03-16 23:38:49Z twisti $
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA.
+
+ Contact: cacao@complang.tuwien.ac.at
+
+ Authors: Andreas Krall
+ Christian Thalinger
+
+ $Id: ngen.c 551 2003-11-01 20:35:28Z twisti $
+
+*/
-*******************************************************************************/
#include "jitdef.h" /* phil */
+#include "methodtable.c"
/* additional functions and macros to generate code ***************************/
-/* #define BlockPtrOfPC(pc) block+block_index[pc] */
#define BlockPtrOfPC(pc) ((basicblock *) iptr->target)
#endif
-#define CALCOFFSETBYTES(val) \
- do { \
- if ((s4) (val) < -128 || (s4) (val) > 127) offset += 4; \
- else if ((s4) (val) != 0) offset += 1; \
- } while (0)
+#define CALCOFFSETBYTES(var, val) \
+ if ((s4) (val) < -128 || (s4) (val) > 127) (var) += 4; \
+ else if ((s4) (val) != 0) (var) += 1;
+
+
+#define CALCREGOFFBYTES(var, val) \
+ if ((val) > 15) (var) += 4; \
+ else if ((val) != 0) (var) += 1;
+
+
+#define CALCIMMEDIATEBYTES(var, val) \
+ if ((s4) (val) < -128 || (s4) (val) > 127) (var) += 4; \
+ else (var) += 1;
/* gen_nullptr_check(objreg) */
-#ifdef SOFTNULLPTRCHECK
#define gen_nullptr_check(objreg) \
if (checknull) { \
- i386_alu_imm_reg(I386_CMP, 0, (objreg)); \
+ i386_test_reg_reg((objreg), (objreg)); \
i386_jcc(I386_CC_E, 0); \
mcode_addxnullrefs(mcodeptr); \
}
-#else
-#define gen_nullptr_check(objreg)
-#endif
/* MCODECHECK(icnt) */
#define MCODECHECK(icnt) \
- if((mcodeptr+(icnt))>mcodeend)mcodeptr=mcode_increase((u1*)mcodeptr)
+ if ((mcodeptr + (icnt)) > (u1*) mcodeend) mcodeptr = (u1*) mcode_increase((u1*) mcodeptr)
/* M_INTMOVE:
generates an integer-move from register a to b.
/* M_FLTMOVE:
generates a floating-point-move from register a to b.
if a and b are the same float-register, no code will be generated
-*/
+*/
-#define M_FLTMOVE(a,b) if(a!=b){M_FMOV(a,b);}
+#define M_FLTMOVE(reg,dreg) panic("M_FLTMOVE");
+
+#define M_LNGMEMMOVE(reg,dreg) \
+ do { \
+ i386_mov_membase_reg(REG_SP, (reg) * 8, REG_ITMP1); \
+ i386_mov_membase_reg(REG_SP, (reg) * 8 + 4, REG_ITMP2); \
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, (dreg) * 8); \
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, (dreg) * 8 + 4); \
+ } while (0)
/* var_to_reg_xxx:
*/
#define var_to_reg_int(regnr,v,tempnr) \
- do { \
+ if ((v)->flags & INMEMORY) { \
+ COUNT_SPILLS; \
+ i386_mov_membase_reg(REG_SP, (v)->regoff * 8, tempnr); \
+ regnr = tempnr; \
+ } else { \
+ regnr = (v)->regoff; \
+ }
+
+
+
+#define var_to_reg_flt(regnr,v,tempnr) \
+ if ((v)->type == TYPE_FLT) { \
if ((v)->flags & INMEMORY) { \
COUNT_SPILLS; \
- i386_mov_membase_reg(REG_SP, (v)->regoff * 8, tempnr); \
+ i386_flds_membase(REG_SP, (v)->regoff * 8); \
+ fpu_st_offset++; \
regnr = tempnr; \
} else { \
+ i386_fld_reg((v)->regoff + fpu_st_offset); \
+ fpu_st_offset++; \
regnr = (v)->regoff; \
} \
- } while (0)
-
-
+ } else { \
+ if ((v)->flags & INMEMORY) { \
+ COUNT_SPILLS; \
+ i386_fldl_membase(REG_SP, (v)->regoff * 8); \
+ fpu_st_offset++; \
+ regnr = tempnr; \
+ } else { \
+ i386_fld_reg((v)->regoff + fpu_st_offset); \
+ fpu_st_offset++; \
+ regnr = (v)->regoff; \
+ } \
+ }
-#define var_to_reg_flt(regnr,v,tempnr) \
- do { \
+#define NEW_var_to_reg_flt(regnr,v,tempnr) \
+ if ((v)->type == TYPE_FLT) { \
+ if ((v)->flags & INMEMORY) { \
+ COUNT_SPILLS; \
+ i386_flds_membase(REG_SP, (v)->regoff * 8); \
+ fpu_st_offset++; \
+ regnr = tempnr; \
+ } else { \
+ regnr = (v)->regoff; \
+ } \
+ } else { \
if ((v)->flags & INMEMORY) { \
COUNT_SPILLS; \
- i386_fstps_membase(REG_SP, (v)->regoff * 8); \
+ i386_fldl_membase(REG_SP, (v)->regoff * 8); \
+ fpu_st_offset++; \
regnr = tempnr; \
} else { \
- panic("floats have to be in memory"); \
+ regnr = (v)->regoff; \
} \
- } while (0)
+ }
/* reg_of_var:
varinfo *var;
switch (v->varkind) {
- case TEMPVAR:
- if (!(v->flags & INMEMORY))
- return(v->regoff);
- break;
- case STACKVAR:
- var = &(interfaces[v->varnum][v->type]);
- v->regoff = var->regoff;
- if (!(var->flags & INMEMORY))
- return(var->regoff);
- break;
- case LOCALVAR:
- var = &(locals[v->varnum][v->type]);
- v->regoff = var->regoff;
- if (!(var->flags & INMEMORY))
- return(var->regoff);
- break;
- case ARGVAR:
- v->regoff = v->varnum;
- if (IS_FLT_DBL_TYPE(v->type)) {
- if (v->varnum < fltreg_argnum) {
- v->regoff = argfltregs[v->varnum];
- return(argfltregs[v->varnum]);
- }
- }
- else
- if (v->varnum < intreg_argnum) {
- v->regoff = argintregs[v->varnum];
- return(argintregs[v->varnum]);
- }
- v->regoff -= intreg_argnum;
- break;
+ case TEMPVAR:
+ if (!(v->flags & INMEMORY))
+ return(v->regoff);
+ break;
+ case STACKVAR:
+ var = &(interfaces[v->varnum][v->type]);
+ v->regoff = var->regoff;
+ if (!(var->flags & INMEMORY))
+ return(var->regoff);
+ break;
+ case LOCALVAR:
+ var = &(locals[v->varnum][v->type]);
+ v->regoff = var->regoff;
+ if (!(var->flags & INMEMORY))
+ return(var->regoff);
+ break;
+ case ARGVAR:
+ v->regoff = v->varnum;
+ if (IS_FLT_DBL_TYPE(v->type)) {
+ if (v->varnum < fltreg_argnum) {
+ v->regoff = argfltregs[v->varnum];
+ return(argfltregs[v->varnum]);
+ }
}
+ else
+ if (v->varnum < intreg_argnum) {
+ v->regoff = argintregs[v->varnum];
+ return(argintregs[v->varnum]);
+ }
+ v->regoff -= intreg_argnum;
+ break;
+ }
v->flags |= INMEMORY;
return tempregnum;
}
*/
#define store_reg_to_var_int(sptr, tempregnum) \
- do { \
- if ((sptr)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- i386_mov_reg_membase(tempregnum, REG_SP, (sptr)->regoff * 8); \
- } \
- } while (0)
+ if ((sptr)->flags & INMEMORY) { \
+ COUNT_SPILLS; \
+ i386_mov_reg_membase(tempregnum, REG_SP, (sptr)->regoff * 8); \
+ }
#define store_reg_to_var_flt(sptr, tempregnum) \
- do { \
- if ((sptr)->type == TYPE_FLT) { \
- if ((sptr)->flags & INMEMORY) { \
- if ((sptr)->varkind == ARGVAR) { \
- COUNT_SPILLS; \
- /* a little fpu optimization */ \
- /*if (iptr[1].opc != ICMD_FSTORE) {*/ \
- i386_fstps_membase(REG_SP, (sptr)->regoff * 8); \
- /*}*/ \
- } \
- } else { \
- panic("floats have to be in memory"); \
- } \
+ if ((sptr)->type == TYPE_FLT) { \
+ if ((sptr)->flags & INMEMORY) { \
+ COUNT_SPILLS; \
+ i386_fstps_membase(REG_SP, (sptr)->regoff * 8); \
+ fpu_st_offset--; \
} else { \
- if ((sptr)->flags & INMEMORY) { \
- if ((sptr)->varkind == ARGVAR) { \
- COUNT_SPILLS; \
- /* a little fpu optimization */ \
- /*if (iptr[1].opc != ICMD_FSTORE) {*/ \
- i386_fstpl_membase(REG_SP, (sptr)->regoff * 8); \
- /*}*/ \
- } \
- } else { \
- panic("doubles have to be in memory"); \
- } \
+/* i386_fxch_reg((sptr)->regoff);*/ \
+ i386_fstp_reg((sptr)->regoff + fpu_st_offset); \
+ fpu_st_offset--; \
} \
- } while (0)
-
-
-/* NullPointerException handlers and exception handling initialisation */
-
-typedef struct sigctx_struct {
-
- long sc_onstack; /* sigstack state to restore */
- long sc_mask; /* signal mask to restore */
- long sc_pc; /* pc at time of signal */
- long sc_ps; /* psl to retore */
- long sc_regs[32]; /* processor regs 0 to 31 */
- long sc_ownedfp; /* fp has been used */
- long sc_fpregs[32]; /* fp regs 0 to 31 */
- unsigned long sc_fpcr; /* floating point control register */
- unsigned long sc_fp_control; /* software fpcr */
- /* rest is unused */
- unsigned long sc_reserved1, sc_reserved2;
- unsigned long sc_ssize;
- char *sc_sbase;
- unsigned long sc_traparg_a0;
- unsigned long sc_traparg_a1;
- unsigned long sc_traparg_a2;
- unsigned long sc_fp_trap_pc;
- unsigned long sc_fp_trigger_sum;
- unsigned long sc_fp_trigger_inst;
- unsigned long sc_retcode[2];
-} sigctx_struct;
+ } else { \
+ if ((sptr)->flags & INMEMORY) { \
+ COUNT_SPILLS; \
+ i386_fstpl_membase(REG_SP, (sptr)->regoff * 8); \
+ fpu_st_offset--; \
+ } else { \
+/* i386_fxch_reg((sptr)->regoff);*/ \
+ i386_fstp_reg((sptr)->regoff + fpu_st_offset); \
+ fpu_st_offset--; \
+ } \
+ }
/* NullPointerException signal handler for hardware null pointer check */
-void catch_NullPointerException(int sig, int code, sigctx_struct *sigctx)
+void catch_NullPointerException(int sig)
{
sigset_t nsig;
int instr;
- long faultaddr;
+/* long faultaddr; */
+
+ void **_p = (void **) &sig;
+ struct sigcontext *sigctx = (struct sigcontext *) ++_p;
/* Reset signal handler - necessary for SysV, does no harm for BSD */
- instr = *((int*)(sigctx->sc_pc));
- faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f];
+ instr = *((int*)(sigctx->eip));
+/* faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f]; */
+
+/* fprintf(stderr, "null=%d %p addr=%p\n", sig, sigctx, sigctx->eip); */
- if (faultaddr == 0) {
- signal(sig, (void*) catch_NullPointerException); /* reinstall handler */
+/* if (faultaddr == 0) { */
+ signal(sig, (void *) catch_NullPointerException); /* reinstall handler */
sigemptyset(&nsig);
sigaddset(&nsig, sig);
- sigprocmask(SIG_UNBLOCK, &nsig, NULL); /* unblock signal */
- sigctx->sc_regs[REG_ITMP1_XPTR] =
- (long) proto_java_lang_NullPointerException;
- sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
- sigctx->sc_pc = (long) asm_handle_nat_exception;
+ sigprocmask(SIG_UNBLOCK, &nsig, NULL); /* unblock signal */
+ sigctx->eax = (long) proto_java_lang_NullPointerException; /* REG_ITMP1_XPTR */
+ sigctx->edx = sigctx->eip; /* REG_ITMP2_XPC */
+ sigctx->eip = (long) asm_handle_exception;
+
return;
- }
- else {
- faultaddr += (long) ((instr << 16) >> 16);
- fprintf(stderr, "faulting address: 0x%16lx\n", faultaddr);
- panic("Stack overflow");
- }
+
+/* } else { */
+/* faultaddr += (long) ((instr << 16) >> 16); */
+/* fprintf(stderr, "faulting address: 0x%08x\n", faultaddr); */
+/* panic("Stack overflow"); */
+/* } */
+}
+
+/* ArithmeticException signal handler for hardware divide by zero check */
+
+void catch_ArithmeticException(int sig)
+{
+ sigset_t nsig;
+
+ void **_p = (void **) &sig;
+ struct sigcontext *sigctx = (struct sigcontext *) ++_p;
+
+ classinfo *c;
+ java_objectheader *p;
+ methodinfo *m;
+
+ /* Reset signal handler - necessary for SysV, does no harm for BSD */
+
+ signal(sig, (void *) catch_ArithmeticException); /* reinstall handler */
+ sigemptyset(&nsig);
+ sigaddset(&nsig, sig);
+ sigprocmask(SIG_UNBLOCK, &nsig, NULL); /* unblock signal */
+
+ c = loader_load(utf_new_char("java/lang/ArithmeticException"));
+ p = builtin_new(c);
+ m = class_findmethod(c,
+ utf_new_char("<init>"),
+ utf_new_char("(Ljava/lang/String;)V"));
+
+ asm_calljavamethod(m, p, javastring_new_char("/ by zero"), NULL, NULL);
+
+ sigctx->eax = (long) p; /* REG_ITMP1_XPTR */
+ sigctx->edx = sigctx->eip; /* REG_ITMP2_XPC */
+ sigctx->eip = (long) asm_handle_exception;
+
+ return;
}
void init_exceptions(void)
if (!checknull) {
#if defined(SIGSEGV)
- signal(SIGSEGV, (void*) catch_NullPointerException);
+ signal(SIGSEGV, (void *) catch_NullPointerException);
#endif
#if defined(SIGBUS)
- signal(SIGBUS, (void*) catch_NullPointerException);
+ signal(SIGBUS, (void *) catch_NullPointerException);
#endif
- }
+ }
+
+ signal(SIGFPE, (void *) catch_ArithmeticException);
}
*******************************************************************************/
-#define MethodPointer -8
-#define FrameSize -12
-#define IsSync -16
-#define IsLeaf -20
-#define IntSave -24
-#define FltSave -28
-#define ExTableSize -32
-#define ExTableStart -32
-
-#if POINTERSIZE == 8
-# define ExEntrySize -32
-# define ExStartPC -8
-# define ExEndPC -16
-# define ExHandlerPC -24
-# define ExCatchType -32
-#else
-# define ExEntrySize -16
-# define ExStartPC -4
-# define ExEndPC -8
-# define ExHandlerPC -12
-# define ExCatchType -16
-#endif
+u1 *mcodeptr;
static void gen_mcode()
{
- int len, s1, s2, s3, d, bbs;
+ int len, s1, s2, s3, d/*, bbs*/;
s4 a;
- s4 *mcodeptr;
stackptr src;
varinfo *var;
- varinfo *dst;
+/* varinfo *dst; */
basicblock *bptr;
instruction *iptr;
+ int fpu_st_offset = 0;
+
xtable *ex;
{
int p, pa, t, l, r;
- /* TWISTI */
-/* savedregs_num = (isleafmethod) ? 0 : 1; /* space to save the RA */
+ savedregs_num = 0;
/* space to save used callee saved registers */
dseg_addtarget(ex->handler);
(void) dseg_addaddress(ex->catchtype);
- }
+ }
/* initialize mcode variables */
- mcodeptr = (s4*) mcodebase;
+ mcodeptr = (u1*) mcodebase;
mcodeend = (s4*) (mcodebase + mcodesize);
MCODECHECK(128 + mparamcount);
/* save return address and used callee saved registers */
- p = parentargs_base;
- if (!isleafmethod) {
- /* p--; M_AST (REG_RA, REG_SP, 8*p); -- do we really need this on i386 */
- }
+ p = parentargs_base;
for (r = savintregcnt - 1; r >= maxsavintreguse; r--) {
p--; i386_mov_reg_membase(savintregs[r], REG_SP, p * 8);
}
for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--) {
- p--; M_DST (savfltregs[r], REG_SP, 8 * p);
+ p--; i386_fld_reg(savfltregs[r]); i386_fstpl_membase(REG_SP, p * 8);
}
/* save monitorenter argument */
#ifdef USE_THREADS
if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
if (method->flags & ACC_STATIC) {
- p = dseg_addaddress (class);
- M_ALD(REG_ITMP1, REG_PV, p);
- M_AST(REG_ITMP1, REG_SP, 8 * maxmemuse);
+ i386_mov_imm_reg((s4) class, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, maxmemuse * 8);
} else {
i386_mov_membase_reg(REG_SP, parentargs_base * 8 + 4, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, 8 * maxmemuse);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, maxmemuse * 8);
}
}
#endif
/* copy argument registers to stack and call trace function with pointer
- to arguments on stack. ToDo: save floating point registers !!!!!!!!!
+ to arguments on stack.
*/
- if (runverbose && isleafmethod) {
- M_LDA (REG_SP, REG_SP, -(14*8));
- M_AST(REG_RA, REG_SP, 1*8);
-
- M_LST(argintregs[0], REG_SP, 2*8);
- M_LST(argintregs[1], REG_SP, 3*8);
- M_LST(argintregs[2], REG_SP, 4*8);
- M_LST(argintregs[3], REG_SP, 5*8);
- M_LST(argintregs[4], REG_SP, 6*8);
- M_LST(argintregs[5], REG_SP, 7*8);
-
- M_DST(argfltregs[0], REG_SP, 8*8);
- M_DST(argfltregs[1], REG_SP, 9*8);
- M_DST(argfltregs[2], REG_SP, 10*8);
- M_DST(argfltregs[3], REG_SP, 11*8);
- M_DST(argfltregs[4], REG_SP, 12*8);
- M_DST(argfltregs[5], REG_SP, 13*8);
-
- p = dseg_addaddress (method);
- M_ALD(REG_ITMP1, REG_PV, p);
- M_AST(REG_ITMP1, REG_SP, 0);
-/* p = dseg_addaddress ((void*) (builtin_trace_args)); */
- M_ALD(REG_PV, REG_PV, p);
- M_JSR(REG_RA, REG_PV);
- M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
- M_ALD(REG_RA, REG_SP, 1*8);
-
- M_LLD(argintregs[0], REG_SP, 2*8);
- M_LLD(argintregs[1], REG_SP, 3*8);
- M_LLD(argintregs[2], REG_SP, 4*8);
- M_LLD(argintregs[3], REG_SP, 5*8);
- M_LLD(argintregs[4], REG_SP, 6*8);
- M_LLD(argintregs[5], REG_SP, 7*8);
-
- M_DLD(argfltregs[0], REG_SP, 8*8);
- M_DLD(argfltregs[1], REG_SP, 9*8);
- M_DLD(argfltregs[2], REG_SP, 10*8);
- M_DLD(argfltregs[3], REG_SP, 11*8);
- M_DLD(argfltregs[4], REG_SP, 12*8);
- M_DLD(argfltregs[5], REG_SP, 13*8);
-
- M_LDA (REG_SP, REG_SP, 14*8);
+ if (runverbose) {
+ i386_alu_imm_reg(I386_SUB, TRACE_ARGS_NUM * 8 + 4, REG_SP);
+
+ for (p = 0; p < mparamcount; p++) {
+ t = mparamtypes[p];
+ if (IS_INT_LNG_TYPE(t)) {
+ if (IS_2_WORD_TYPE(t)) {
+ i386_mov_membase_reg(REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4 + 4, REG_ITMP2);
+
+ } else if (t == TYPE_ADR) {
+ i386_mov_membase_reg(REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1);
+ i386_alu_reg_reg(I386_XOR, REG_ITMP2, REG_ITMP2);
+
+ } else {
+ i386_mov_membase_reg(REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1);
+ i386_cltd();
+ }
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, p * 8);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, p * 8 + 4);
+
+ } else {
+ if (t == TYPE_FLT) {
+ i386_flds_membase(REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4);
+ i386_fstps_membase(REG_SP, p * 8);
+ i386_alu_reg_reg(I386_XOR, REG_ITMP2, REG_ITMP2);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, p * 8 + 4);
+
+ } else {
+ i386_fldl_membase(REG_SP, 4 + (parentargs_base + TRACE_ARGS_NUM + p) * 8 + 4);
+ i386_fstpl_membase(REG_SP, p * 8);
+ }
+ }
+ }
+
+ /* fill up the remaining arguments */
+ i386_alu_reg_reg(I386_XOR, REG_ITMP1, REG_ITMP1);
+ for (p = mparamcount; p < TRACE_ARGS_NUM; p++) {
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, p * 8);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, p * 8 + 4);
}
+ i386_mov_imm_membase((s4) method, REG_SP, TRACE_ARGS_NUM * 8);
+
+ i386_mov_imm_reg((s4) builtin_trace_args, REG_ITMP1);
+/* i386_mov_imm_reg(asm_builtin_trace, REG_ITMP1); */
+ i386_call_reg(REG_ITMP1);
+
+ i386_alu_imm_reg(I386_ADD, TRACE_ARGS_NUM * 8 + 4, REG_SP);
+ }
+
/* take arguments out of register or stack frame */
for (p = 0, l = 0; p < mparamcount; p++) {
r = var->regoff;
if (IS_INT_LNG_TYPE(t)) { /* integer args */
if (p < intreg_argnum) { /* register arguments */
+ panic("integer register argument");
if (!(var->flags & INMEMORY)) { /* reg arg -> register */
- M_INTMOVE (argintregs[p], r);
+/* M_INTMOVE (argintregs[p], r); */
+
} else { /* reg arg -> spilled */
- M_LST (argintregs[p], REG_SP, 8 * r);
+/* M_LST (argintregs[p], REG_SP, 8 * r); */
}
} else { /* stack arguments */
pa = p - intreg_argnum;
if (!(var->flags & INMEMORY)) { /* stack arg -> register */
i386_mov_membase_reg(REG_SP, (parentargs_base + pa) * 8 + 4, r); /* + 4 for return address */
} else { /* stack arg -> spilled */
- if (IS_2_WORD_TYPE(t)) {
+ if (!IS_2_WORD_TYPE(t)) {
i386_mov_membase_reg(REG_SP, (parentargs_base + pa) * 8 + 4, REG_ITMP1); /* + 4 for return address */
- i386_mov_membase_reg(REG_SP, (parentargs_base + pa) * 8 + 4 + 4, REG_ITMP2); /* + 4 for return address */
i386_mov_reg_membase(REG_ITMP1, REG_SP, r * 8);
- i386_mov_reg_membase(REG_ITMP2, REG_SP, r * 8 + 4);
} else {
i386_mov_membase_reg(REG_SP, (parentargs_base + pa) * 8 + 4, REG_ITMP1); /* + 4 for return address */
+ i386_mov_membase_reg(REG_SP, (parentargs_base + pa) * 8 + 4 + 4, REG_ITMP2); /* + 4 for return address */
i386_mov_reg_membase(REG_ITMP1, REG_SP, r * 8);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, r * 8 + 4);
}
}
}
} else { /* stack arguments */
pa = p - fltreg_argnum;
if (!(var->flags & INMEMORY)) { /* stack-arg -> register */
- panic("floats have to be in memory!");
+ if (t == TYPE_FLT) {
+ i386_flds_membase(REG_SP, (parentargs_base + pa) * 8 + 4);
+ fpu_st_offset++;
+ i386_fstp_reg(r + fpu_st_offset);
+ fpu_st_offset--;
+
+ } else {
+ i386_fldl_membase(REG_SP, (parentargs_base + pa) * 8 + 4);
+ fpu_st_offset++;
+ i386_fstp_reg(r + fpu_st_offset);
+ fpu_st_offset--;
+ }
} else { /* stack-arg -> spilled */
/* i386_mov_membase_reg(REG_SP, (parentargs_base + pa) * 8 + 4, REG_ITMP1); */
}
} /* end for */
- /* call trace function */
-
- if (runverbose && !isleafmethod) {
- M_LDA (REG_SP, REG_SP, -8);
- p = dseg_addaddress (method);
- M_ALD(REG_ITMP1, REG_PV, p);
- M_AST(REG_ITMP1, REG_SP, 0);
-/* p = dseg_addaddress ((void*) (builtin_trace_args)); */
- M_ALD(REG_PV, REG_PV, p);
- M_JSR(REG_RA, REG_PV);
- M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
- M_LDA(REG_SP, REG_SP, 8);
- }
-
/* call monitorenter function */
#ifdef USE_THREADS
if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
- i386_mov_membase_reg(REG_SP, 8 * maxmemuse, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, maxmemuse * 8, REG_ITMP1);
i386_alu_imm_reg(I386_SUB, 4, REG_SP);
i386_mov_reg_membase(REG_ITMP1, REG_SP, 0);
- i386_mov_imm_reg(builtin_monitorenter, REG_ITMP1);
- i386_call_reg(REG_ITMP1);
+ i386_mov_imm_reg((s4) builtin_monitorenter, REG_ITMP2);
+ i386_call_reg(REG_ITMP2);
i386_alu_imm_reg(I386_ADD, 4, REG_SP);
}
#endif
/* walk through all basic blocks */
for (/* bbs = block_count, */ bptr = block; /* --bbs >= 0 */ bptr != NULL; bptr = bptr->next) {
- bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
+ bptr->mpc = (int)((u1*) mcodeptr - mcodebase);
if (bptr->flags >= BBREACHED) {
/* branch resolving */
- {
branchref *brefs;
for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
brefs->branchpos, bptr->mpc);
- }
}
/* copy interface registers to their destination */
MCODECHECK(64+len);
while (src != NULL) {
len--;
- if ((len == 0) && (bptr->type != BBTYPE_STD)) {
- d = reg_of_var(src, REG_ITMP1);
- M_INTMOVE(REG_ITMP1, d);
- store_reg_to_var_int(src, d);
+ if ((len == 0) && (bptr->type != BBTYPE_STD)) {
+ if (!IS_2_WORD_TYPE(src->type)) {
+ if (bptr->type == BBTYPE_SBR) {
+ d = reg_of_var(src, REG_ITMP1);
+ i386_pop_reg(d);
+ store_reg_to_var_int(src, d);
+
+ } else if (bptr->type == BBTYPE_EXH) {
+ d = reg_of_var(src, REG_ITMP1);
+ M_INTMOVE(REG_ITMP1, d);
+ store_reg_to_var_int(src, d);
+ }
+
+ } else {
+ panic("copy interface registers: longs have to me in memory (begin 1)");
+ }
} else {
d = reg_of_var(src, REG_ITMP1);
if ((src->varkind != STACKVAR)) {
s2 = src->type;
if (IS_FLT_DBL_TYPE(s2)) {
+ s1 = interfaces[len][s2].regoff;
if (!(interfaces[len][s2].flags & INMEMORY)) {
- s1 = interfaces[len][s2].regoff;
M_FLTMOVE(s1, d);
} else {
- M_DLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
+ if (s2 == TYPE_FLT) {
+ i386_flds_membase(REG_SP, s1 * 8);
+
+ } else {
+ i386_fldl_membase(REG_SP, s1 * 8);
+ }
}
store_reg_to_var_flt(src, d);
} else {
- if (!(interfaces[len][s2].flags & INMEMORY)) {
- s1 = interfaces[len][s2].regoff;
- M_INTMOVE(s1, d);
+ s1 = interfaces[len][s2].regoff;
+ if (!IS_2_WORD_TYPE(interfaces[len][s2].type)) {
+ if (!(interfaces[len][s2].flags & INMEMORY)) {
+ M_INTMOVE(s1, d);
+
+ } else {
+ i386_mov_membase_reg(REG_SP, s1 * 8, d);
+ }
+ store_reg_to_var_int(src, d);
} else {
- i386_mov_membase_reg(REG_SP, interfaces[len][s2].regoff * 8, d);
+ if (interfaces[len][s2].flags & INMEMORY) {
+ M_LNGMEMMOVE(s1, src->regoff);
+
+ } else {
+ panic("copy interface registers: longs have to be in memory (begin 2)");
+ }
}
- store_reg_to_var_int(src, d);
}
}
}
i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
} else {
- /* TODO: optimize: test reg,reg */
- i386_alu_imm_reg(I386_CMP, 0, src->regoff);
+ i386_test_reg_reg(src->regoff, src->regoff);
}
i386_jcc(I386_CC_E, 0);
mcode_addxnullrefs(mcodeptr);
d = reg_of_var(iptr->dst, REG_ITMP1);
if (iptr->dst->flags & INMEMORY) {
i386_mov_imm_membase(iptr->val.i, REG_SP, iptr->dst->regoff * 8);
- i386_mov_imm_membase(0, REG_SP, iptr->dst->regoff * 8 + 4);
} else {
- i386_mov_imm_reg(iptr->val.i, d);
+ if (iptr->val.i == 0) {
+ i386_alu_reg_reg(I386_XOR, d, d);
+
+ } else {
+ i386_mov_imm_reg(iptr->val.i, d);
+ }
}
break;
i386_mov_imm_membase(iptr->val.l >> 32, REG_SP, iptr->dst->regoff * 8 + 4);
} else {
- panic("longs have to be in memory");
+ panic("LCONST: longs have to be in memory");
}
break;
/* op1 = 0, val.f = constant */
d = reg_of_var(iptr->dst, REG_FTMP1);
- if (iptr->val.f == 0) {
+ if (iptr->val.f == 0.0) {
i386_fldz();
+ fpu_st_offset++;
+
+ /* -0.0 */
+ if (iptr->val.i == 0x80000000) {
+ i386_fchs();
+ }
- } else if (iptr->val.f == 1) {
+ } else if (iptr->val.f == 1.0) {
i386_fld1();
+ fpu_st_offset++;
-/* } else if (iptr->val.f == 2) { */
-/* i386_fld1(); */
-/* i386_fld1(); */
-/* i386_faddp(); */
+ } else if (iptr->val.f == 2.0) {
+ i386_fld1();
+ i386_fld1();
+ i386_faddp();
+ fpu_st_offset++;
} else {
- a = dseg_addfloat(iptr->val.f);
+ a = dseg_addfloat(iptr->val.f);
i386_mov_imm_reg(0, REG_ITMP1);
dseg_adddata(mcodeptr);
i386_flds_membase(REG_ITMP1, a);
+ fpu_st_offset++;
}
store_reg_to_var_flt(iptr->dst, d);
break;
/* op1 = 0, val.d = constant */
d = reg_of_var(iptr->dst, REG_FTMP1);
- if (iptr->val.d == 0) {
+ if (iptr->val.d == 0.0) {
i386_fldz();
+ fpu_st_offset++;
+
+ /* -0.0 */
+ if (iptr->val.l == 0x8000000000000000LL) {
+ i386_fchs();
+ }
+
+ } else if (iptr->val.d == 1.0) {
+ i386_fld1();
+ fpu_st_offset++;
- } else if (iptr->val.d == 1) {
+ } else if (iptr->val.d == 2.0) {
+ i386_fld1();
i386_fld1();
+ i386_faddp();
+ fpu_st_offset++;
} else {
a = dseg_adddouble(iptr->val.d);
i386_mov_imm_reg(0, REG_ITMP1);
dseg_adddata(mcodeptr);
i386_fldl_membase(REG_ITMP1, a);
+ fpu_st_offset++;
}
store_reg_to_var_flt(iptr->dst, d);
break;
d = reg_of_var(iptr->dst, REG_ITMP1);
if (iptr->dst->flags & INMEMORY) {
- i386_mov_imm_membase(iptr->val.a, REG_SP, iptr->dst->regoff * 8);
- i386_mov_imm_membase(0, REG_SP, iptr->dst->regoff * 8 + 4);
+ i386_mov_imm_membase((s4) iptr->val.a, REG_SP, iptr->dst->regoff * 8);
} else {
+ if ((s4) iptr->val.a == 0) {
+ i386_alu_reg_reg(I386_XOR, d, d);
- i386_mov_imm_reg(iptr->val.a, iptr->dst->regoff);
+ } else {
+ i386_mov_imm_reg((s4) iptr->val.a, d);
+ }
}
break;
/* load/store operations **********************************************/
case ICMD_ILOAD: /* ... ==> ..., content of local variable */
- /* op1 = local variable */
-
- d = reg_of_var(iptr->dst, REG_ITMP1);
- if ((iptr->dst->varkind == LOCALVAR) &&
- (iptr->dst->varnum == iptr->op1)) {
- break;
- }
- var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
- if (iptr->dst->flags & INMEMORY) {
- if (var->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, var->regoff * 8, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- i386_mov_reg_membase(var->regoff, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else {
- if (var->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, var->regoff * 8, iptr->dst->regoff);
-
- } else {
- M_INTMOVE(var->regoff, iptr->dst->regoff);
- }
- }
- break;
-
- case ICMD_ALOAD: /* ... ==> ..., content of local variable */
- /* op1 = local variable */
+ case ICMD_ALOAD: /* op1 = local variable */
d = reg_of_var(iptr->dst, REG_ITMP1);
if ((iptr->dst->varkind == LOCALVAR) &&
var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
if (iptr->dst->flags & INMEMORY) {
if (var->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, var->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, var->regoff * 8 + 4, REG_ITMP2);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
+ M_LNGMEMMOVE(var->regoff, iptr->dst->regoff);
} else {
- i386_mov_reg_membase(var->regoff, REG_SP, iptr->dst->regoff * 8);
+ panic("LLOAD: longs have to be in memory");
}
} else {
- panic("longs have to be in memory");
+ panic("LLOAD: longs have to be in memory");
}
break;
/* op1 = local variable */
d = reg_of_var(iptr->dst, REG_FTMP1);
-/* if ((iptr->dst->varkind == LOCALVAR) && */
-/* (iptr->dst->varnum == iptr->op1)) { */
-/* break; */
-/* } */
+ if ((iptr->dst->varkind == LOCALVAR) &&
+ (iptr->dst->varnum == iptr->op1)) {
+ break;
+ }
var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
- i386_flds_membase(REG_SP, var->regoff * 8);
- store_reg_to_var_flt(iptr->dst, d);
+ if (var->flags & INMEMORY) {
+ i386_flds_membase(REG_SP, var->regoff * 8);
+ fpu_st_offset++;
+ } else {
+ i386_fld_reg(var->regoff + fpu_st_offset);
+ fpu_st_offset++;
+ }
+ store_reg_to_var_flt(iptr->dst, d);
break;
case ICMD_DLOAD: /* ... ==> ..., content of local variable */
/* op1 = local variable */
d = reg_of_var(iptr->dst, REG_FTMP1);
-/* if ((iptr->dst->varkind == LOCALVAR) && */
-/* (iptr->dst->varnum == iptr->op1)) { */
-/* break; */
-/* } */
+ if ((iptr->dst->varkind == LOCALVAR) &&
+ (iptr->dst->varnum == iptr->op1)) {
+ break;
+ }
var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
- i386_fldl_membase(REG_SP, var->regoff * 8);
- store_reg_to_var_flt(iptr->dst, d);
+ if (var->flags & INMEMORY) {
+ i386_fldl_membase(REG_SP, var->regoff * 8);
+ fpu_st_offset++;
+ } else {
+ i386_fld_reg(var->regoff + fpu_st_offset);
+ fpu_st_offset++;
+ }
+ store_reg_to_var_flt(iptr->dst, d);
break;
case ICMD_ISTORE: /* ..., value ==> ... */
- /* op1 = local variable */
+ case ICMD_ASTORE: /* op1 = local variable */
if ((src->varkind == LOCALVAR) &&
(src->varnum == iptr->op1)) {
}
break;
- case ICMD_ASTORE: /* ..., value ==> ... */
+ case ICMD_LSTORE: /* ..., value ==> ... */
/* op1 = local variable */
if ((src->varkind == LOCALVAR) &&
var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
if (var->flags & INMEMORY) {
if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, var->regoff * 8);
-
+ M_LNGMEMMOVE(src->regoff, var->regoff);
+
} else {
- i386_mov_reg_membase(src->regoff, REG_SP, var->regoff * 8);
+ panic("LSTORE: longs have to be in memory");
}
} else {
- var_to_reg_int(s1, src, var->regoff);
- M_INTMOVE(s1, var->regoff);
+ panic("LSTORE: longs have to be in memory");
}
break;
- case ICMD_LSTORE: /* ..., value ==> ... */
+ case ICMD_FSTORE: /* ..., value ==> ... */
/* op1 = local variable */
if ((src->varkind == LOCALVAR) &&
break;
}
var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
- panic("LSTORE");
-/* if (var->flags & INMEMORY) { */
-/* var_to_reg_int(s1, src, REG_ITMP1); */
-/* i386_mov_reg_membase(s1, REG_SP, var->regoff * 8); */
-
-/* } else { */
-/* var_to_reg_int(s1, src, var->regoff); */
-/* M_INTMOVE(s1, var->regoff); */
-/* } */
- break;
-
- case ICMD_FSTORE: /* ..., value ==> ... */
- /* op1 = local variable */
-
- var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
- i386_fstps_membase(REG_SP, var->regoff * 8);
+ if (var->flags & INMEMORY) {
+ var_to_reg_flt(s1, src, REG_FTMP1);
+ i386_fstps_membase(REG_SP, var->regoff * 8);
+ fpu_st_offset--;
+ } else {
+ var_to_reg_flt(s1, src, var->regoff);
+/* M_FLTMOVE(s1, var->regoff); */
+ i386_fstp_reg(var->regoff + fpu_st_offset);
+ fpu_st_offset--;
+ }
break;
case ICMD_DSTORE: /* ..., value ==> ... */
/* op1 = local variable */
+ if ((src->varkind == LOCALVAR) &&
+ (src->varnum == iptr->op1)) {
+ break;
+ }
var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
- i386_fstpl_membase(REG_SP, var->regoff * 8);
+ if (var->flags & INMEMORY) {
+ var_to_reg_flt(s1, src, REG_FTMP1);
+ i386_fstpl_membase(REG_SP, var->regoff * 8);
+ fpu_st_offset--;
+ } else {
+ var_to_reg_flt(s1, src, var->regoff);
+/* M_FLTMOVE(s1, var->regoff); */
+ i386_fstp_reg(var->regoff + fpu_st_offset);
+ fpu_st_offset--;
+ }
break;
case ICMD_POP2: /* ..., value, value ==> ... */
break;
- /* TWISTI */
-/* #define M_COPY(from,to) \ */
-/* d = reg_of_var(to, REG_IFTMP); \ */
-/* if ((from->regoff != to->regoff) || \ */
-/* ((from->flags ^ to->flags) & INMEMORY)) { \ */
-/* if (IS_FLT_DBL_TYPE(from->type)) { \ */
-/* var_to_reg_flt(s1, from, d); \ */
-/* M_FLTMOVE(s1,d); \ */
-/* store_reg_to_var_flt(to, d); \ */
-/* }\ */
-/* else { \ */
-/* var_to_reg_int(s1, from, d); \ */
-/* M_INTMOVE(s1,d); \ */
-/* store_reg_to_var_int(to, d); \ */
-/* }\ */
-/* } */
#define M_COPY(from,to) \
+ d = reg_of_var(to, REG_ITMP1); \
if ((from->regoff != to->regoff) || \
((from->flags ^ to->flags) & INMEMORY)) { \
if (IS_FLT_DBL_TYPE(from->type)) { \
- d = reg_of_var(to, REG_IFTMP); \
var_to_reg_flt(s1, from, d); \
- M_FLTMOVE(s1, d); \
+/* M_FLTMOVE(s1, d);*/ \
store_reg_to_var_flt(to, d); \
} else { \
- d = reg_of_var(to, REG_ITMP1); \
- var_to_reg_int(s1, from, d); \
- M_INTMOVE(s1, d); \
- store_reg_to_var_int(to, s1); \
- }\
+ if (!IS_2_WORD_TYPE(from->type)) { \
+ if (to->flags & INMEMORY) { \
+ if (from->flags & INMEMORY) { \
+ i386_mov_membase_reg(REG_SP, from->regoff * 8, REG_ITMP1); \
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, to->regoff * 8); \
+ } else { \
+ i386_mov_reg_membase(from->regoff, REG_SP, to->regoff * 8); \
+ } \
+ } else { \
+ if (from->flags & INMEMORY) { \
+ i386_mov_membase_reg(REG_SP, from->regoff * 8, to->regoff); \
+ } else { \
+ i386_mov_reg_reg(from->regoff, to->regoff); \
+ } \
+ } \
+ } else { \
+ M_LNGMEMMOVE(from->regoff, to->regoff); \
+ } \
+ } \
}
case ICMD_DUP: /* ..., a ==> ..., a, a */
case ICMD_INEG: /* ..., value ==> ..., - value */
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if (src->flags & INMEMORY) {
if (src->regoff == iptr->dst->regoff) {
case ICMD_LNEG: /* ..., value ==> ..., - value */
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if (src->flags & INMEMORY) {
if (src->regoff == iptr->dst->regoff) {
case ICMD_I2L: /* ..., value ==> ..., value */
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if (src->flags & INMEMORY) {
i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_EAX);
case ICMD_L2I: /* ..., value ==> ..., value */
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if (src->flags & INMEMORY) {
i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
case ICMD_INT2BYTE: /* ..., value ==> ..., value */
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if (src->flags & INMEMORY) {
i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
case ICMD_INT2CHAR: /* ..., value ==> ..., value */
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_imm_reg(I386_AND, 0x0000ffff, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ if (src->regoff == iptr->dst->regoff) {
+ i386_alu_imm_membase(I386_AND, 0x0000ffff, REG_SP, iptr->dst->regoff * 8);
+
+ } else {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_alu_imm_reg(I386_AND, 0x0000ffff, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ }
} else {
i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8);
case ICMD_INT2SHORT: /* ..., value ==> ..., value */
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if (src->flags & INMEMORY) {
i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
case ICMD_IADD: /* ..., val1, val2 ==> ..., val1 + val2 */
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ialu(I386_ADD, src, iptr);
+ break;
+
+ case ICMD_IADDCONST: /* ..., value ==> ..., value + constant */
+ /* val.i = constant */
+
+ d = reg_of_var(iptr->dst, REG_NULL);
+ /* should we use a inc optimization for smaller code size? */
+ i386_emit_ialuconst(I386_ADD, src, iptr);
+ break;
+
+ case ICMD_LADD: /* ..., val1, val2 ==> ..., val1 + val2 */
+
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
if (src->regoff == iptr->dst->regoff) {
i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
i386_alu_reg_membase(I386_ADD, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_alu_reg_membase(I386_ADC, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
} else if (src->prev->regoff == iptr->dst->regoff) {
i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
i386_alu_reg_membase(I386_ADD, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_alu_reg_membase(I386_ADC, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
} else {
i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_alu_membase_reg(I386_ADD, REG_SP, src->regoff * 8, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- if (src->regoff == iptr->dst->regoff) {
- i386_alu_reg_membase(I386_ADD, src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_reg_reg(I386_ADD, src->prev->regoff, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->prev->regoff == iptr->dst->regoff) {
- i386_alu_reg_membase(I386_ADD, src->regoff, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_alu_reg_reg(I386_ADD, src->regoff, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else {
- i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_alu_reg_membase(I386_ADD, src->regoff, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
- i386_alu_membase_reg(I386_ADD, REG_SP, src->regoff * 8, iptr->dst->regoff);
-
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_alu_membase_reg(I386_ADD, REG_SP, src->regoff * 8, iptr->dst->regoff);
-
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- i386_alu_membase_reg(I386_ADD, REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
-
- } else {
- if (src->regoff == iptr->dst->regoff) {
- i386_alu_reg_reg(I386_ADD, src->prev->regoff, iptr->dst->regoff);
-
- } else {
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_alu_reg_reg(I386_ADD, src->regoff, iptr->dst->regoff);
- }
- }
- }
- break;
-
- case ICMD_IADDCONST: /* ..., value ==> ..., value + constant */
- /* val.i = constant */
-
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (iptr->dst->flags & INMEMORY) {
- if (src->flags & INMEMORY) {
- /*
- * do not use here inc optimization, because it's slower (???)
- */
- if (src->regoff == iptr->dst->regoff) {
- i386_alu_imm_membase(I386_ADD, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_imm_reg(I386_ADD, iptr->val.i, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else {
- i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_alu_imm_membase(I386_ADD, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else {
- if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff);
-
- if (iptr->val.i == 1) {
- i386_inc_reg(iptr->dst->regoff);
-
- } else {
- i386_alu_imm_reg(I386_ADD, iptr->val.i, iptr->dst->regoff);
- }
-
- } else {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
-
- if (iptr->val.i == 1) {
- i386_inc_reg(iptr->dst->regoff);
-
- } else {
- i386_alu_imm_reg(I386_ADD, iptr->val.i, iptr->dst->regoff);
- }
- }
- }
- break;
-
- case ICMD_LADD: /* ..., val1, val2 ==> ..., val1 + val2 */
-
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
- i386_alu_reg_membase(I386_ADD, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_alu_reg_membase(I386_ADC, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
-
- } else if (src->prev->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
- i386_alu_reg_membase(I386_ADD, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_alu_reg_membase(I386_ADC, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
-
- } else {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
i386_alu_membase_reg(I386_ADD, REG_SP, src->regoff * 8, REG_ITMP1);
i386_alu_membase_reg(I386_ADC, REG_SP, src->regoff * 8 + 4, REG_ITMP2);
i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
case ICMD_LADDCONST: /* ..., value ==> ..., value + constant */
/* val.l = constant */
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if (src->flags & INMEMORY) {
if (src->regoff == iptr->dst->regoff) {
case ICMD_ISUB: /* ..., val1, val2 ==> ..., val1 - val2 */
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
if (src->prev->regoff == iptr->dst->regoff) {
}
} else {
- i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_alu_reg_membase(I386_SUB, src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
+ i386_alu_reg_membase(I386_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8);
}
} else {
if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
- i386_alu_membase_reg(I386_SUB, REG_SP, src->regoff * 8, iptr->dst->regoff);
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, d);
+ i386_alu_membase_reg(I386_SUB, REG_SP, src->regoff * 8, d);
} else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_alu_membase_reg(I386_SUB, REG_SP, src->regoff * 8, iptr->dst->regoff);
+ M_INTMOVE(src->prev->regoff, d);
+ i386_alu_membase_reg(I386_SUB, REG_SP, src->regoff * 8, d);
} else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
- i386_alu_reg_reg(I386_SUB, src->regoff, iptr->dst->regoff);
-
- } else {
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_alu_reg_reg(I386_SUB, src->regoff, iptr->dst->regoff);
- }
- }
- break;
-
- case ICMD_ISUBCONST: /* ..., value ==> ..., value + constant */
- /* val.i = constant */
-
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (iptr->dst->flags & INMEMORY) {
- if (src->flags & INMEMORY) {
+ /* workaround for reg alloc */
if (src->regoff == iptr->dst->regoff) {
- i386_alu_imm_membase(I386_SUB, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_alu_reg_reg(I386_SUB, src->regoff, REG_ITMP1);
+ M_INTMOVE(REG_ITMP1, d);
} else {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_imm_reg(I386_SUB, iptr->val.i, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, d);
+ i386_alu_reg_reg(I386_SUB, src->regoff, d);
}
} else {
- i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_alu_imm_membase(I386_SUB, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else {
- if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff);
- i386_alu_imm_reg(I386_SUB, iptr->val.i, iptr->dst->regoff);
+ /* workaround for reg alloc */
+ if (src->regoff == iptr->dst->regoff) {
+ M_INTMOVE(src->prev->regoff, REG_ITMP1);
+ i386_alu_reg_reg(I386_SUB, src->regoff, REG_ITMP1);
+ M_INTMOVE(REG_ITMP1, d);
- } else {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- i386_alu_imm_reg(I386_SUB, iptr->val.i, iptr->dst->regoff);
+ } else {
+ M_INTMOVE(src->prev->regoff, d);
+ i386_alu_reg_reg(I386_SUB, src->regoff, d);
+ }
}
}
break;
+ case ICMD_ISUBCONST: /* ..., value ==> ..., value + constant */
+ /* val.i = constant */
+
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ialuconst(I386_SUB, src, iptr);
+ break;
+
case ICMD_LSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
if (src->prev->regoff == iptr->dst->regoff) {
case ICMD_LSUBCONST: /* ..., value ==> ..., value - constant */
/* val.l = constant */
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if (src->flags & INMEMORY) {
if (src->regoff == iptr->dst->regoff) {
case ICMD_IMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
case ICMD_IMULCONST: /* ..., value ==> ..., value * constant */
/* val.i = constant */
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if (src->flags & INMEMORY) {
i386_imul_imm_membase_reg(iptr->val.i, REG_SP, src->regoff * 8, REG_ITMP1);
case ICMD_LMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
- d = reg_of_var(iptr->dst, REG_ITMP1);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_EAX); /* mem -> EAX */
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, I386_EAX); /* mem -> EAX */
/* optimize move EAX -> REG_ITMP3 is slower??? */
/* i386_mov_reg_reg(I386_EAX, REG_ITMP3); */
- i386_mul_membase(REG_SP, src->prev->regoff * 8); /* mem * EAX -> EDX:EAX */
+ i386_mul_membase(REG_SP, src->regoff * 8); /* mem * EAX -> EDX:EAX */
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP3); /* mem -> ITMP3 */
- i386_imul_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP3); /* mem * ITMP3 -> ITMP3 */
+ /* TODO: optimize move EAX -> REG_ITMP3 */
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP3); /* mem -> ITMP3 */
+ i386_imul_membase_reg(REG_SP, src->regoff * 8, REG_ITMP3); /* mem * ITMP3 -> ITMP3 */
i386_alu_reg_reg(I386_ADD, REG_ITMP3, I386_EDX); /* ITMP3 + EDX -> EDX */
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP3); /* mem -> ITMP3 */
- i386_imul_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP3); /* mem * ITMP3 -> ITMP3 */
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP3); /* mem -> ITMP3 */
+ i386_imul_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP3); /* mem * ITMP3 -> ITMP3 */
i386_alu_reg_reg(I386_ADD, REG_ITMP3, I386_EDX); /* ITMP3 + EDX -> EDX */
i386_mov_reg_membase(I386_EAX, REG_SP, iptr->dst->regoff * 8);
case ICMD_LMULCONST: /* ..., value ==> ..., value * constant */
/* val.l = constant */
- d = reg_of_var(iptr->dst, REG_ITMP1);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
if (src->flags & INMEMORY) {
i386_mov_imm_reg(iptr->val.l, I386_EAX); /* imm -> EAX */
i386_mul_membase(REG_SP, src->regoff * 8); /* mem * EAX -> EDX:EAX */
/* TODO: optimize move EAX -> REG_ITMP3 */
- i386_mov_imm_reg(iptr->val.l, REG_ITMP3); /* imm -> ITMP3 */
- i386_imul_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP3); /* mem * ITMP3 -> ITMP3 */
+ i386_mov_imm_reg(iptr->val.l >> 32, REG_ITMP3); /* imm -> ITMP3 */
+ i386_imul_membase_reg(REG_SP, src->regoff * 8, REG_ITMP3); /* mem * ITMP3 -> ITMP3 */
i386_alu_reg_reg(I386_ADD, REG_ITMP3, I386_EDX); /* ITMP3 + EDX -> EDX */
- i386_mov_imm_reg(iptr->val.l >> 32, REG_ITMP3); /* imm -> ITMP3 */
+ i386_mov_imm_reg(iptr->val.l, REG_ITMP3); /* imm -> ITMP3 */
i386_imul_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP3); /* mem * ITMP3 -> ITMP3 */
i386_alu_reg_reg(I386_ADD, REG_ITMP3, I386_EDX); /* ITMP3 + EDX -> EDX */
}
break;
+#define gen_div_check(v) \
+ if (checknull) { \
+ if ((v)->flags & INMEMORY) { \
+ i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8); \
+ } else { \
+ i386_test_reg_reg(src->regoff, src->regoff); \
+ } \
+ i386_jcc(I386_CC_E, 0); \
+ mcode_addxdivrefs(mcodeptr); \
+ }
+
case ICMD_IDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (src->prev->flags & INMEMORY) {
+ d = reg_of_var(iptr->dst, REG_NULL);
+ var_to_reg_int(s1, src, REG_ITMP3);
+ gen_div_check(src);
+ if (src->prev->flags & INMEMORY) {
i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, I386_EAX);
} else {
M_INTMOVE(src->prev->regoff, I386_EAX);
}
- i386_cltd();
-
- if (src->flags & INMEMORY) {
- i386_idiv_membase(REG_SP, src->regoff * 8);
+ i386_alu_imm_reg(I386_CMP, 0x80000000, I386_EAX); /* check as described in jvm spec */
+ i386_jcc(I386_CC_NE, 3 + 6);
+ i386_alu_imm_reg(I386_CMP, -1, s1);
+ i386_jcc(I386_CC_E, 1 + 2);
- } else {
- i386_idiv_reg(src->regoff);
- }
+ i386_cltd();
+ i386_idiv_reg(s1);
if (iptr->dst->flags & INMEMORY) {
i386_mov_reg_membase(I386_EAX, REG_SP, iptr->dst->regoff * 8);
case ICMD_IREM: /* ..., val1, val2 ==> ..., val1 % val2 */
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
+ var_to_reg_int(s1, src, REG_ITMP3);
+ gen_div_check(src);
if (src->prev->flags & INMEMORY) {
i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, I386_EAX);
M_INTMOVE(src->prev->regoff, I386_EAX);
}
- i386_cltd();
-
- if (src->flags & INMEMORY) {
- i386_idiv_membase(REG_SP, src->regoff * 8);
+ i386_alu_imm_reg(I386_CMP, 0x80000000, I386_EAX); /* check as described in jvm spec */
+ i386_jcc(I386_CC_NE, 2 + 3 + 6);
+ i386_alu_reg_reg(I386_XOR, I386_EDX, I386_EDX);
+ i386_alu_imm_reg(I386_CMP, -1, s1);
+ i386_jcc(I386_CC_E, 1 + 2);
- } else {
- i386_idiv_reg(src->regoff);
- }
+ i386_cltd();
+ i386_idiv_reg(s1);
if (iptr->dst->flags & INMEMORY) {
i386_mov_reg_membase(I386_EDX, REG_SP, iptr->dst->regoff * 8);
case ICMD_IDIVPOW2: /* ..., value ==> ..., value >> constant */
/* val.i = constant */
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (iptr->dst->flags & INMEMORY) {
- if (src->flags & INMEMORY) {
- if (src->regoff == iptr->dst->regoff) {
- i386_shift_imm_membase(I386_SAR, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
+ /* TODO: optimize for `/ 2' */
+ var_to_reg_int(s1, src, REG_ITMP1);
+ d = reg_of_var(iptr->dst, REG_ITMP1);
- } else {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_shift_imm_reg(I386_SAR, iptr->val.i, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ M_INTMOVE(s1, d);
+ i386_test_reg_reg(d, d);
+ a = 2;
+ CALCIMMEDIATEBYTES(a, (1 << iptr->val.i) - 1);
+ i386_jcc(I386_CC_NS, a);
+ i386_alu_imm_reg(I386_ADD, (1 << iptr->val.i) - 1, d);
+
+ i386_shift_imm_reg(I386_SAR, iptr->val.i, d);
+ store_reg_to_var_int(iptr->dst, d);
+ break;
- } else {
- i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_shift_imm_membase(I386_SAR, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
- }
+ case ICMD_LDIVPOW2: /* ..., value ==> ..., value >> constant */
+ /* val.i = constant */
- } else {
+ d = reg_of_var(iptr->dst, REG_NULL);
+ if (iptr->dst->flags & INMEMORY) {
if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff);
- i386_shift_imm_reg(I386_SAR, iptr->val.i, iptr->dst->regoff);
+ a = 2;
+ CALCIMMEDIATEBYTES(a, (1 << iptr->val.i) - 1);
+ a += 3;
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
- } else {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- i386_shift_imm_reg(I386_SAR, iptr->val.i, iptr->dst->regoff);
+ i386_test_reg_reg(REG_ITMP2, REG_ITMP2);
+ i386_jcc(I386_CC_NS, a);
+ i386_alu_imm_reg(I386_ADD, (1 << iptr->val.i) - 1, REG_ITMP1);
+ i386_alu_imm_reg(I386_ADC, 0, REG_ITMP2);
+ i386_shrd_imm_reg_reg(iptr->val.i, REG_ITMP2, REG_ITMP1);
+ i386_shift_imm_reg(I386_SAR, iptr->val.i, REG_ITMP2);
+
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
}
}
break;
- case ICMD_LDIVPOW2: /* ..., value ==> ..., value >> constant */
+ case ICMD_IREMPOW2: /* ..., value ==> ..., value % constant */
/* val.i = constant */
var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (iptr->val.i <= 15) {
- M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
- M_CMOVGE(s1, s1, REG_ITMP2);
- }
- else {
- M_SRA_IMM(s1, 63, REG_ITMP2);
- M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
- M_LADD(s1, REG_ITMP2, REG_ITMP2);
- }
- M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
+ d = reg_of_var(iptr->dst, REG_ITMP2);
+ if (s1 == d) {
+ M_INTMOVE(s1, REG_ITMP1);
+ s1 = REG_ITMP1;
+ }
+
+ a = 2;
+ a += 2;
+ a += 2;
+ CALCIMMEDIATEBYTES(a, iptr->val.i);
+ a += 2;
+
+ /* TODO: optimize */
+ M_INTMOVE(s1, d);
+ i386_alu_imm_reg(I386_AND, iptr->val.i, d);
+ i386_test_reg_reg(s1, s1);
+ i386_jcc(I386_CC_GE, a);
+ i386_mov_reg_reg(s1, d);
+ i386_neg_reg(d);
+ i386_alu_imm_reg(I386_AND, iptr->val.i, d);
+ i386_neg_reg(d);
+
+/* M_INTMOVE(s1, I386_EAX); */
+/* i386_cltd(); */
+/* i386_alu_reg_reg(I386_XOR, I386_EDX, I386_EAX); */
+/* i386_alu_reg_reg(I386_SUB, I386_EDX, I386_EAX); */
+/* i386_alu_reg_reg(I386_AND, iptr->val.i, I386_EAX); */
+/* i386_alu_reg_reg(I386_XOR, I386_EDX, I386_EAX); */
+/* i386_alu_reg_reg(I386_SUB, I386_EDX, I386_EAX); */
+/* M_INTMOVE(I386_EAX, d); */
+
+/* i386_alu_reg_reg(I386_XOR, d, d); */
+/* i386_mov_imm_reg(iptr->val.i, I386_ECX); */
+/* i386_shrd_reg_reg(s1, d); */
+/* i386_shift_imm_reg(I386_SHR, 32 - iptr->val.i, d); */
+
store_reg_to_var_int(iptr->dst, d);
break;
- case ICMD_ISHL: /* ..., val1, val2 ==> ..., val1 << val2 */
+ case ICMD_LREMPOW2: /* ..., value ==> ..., value % constant */
+ /* val.l = constant */
- d = reg_of_var(iptr->dst, REG_ITMP2);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->prev->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_shift_membase(I386_SHL, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_shift_reg(I386_SHL, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ if (src->flags & INMEMORY) {
+ /* Intel algorithm -- does not work, because constant is wrong */
+/* i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1); */
+/* i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP3); */
+
+/* M_INTMOVE(REG_ITMP1, REG_ITMP2); */
+/* i386_test_reg_reg(REG_ITMP3, REG_ITMP3); */
+/* i386_jcc(I386_CC_NS, offset); */
+/* i386_alu_imm_reg(I386_ADD, (1 << iptr->val.l) - 1, REG_ITMP2); */
+/* i386_alu_imm_reg(I386_ADC, 0, REG_ITMP3); */
+
+/* i386_shrd_imm_reg_reg(iptr->val.l, REG_ITMP3, REG_ITMP2); */
+/* i386_shift_imm_reg(I386_SAR, iptr->val.l, REG_ITMP3); */
+/* i386_shld_imm_reg_reg(iptr->val.l, REG_ITMP2, REG_ITMP3); */
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_shift_membase(I386_SHL, REG_SP, iptr->dst->regoff * 8);
+/* i386_shift_imm_reg(I386_SHL, iptr->val.l, REG_ITMP2); */
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->prev->regoff == iptr->dst->regoff) {
- M_INTMOVE(src->regoff, I386_ECX);
- i386_shift_membase(I386_SHL, REG_SP, iptr->dst->regoff * 8);
+/* i386_alu_reg_reg(I386_SUB, REG_ITMP2, REG_ITMP1); */
+/* i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2); */
+/* i386_alu_reg_reg(I386_SBB, REG_ITMP3, REG_ITMP2); */
- } else {
- M_INTMOVE(src->regoff, I386_ECX);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_shift_reg(I386_SHL, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+/* i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); */
+/* i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); */
- } else {
- M_INTMOVE(src->regoff, I386_ECX);
- i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_shift_membase(I386_SHL, REG_SP, iptr->dst->regoff * 8);
- }
+ /* Alpha algorithm */
+ a = 3;
+ CALCOFFSETBYTES(a, src->regoff * 8);
+ a += 3;
+ CALCOFFSETBYTES(a, src->regoff * 8 + 4);
- } else {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
- i386_shift_reg(I386_SHL, iptr->dst->regoff);
+ a += 2;
+ a += 3;
+ a += 2;
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_shift_reg(I386_SHL, iptr->dst->regoff);
+ /* TODO: hmm, don't know if this is always correct */
+ a += 2;
+ CALCIMMEDIATEBYTES(a, iptr->val.l & 0x00000000ffffffff);
+ a += 2;
+ CALCIMMEDIATEBYTES(a, iptr->val.l >> 32);
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->regoff, I386_ECX);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
- i386_shift_reg(I386_SHL, iptr->dst->regoff);
+ a += 2;
+ a += 3;
+ a += 2;
- } else {
- M_INTMOVE(src->regoff, I386_ECX);
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_shift_reg(I386_SHL, iptr->dst->regoff);
- }
- }
- break;
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
+
+ i386_alu_imm_reg(I386_AND, iptr->val.l, REG_ITMP1);
+ i386_alu_imm_reg(I386_AND, iptr->val.l >> 32, REG_ITMP2);
+ i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8 + 4);
+ i386_jcc(I386_CC_GE, a);
- case ICMD_ISHLCONST: /* ..., value ==> ..., value << constant */
- /* val.i = constant */
-
- d = reg_of_var(iptr->dst, REG_ITMP1);
- if ((src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) {
- if (src->regoff == iptr->dst->regoff) {
- i386_shift_imm_membase(I386_SHL, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
-
- } else {
i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_shift_imm_reg(I386_SHL, iptr->val.i, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
+
+ i386_neg_reg(REG_ITMP1);
+ i386_alu_imm_reg(I386_ADC, 0, REG_ITMP2);
+ i386_neg_reg(REG_ITMP2);
+
+ i386_alu_imm_reg(I386_AND, iptr->val.l, REG_ITMP1);
+ i386_alu_imm_reg(I386_AND, iptr->val.l >> 32, REG_ITMP2);
+
+ i386_neg_reg(REG_ITMP1);
+ i386_alu_imm_reg(I386_ADC, 0, REG_ITMP2);
+ i386_neg_reg(REG_ITMP2);
+
i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
}
-
- } else if ((src->flags & INMEMORY) && !(iptr->dst->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff);
- i386_shift_imm_reg(I386_SHL, iptr->val.i, iptr->dst->regoff);
-
- } else if (!(src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) {
- i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_shift_imm_membase(I386_SHL, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- i386_shift_imm_reg(I386_SHL, iptr->val.i, iptr->dst->regoff);
}
break;
- case ICMD_ISHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
-
- d = reg_of_var(iptr->dst, REG_ITMP2);
- if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->prev->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_shift_membase(I386_SAR, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_shift_reg(I386_SAR, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_shift_membase(I386_SAR, REG_SP, iptr->dst->regoff * 8);
-
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->prev->regoff == iptr->dst->regoff) {
- M_INTMOVE(src->regoff, I386_ECX);
- i386_shift_membase(I386_SAR, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- M_INTMOVE(src->regoff, I386_ECX);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_shift_reg(I386_SAR, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ case ICMD_ISHL: /* ..., val1, val2 ==> ..., val1 << val2 */
- } else {
- M_INTMOVE(src->regoff, I386_ECX);
- i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_shift_membase(I386_SAR, REG_SP, iptr->dst->regoff * 8);
- }
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ishift(I386_SHL, src, iptr);
+ break;
- } else {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
- i386_shift_reg(I386_SAR, iptr->dst->regoff);
+ case ICMD_ISHLCONST: /* ..., value ==> ..., value << constant */
+ /* val.i = constant */
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_shift_reg(I386_SAR, iptr->dst->regoff);
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ishiftconst(I386_SHL, src, iptr);
+ break;
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->regoff, I386_ECX);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
- i386_shift_reg(I386_SAR, iptr->dst->regoff);
+ case ICMD_ISHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
- } else {
- M_INTMOVE(src->regoff, I386_ECX);
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_shift_reg(I386_SAR, iptr->dst->regoff);
- }
- }
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ishift(I386_SAR, src, iptr);
break;
case ICMD_ISHRCONST: /* ..., value ==> ..., value >> constant */
/* val.i = constant */
- d = reg_of_var(iptr->dst, REG_ITMP1);
- if ((src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) {
- if (src->regoff == iptr->dst->regoff) {
- i386_shift_imm_membase(I386_SAR, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_shift_imm_reg(I386_SAR, iptr->val.i, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else if ((src->flags & INMEMORY) && !(iptr->dst->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff);
- i386_shift_imm_reg(I386_SAR, iptr->val.i, iptr->dst->regoff);
-
- } else if (!(src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) {
- i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_shift_imm_membase(I386_SAR, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- i386_shift_imm_reg(I386_SAR, iptr->val.i, iptr->dst->regoff);
- }
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ishiftconst(I386_SAR, src, iptr);
break;
case ICMD_IUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
- d = reg_of_var(iptr->dst, REG_ITMP2);
- if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->prev->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_shift_membase(I386_SHR, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_shift_reg(I386_SHR, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_shift_membase(I386_SHR, REG_SP, iptr->dst->regoff * 8);
-
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->prev->regoff == iptr->dst->regoff) {
- M_INTMOVE(src->regoff, I386_ECX);
- i386_shift_membase(I386_SHR, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- M_INTMOVE(src->regoff, I386_ECX);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_shift_reg(I386_SHR, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else {
- M_INTMOVE(src->regoff, I386_ECX);
- i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_shift_membase(I386_SHR, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
- i386_shift_reg(I386_SHR, iptr->dst->regoff);
-
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_shift_reg(I386_SHR, iptr->dst->regoff);
-
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->regoff, I386_ECX);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
- i386_shift_reg(I386_SHR, iptr->dst->regoff);
-
- } else {
- M_INTMOVE(src->regoff, I386_ECX);
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_shift_reg(I386_SHR, iptr->dst->regoff);
- }
- }
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ishift(I386_SHR, src, iptr);
break;
case ICMD_IUSHRCONST: /* ..., value ==> ..., value >>> constant */
/* val.i = constant */
- d = reg_of_var(iptr->dst, REG_ITMP1);
- if ((src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) {
- if (src->regoff == iptr->dst->regoff) {
- i386_shift_imm_membase(I386_SHR, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_shift_imm_reg(I386_SHR, iptr->val.i, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else if ((src->flags & INMEMORY) && !(iptr->dst->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff);
- i386_shift_imm_reg(I386_SHR, iptr->val.i, iptr->dst->regoff);
-
- } else if (!(src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) {
- i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_shift_imm_membase(I386_SHR, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- i386_shift_imm_reg(I386_SHR, iptr->val.i, iptr->dst->regoff);
- }
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ishiftconst(I386_SHR, src, iptr);
break;
case ICMD_LSHL: /* ..., val1, val2 ==> ..., val1 << val2 */
- d = reg_of_var(iptr->dst, REG_ITMP1);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY ){
if (src->prev->flags & INMEMORY) {
- if (src->prev->regoff == iptr->dst->regoff) {
- if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_shld_reg_membase(REG_ITMP1, REG_SP, src->prev->regoff * 8 + 4);
- i386_shift_membase(I386_SHL, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- M_INTMOVE(src->regoff, I386_ECX);
- i386_shld_reg_membase(REG_ITMP1, REG_SP, src->prev->regoff * 8 + 4);
- i386_shift_membase(I386_SHL, REG_SP, iptr->dst->regoff * 8);
- }
+/* if (src->prev->regoff == iptr->dst->regoff) { */
+/* i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); */
+
+/* if (src->flags & INMEMORY) { */
+/* i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX); */
+/* } else { */
+/* M_INTMOVE(src->regoff, I386_ECX); */
+/* } */
+
+/* i386_test_imm_reg(32, I386_ECX); */
+/* i386_jcc(I386_CC_E, 2 + 2); */
+/* i386_mov_reg_reg(REG_ITMP1, REG_ITMP2); */
+/* i386_alu_reg_reg(I386_XOR, REG_ITMP1, REG_ITMP1); */
+
+/* i386_shld_reg_membase(REG_ITMP1, REG_SP, src->prev->regoff * 8 + 4); */
+/* i386_shift_membase(I386_SHL, REG_SP, iptr->dst->regoff * 8); */
- } else {
+/* } else { */
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
+
if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_shld_reg_reg(REG_ITMP1, REG_ITMP2);
- i386_shift_reg(I386_SHL, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
-
} else {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
M_INTMOVE(src->regoff, I386_ECX);
- i386_shld_reg_reg(REG_ITMP1, REG_ITMP2);
- i386_shift_reg(I386_SHL, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
}
- }
+
+ i386_test_imm_reg(32, I386_ECX);
+ i386_jcc(I386_CC_E, 2 + 2);
+ i386_mov_reg_reg(REG_ITMP1, REG_ITMP2);
+ i386_alu_reg_reg(I386_XOR, REG_ITMP1, REG_ITMP1);
+
+ i386_shld_reg_reg(REG_ITMP1, REG_ITMP2);
+ i386_shift_reg(I386_SHL, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
+/* } */
}
}
break;
-/* case ICMD_LSHLCONST: /* ..., value ==> ..., value << constant */
-/* /* val.l = constant */
+ case ICMD_LSHLCONST: /* ..., value ==> ..., value << constant */
+ /* val.i = constant */
+
+ d = reg_of_var(iptr->dst, REG_NULL);
+ if (iptr->dst->flags & INMEMORY ) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
+
+ if (iptr->val.i & 0x20) {
+ i386_mov_reg_reg(REG_ITMP1, REG_ITMP2);
+ i386_alu_reg_reg(I386_XOR, REG_ITMP1, REG_ITMP1);
+ i386_shld_imm_reg_reg(iptr->val.i & 0x3f, REG_ITMP1, REG_ITMP2);
-/* var_to_reg_int(s1, src, REG_ITMP1); */
-/* d = reg_of_var(iptr->dst, REG_ITMP3); */
-/* M_SLL_IMM(s1, iptr->val.l & 0x3f, d); */
-/* store_reg_to_var_int(iptr->dst, d); */
-/* break; */
+ } else {
+ i386_shld_imm_reg_reg(iptr->val.i & 0x3f, REG_ITMP1, REG_ITMP2);
+ i386_shift_imm_reg(I386_SHL, iptr->val.i & 0x3f, REG_ITMP1);
+ }
+
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
+ }
+ break;
case ICMD_LSHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
- d = reg_of_var(iptr->dst, REG_ITMP1);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY ){
if (src->prev->flags & INMEMORY) {
- if (src->prev->regoff == iptr->dst->regoff) {
- if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_shrd_reg_membase(REG_ITMP1, REG_SP, src->prev->regoff * 8 + 4);
- i386_shift_membase(I386_SAR, REG_SP, iptr->dst->regoff * 8);
+/* if (src->prev->regoff == iptr->dst->regoff) { */
+ /* TODO: optimize */
+/* i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); */
+/* i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); */
+
+/* if (src->flags & INMEMORY) { */
+/* i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX); */
+/* } else { */
+/* M_INTMOVE(src->regoff, I386_ECX); */
+/* } */
+
+/* i386_test_imm_reg(32, I386_ECX); */
+/* i386_jcc(I386_CC_E, 2 + 3); */
+/* i386_mov_reg_reg(REG_ITMP2, REG_ITMP1); */
+/* i386_shift_imm_reg(I386_SAR, 31, REG_ITMP2); */
+
+/* i386_shrd_reg_reg(REG_ITMP2, REG_ITMP1); */
+/* i386_shift_reg(I386_SAR, REG_ITMP2); */
+/* i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); */
+/* i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); */
- } else {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- M_INTMOVE(src->regoff, I386_ECX);
- i386_shrd_reg_membase(REG_ITMP1, REG_SP, src->prev->regoff * 8 + 4);
- i386_shift_membase(I386_SAR, REG_SP, iptr->dst->regoff * 8);
- }
+/* } else { */
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
- } else {
if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_shrd_reg_reg(REG_ITMP1, REG_ITMP2);
- i386_shift_reg(I386_SAR, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
-
} else {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
M_INTMOVE(src->regoff, I386_ECX);
- i386_shrd_reg_reg(REG_ITMP1, REG_ITMP2);
- i386_shift_reg(I386_SAR, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
}
- }
+
+ i386_test_imm_reg(32, I386_ECX);
+ i386_jcc(I386_CC_E, 2 + 3);
+ i386_mov_reg_reg(REG_ITMP2, REG_ITMP1);
+ i386_shift_imm_reg(I386_SAR, 31, REG_ITMP2);
+
+ i386_shrd_reg_reg(REG_ITMP2, REG_ITMP1);
+ i386_shift_reg(I386_SAR, REG_ITMP2);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
+/* } */
}
}
break;
-/* case ICMD_LSHRCONST: /* ..., value ==> ..., value >> constant */
-/* /* val.l = constant */
+ case ICMD_LSHRCONST: /* ..., value ==> ..., value >> constant */
+ /* val.i = constant */
+
+ d = reg_of_var(iptr->dst, REG_NULL);
+ if (iptr->dst->flags & INMEMORY ) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
+
+ if (iptr->val.i & 0x20) {
+ i386_mov_reg_reg(REG_ITMP2, REG_ITMP1);
+ i386_shift_imm_reg(I386_SAR, 31, REG_ITMP2);
+ i386_shrd_imm_reg_reg(iptr->val.i & 0x3f, REG_ITMP2, REG_ITMP1);
+
+ } else {
+ i386_shrd_imm_reg_reg(iptr->val.i & 0x3f, REG_ITMP2, REG_ITMP1);
+ i386_shift_imm_reg(I386_SAR, iptr->val.i & 0x3f, REG_ITMP2);
+ }
-/* var_to_reg_int(s1, src, REG_ITMP1); */
-/* d = reg_of_var(iptr->dst, REG_ITMP3); */
-/* M_SRA_IMM(s1, iptr->val.l & 0x3f, d); */
-/* store_reg_to_var_int(iptr->dst, d); */
-/* break; */
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
+ }
+ break;
case ICMD_LUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
- d = reg_of_var(iptr->dst, REG_ITMP1);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY ){
if (src->prev->flags & INMEMORY) {
- if (src->prev->regoff == iptr->dst->regoff) {
- if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_shrd_reg_membase(REG_ITMP1, REG_SP, src->prev->regoff * 8 + 4);
- i386_shift_membase(I386_SHR, REG_SP, iptr->dst->regoff * 8);
+/* if (src->prev->regoff == iptr->dst->regoff) { */
+ /* TODO: optimize */
+/* i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1); */
+/* i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2); */
+
+/* if (src->flags & INMEMORY) { */
+/* i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX); */
+/* } else { */
+/* M_INTMOVE(src->regoff, I386_ECX); */
+/* } */
+
+/* i386_test_imm_reg(32, I386_ECX); */
+/* i386_jcc(I386_CC_E, 2 + 2); */
+/* i386_mov_reg_reg(REG_ITMP2, REG_ITMP1); */
+/* i386_alu_reg_reg(I386_XOR, REG_ITMP2, REG_ITMP2); */
+
+/* i386_shrd_reg_reg(REG_ITMP2, REG_ITMP1); */
+/* i386_shift_reg(I386_SHR, REG_ITMP2); */
+/* i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8); */
+/* i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4); */
- } else {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- M_INTMOVE(src->regoff, I386_ECX);
- i386_shrd_reg_membase(REG_ITMP1, REG_SP, src->prev->regoff * 8 + 4);
- i386_shift_membase(I386_SHR, REG_SP, iptr->dst->regoff * 8);
- }
+/* } else { */
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
- } else {
if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
- i386_shrd_reg_reg(REG_ITMP1, REG_ITMP2);
- i386_shift_reg(I386_SHR, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
-
} else {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
M_INTMOVE(src->regoff, I386_ECX);
- i386_shrd_reg_reg(REG_ITMP1, REG_ITMP2);
- i386_shift_reg(I386_SHR, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
}
- }
+
+ i386_test_imm_reg(32, I386_ECX);
+ i386_jcc(I386_CC_E, 2 + 2);
+ i386_mov_reg_reg(REG_ITMP2, REG_ITMP1);
+ i386_alu_reg_reg(I386_XOR, REG_ITMP2, REG_ITMP2);
+
+ i386_shrd_reg_reg(REG_ITMP2, REG_ITMP1);
+ i386_shift_reg(I386_SHR, REG_ITMP2);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
+/* } */
}
}
break;
-/* case ICMD_LUSHRCONST: /* ..., value ==> ..., value >>> constant */
-/* /* val.l = constant */
-
-/* var_to_reg_int(s1, src, REG_ITMP1); */
-/* d = reg_of_var(iptr->dst, REG_ITMP3); */
-/* M_SRL_IMM(s1, iptr->val.l & 0x3f, d); */
-/* store_reg_to_var_int(iptr->dst, d); */
-/* break; */
-
- case ICMD_IAND: /* ..., val1, val2 ==> ..., val1 & val2 */
-
- d = reg_of_var(iptr->dst, REG_ITMP1);
- if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_alu_reg_membase(I386_AND, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else if (src->prev->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_reg_membase(I386_AND, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ case ICMD_LUSHRCONST: /* ..., value ==> ..., value >>> constant */
+ /* val.l = constant */
- } else {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_alu_membase_reg(I386_AND, REG_SP, src->regoff * 8, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_reg_reg(I386_AND, src->prev->regoff, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ d = reg_of_var(iptr->dst, REG_NULL);
+ if (iptr->dst->flags & INMEMORY ) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_alu_reg_reg(I386_AND, src->regoff, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ if (iptr->val.i & 0x20) {
+ i386_mov_reg_reg(REG_ITMP2, REG_ITMP1);
+ i386_alu_reg_reg(I386_XOR, REG_ITMP2, REG_ITMP2);
+ i386_shrd_imm_reg_reg(iptr->val.i & 0x3f, REG_ITMP2, REG_ITMP1);
} else {
- i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_alu_reg_membase(I386_AND, src->regoff, REG_SP, iptr->dst->regoff * 8);
+ i386_shrd_imm_reg_reg(iptr->val.i & 0x3f, REG_ITMP2, REG_ITMP1);
+ i386_shift_imm_reg(I386_SHR, iptr->val.i & 0x3f, REG_ITMP2);
}
- } else {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
- i386_alu_membase_reg(I386_AND, REG_SP, src->regoff * 8, iptr->dst->regoff);
-
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_alu_membase_reg(I386_AND, REG_SP, src->regoff * 8, iptr->dst->regoff);
-
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- i386_alu_membase_reg(I386_AND, REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
+ }
+ break;
- } else {
- if (src->regoff == iptr->dst->regoff) {
- i386_alu_reg_reg(I386_AND, src->prev->regoff, iptr->dst->regoff);
+ case ICMD_IAND: /* ..., val1, val2 ==> ..., val1 & val2 */
- } else {
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_alu_reg_reg(I386_AND, src->regoff, iptr->dst->regoff);
- }
- }
- }
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ialu(I386_AND, src, iptr);
break;
case ICMD_IANDCONST: /* ..., value ==> ..., value & constant */
/* val.i = constant */
- d = reg_of_var(iptr->dst, REG_ITMP1);
- if (iptr->dst->flags & INMEMORY) {
- if (src->flags & INMEMORY) {
- if (src->regoff == iptr->dst->regoff) {
- i386_alu_imm_membase(I386_AND, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ialuconst(I386_AND, src, iptr);
+ break;
- } else {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_imm_reg(I386_AND, iptr->val.i, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ case ICMD_LAND: /* ..., val1, val2 ==> ..., val1 & val2 */
- } else {
- i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_alu_imm_membase(I386_AND, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
- }
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_lalu(I386_AND, src, iptr);
+ break;
- } else {
- if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff);
- i386_alu_imm_reg(I386_AND, iptr->val.i, iptr->dst->regoff);
+ case ICMD_LANDCONST: /* ..., value ==> ..., value & constant */
+ /* val.l = constant */
- } else {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- i386_alu_imm_reg(I386_AND, iptr->val.i, iptr->dst->regoff);
- }
- }
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_laluconst(I386_AND, src, iptr);
break;
- case ICMD_LAND: /* ..., val1, val2 ==> ..., val1 & val2 */
+ case ICMD_IOR: /* ..., val1, val2 ==> ..., val1 | val2 */
- d = reg_of_var(iptr->dst, REG_ITMP1);
- if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
- i386_alu_reg_membase(I386_AND, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_alu_reg_membase(I386_AND, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ialu(I386_OR, src, iptr);
+ break;
- } else if (src->prev->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
- i386_alu_reg_membase(I386_AND, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_alu_reg_membase(I386_AND, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
+ case ICMD_IORCONST: /* ..., value ==> ..., value | constant */
+ /* val.i = constant */
- } else {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
- i386_alu_membase_reg(I386_AND, REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_membase_reg(I386_AND, REG_SP, src->regoff * 8 + 4, REG_ITMP2);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
- }
- }
- }
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ialuconst(I386_OR, src, iptr);
break;
- case ICMD_LANDCONST: /* ..., value ==> ..., value & constant */
- /* val.l = constant */
-
- d = reg_of_var(iptr->dst, REG_ITMP1);
- if (iptr->dst->flags & INMEMORY) {
- if (src->flags & INMEMORY) {
- if (src->regoff == iptr->dst->regoff) {
- i386_alu_imm_membase(I386_AND, iptr->val.l, REG_SP, iptr->dst->regoff * 8);
- i386_alu_imm_membase(I386_AND, iptr->val.l >> 32, REG_SP, iptr->dst->regoff * 8 + 4);
+ case ICMD_LOR: /* ..., val1, val2 ==> ..., val1 | val2 */
- } else {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
- i386_alu_imm_reg(I386_AND, iptr->val.l, REG_ITMP1);
- i386_alu_imm_reg(I386_AND, iptr->val.l >> 32, REG_ITMP2);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
- }
- }
- }
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_lalu(I386_OR, src, iptr);
break;
- case ICMD_IREMPOW2: /* ..., value ==> ..., value % constant */
- /* val.i = constant */
+ case ICMD_LORCONST: /* ..., value ==> ..., value | constant */
+ /* val.l = constant */
- /* TWISTI */
-/* var_to_reg_int(s1, src, REG_ITMP1); */
-/* d = reg_of_var(iptr->dst, REG_ITMP3); */
-/* if (s1 == d) { */
-/* M_MOV(s1, REG_ITMP1); */
-/* s1 = REG_ITMP1; */
-/* } */
-/* if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) { */
-/* M_AND_IMM(s1, iptr->val.i, d); */
-/* M_BGEZ(s1, 3); */
-/* M_ISUB(REG_ZERO, s1, d); */
-/* M_AND_IMM(d, iptr->val.i, d); */
-/* } */
-/* else if (iptr->val.i == 0xffff) { */
-/* M_CZEXT(s1, d); */
-/* M_BGEZ(s1, 3); */
-/* M_ISUB(REG_ZERO, s1, d); */
-/* M_CZEXT(d, d); */
-/* } */
-/* else if (iptr->val.i == 0xffffff) { */
-/* M_ZAPNOT_IMM(s1, 0x07, d); */
-/* M_BGEZ(s1, 3); */
-/* M_ISUB(REG_ZERO, s1, d); */
-/* M_ZAPNOT_IMM(d, 0x07, d); */
-/* } */
-/* else { */
-/* /* ICONST(REG_ITMP2, iptr->val.i); */
-/* M_AND(s1, REG_ITMP2, d); */
-/* M_BGEZ(s1, 3); */
-/* M_ISUB(REG_ZERO, s1, d); */
-/* M_AND(d, REG_ITMP2, d); */
-/* } */
-/* M_ISUB(REG_ZERO, d, d); */
-/* store_reg_to_var_int(iptr->dst, d); */
-/* break; */
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (s1 == d) {
- M_MOV(s1, REG_ITMP1);
- s1 = REG_ITMP1;
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_laluconst(I386_OR, src, iptr);
+ break;
- }
+ case ICMD_IXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
- /* TODO: optimize and/or calc jump offset for AND value */
-/* M_INTMOVE(s1, d); */
-/* i386_alu_imm_reg(I386_AND, iptr->val.i, d); */
-/* i386_alu_imm_reg(I386_CMP, 0, s1); */
-/* i386_jcc(I386_CC_GE, 2 + 2 + 6 + 2); */
-/* M_INTMOVE(s1, d); */
-/* i386_neg_reg(d); */
-/* i386_alu_imm_reg(I386_AND, iptr->val.i, d); */
-/* i386_neg_reg(d); */
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ialu(I386_XOR, src, iptr);
+ break;
- /* TODO: optimize */
- M_INTMOVE(s1, I386_EAX);
- i386_cltd();
- i386_alu_reg_reg(I386_XOR, I386_EDX, I386_EAX);
- i386_alu_reg_reg(I386_SUB, I386_EDX, I386_EAX);
- i386_alu_reg_reg(I386_AND, iptr->val.i, I386_EAX);
- i386_alu_reg_reg(I386_XOR, I386_EDX, I386_EAX);
- i386_alu_reg_reg(I386_SUB, I386_EDX, I386_EAX);
- M_INTMOVE(I386_EAX, d);
+ case ICMD_IXORCONST: /* ..., value ==> ..., value ^ constant */
+ /* val.i = constant */
- store_reg_to_var_int(iptr->dst, d);
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ialuconst(I386_XOR, src, iptr);
break;
- case ICMD_IREM0X10001: /* ..., value ==> ..., value % 0x100001 */
-
-/* b = value & 0xffff;
- a = value >> 16;
- a = ((b - a) & 0xffff) + (b < a);
-*/
+ case ICMD_LXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (s1 == d) {
- M_MOV(s1, REG_ITMP3);
- s1 = REG_ITMP3;
- }
- M_BLTZ(s1, 7);
- M_CZEXT(s1, REG_ITMP2);
- M_SRA_IMM(s1, 16, d);
- M_CMPLT(REG_ITMP2, d, REG_ITMP1);
- M_ISUB(REG_ITMP2, d, d);
- M_CZEXT(d, d);
- M_IADD(d, REG_ITMP1, d);
- M_BR(11 + (s1 == REG_ITMP1));
- M_ISUB(REG_ZERO, s1, REG_ITMP1);
- M_CZEXT(REG_ITMP1, REG_ITMP2);
- M_SRA_IMM(REG_ITMP1, 16, d);
- M_CMPLT(REG_ITMP2, d, REG_ITMP1);
- M_ISUB(REG_ITMP2, d, d);
- M_CZEXT(d, d);
- M_IADD(d, REG_ITMP1, d);
- M_ISUB(REG_ZERO, d, d);
- if (s1 == REG_ITMP1) {
- var_to_reg_int(s1, src, REG_ITMP1);
- }
- M_SLL_IMM(s1, 33, REG_ITMP2);
- M_CMPEQ(REG_ITMP2, REG_ZERO, REG_ITMP2);
- M_ISUB(d, REG_ITMP2, d);
- store_reg_to_var_int(iptr->dst, d);
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_lalu(I386_XOR, src, iptr);
break;
- case ICMD_LREMPOW2: /* ..., value ==> ..., value % constant */
+ case ICMD_LXORCONST: /* ..., value ==> ..., value ^ constant */
/* val.l = constant */
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (s1 == d) {
- M_MOV(s1, REG_ITMP1);
- s1 = REG_ITMP1;
- }
- if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
- M_AND_IMM(s1, iptr->val.l, d);
- M_BGEZ(s1, 3);
- M_LSUB(REG_ZERO, s1, d);
- M_AND_IMM(d, iptr->val.l, d);
- }
- else if (iptr->val.l == 0xffffL) {
- M_CZEXT(s1, d);
- M_BGEZ(s1, 3);
- M_LSUB(REG_ZERO, s1, d);
- M_CZEXT(d, d);
- }
- else if (iptr->val.l == 0xffffffL) {
- M_ZAPNOT_IMM(s1, 0x07, d);
- M_BGEZ(s1, 3);
- M_LSUB(REG_ZERO, s1, d);
- M_ZAPNOT_IMM(d, 0x07, d);
- }
- else if (iptr->val.l == 0xffffffffL) {
- M_IZEXT(s1, d);
- M_BGEZ(s1, 3);
- M_LSUB(REG_ZERO, s1, d);
- M_IZEXT(d, d);
- }
- else if (iptr->val.l == 0xffffffffffL) {
- M_ZAPNOT_IMM(s1, 0x1f, d);
- M_BGEZ(s1, 3);
- M_LSUB(REG_ZERO, s1, d);
- M_ZAPNOT_IMM(d, 0x1f, d);
- }
- else if (iptr->val.l == 0xffffffffffffL) {
- M_ZAPNOT_IMM(s1, 0x3f, d);
- M_BGEZ(s1, 3);
- M_LSUB(REG_ZERO, s1, d);
- M_ZAPNOT_IMM(d, 0x3f, d);
- }
- else if (iptr->val.l == 0xffffffffffffffL) {
- M_ZAPNOT_IMM(s1, 0x7f, d);
- M_BGEZ(s1, 3);
- M_LSUB(REG_ZERO, s1, d);
- M_ZAPNOT_IMM(d, 0x7f, d);
- }
- else {
-/* LCONST(REG_ITMP2, iptr->val.l); */
- M_AND(s1, REG_ITMP2, d);
- M_BGEZ(s1, 3);
- M_LSUB(REG_ZERO, s1, d);
- M_AND(d, REG_ITMP2, d);
- }
- M_LSUB(REG_ZERO, d, d);
- store_reg_to_var_int(iptr->dst, d);
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_laluconst(I386_XOR, src, iptr);
break;
- case ICMD_LREM0X10001:/* ..., value ==> ..., value % 0x10001 */
+ case ICMD_IINC: /* ..., value ==> ..., value + constant */
+ /* op1 = variable, val.i = constant */
+
+ var = &(locals[iptr->op1][TYPE_INT]);
+ if (var->flags & INMEMORY) {
+ if (iptr->val.i == 1) {
+ i386_inc_membase(REG_SP, var->regoff * 8);
+
+ } else if (iptr->val.i == -1) {
+ i386_dec_membase(REG_SP, var->regoff * 8);
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (s1 == d) {
- M_MOV(s1, REG_ITMP3);
- s1 = REG_ITMP3;
+ } else {
+ i386_alu_imm_membase(I386_ADD, iptr->val.i, REG_SP, var->regoff * 8);
}
- M_CZEXT(s1, REG_ITMP2);
- M_SRA_IMM(s1, 16, d);
- M_CMPLT(REG_ITMP2, d, REG_ITMP1);
- M_LSUB(REG_ITMP2, d, d);
- M_CZEXT(d, d);
- M_LADD(d, REG_ITMP1, d);
- M_LDA(REG_ITMP2, REG_ZERO, -1);
- M_SRL_IMM(REG_ITMP2, 33, REG_ITMP2);
- if (s1 == REG_ITMP1) {
- var_to_reg_int(s1, src, REG_ITMP1);
+
+ } else {
+ if (iptr->val.i == 1) {
+ i386_inc_reg(var->regoff);
+
+ } else if (iptr->val.i == -1) {
+ i386_dec_reg(var->regoff);
+
+ } else {
+ i386_alu_imm_reg(I386_ADD, iptr->val.i, var->regoff);
}
- M_CMPULT(s1, REG_ITMP2, REG_ITMP2);
- M_BNEZ(REG_ITMP2, 11);
- M_LDA(d, REG_ZERO, -257);
- M_ZAPNOT_IMM(d, 0xcd, d);
- M_LSUB(REG_ZERO, s1, REG_ITMP2);
- M_CMOVGE(s1, s1, REG_ITMP2);
- M_UMULH(REG_ITMP2, d, REG_ITMP2);
- M_SRL_IMM(REG_ITMP2, 16, REG_ITMP2);
- M_LSUB(REG_ZERO, REG_ITMP2, d);
- M_CMOVGE(s1, REG_ITMP2, d);
- M_SLL_IMM(d, 16, REG_ITMP2);
- M_LADD(d, REG_ITMP2, d);
- M_LSUB(s1, d, d);
- store_reg_to_var_int(iptr->dst, d);
+ }
break;
- case ICMD_IOR: /* ..., val1, val2 ==> ..., val1 | val2 */
- d = reg_of_var(iptr->dst, REG_ITMP1);
- if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_alu_reg_membase(I386_OR, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ /* floating operations ************************************************/
+#if 0
+#define ROUND_TO_SINGLE \
+ i386_fstps_membase(REG_SP, -8); \
+ i386_flds_membase(REG_SP, -8);
- } else if (src->prev->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_reg_membase(I386_OR, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+#define ROUND_TO_DOUBLE \
+ i386_fstpl_membase(REG_SP, -8); \
+ i386_fldl_membase(REG_SP, -8);
- } else {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_alu_membase_reg(I386_OR, REG_SP, src->regoff * 8, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+#define FPU_SET_24BIT_MODE \
+ if (!fpu_in_24bit_mode) { \
+ i386_fldcw_mem(&fpu_ctrlwrd_24bit); \
+ fpu_in_24bit_mode = 1; \
+ }
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_reg_reg(I386_OR, src->prev->regoff, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+#define FPU_SET_53BIT_MODE \
+ if (fpu_in_24bit_mode) { \
+ i386_fldcw_mem(&fpu_ctrlwrd_53bit); \
+ fpu_in_24bit_mode = 0; \
+ }
+#else
+#define ROUND_TO_SINGLE
+#define ROUND_TO_DOUBLE
+#define FPU_SET_24BIT_MODE
+#define FPU_SET_53BIT_MODE
+#endif
+ case ICMD_FNEG: /* ..., value ==> ..., - value */
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_alu_reg_reg(I386_OR, src->regoff, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ FPU_SET_24BIT_MODE;
+ var_to_reg_flt(s1, src, REG_FTMP1);
+ d = reg_of_var(iptr->dst, REG_FTMP3);
+ i386_fchs();
+ store_reg_to_var_flt(iptr->dst, d);
+ break;
- } else {
- i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_alu_reg_membase(I386_OR, src->regoff, REG_SP, iptr->dst->regoff * 8);
- }
+ case ICMD_DNEG: /* ..., value ==> ..., - value */
- } else {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
- i386_alu_membase_reg(I386_OR, REG_SP, src->regoff * 8, iptr->dst->regoff);
+ FPU_SET_53BIT_MODE;
+ var_to_reg_flt(s1, src, REG_FTMP1);
+ d = reg_of_var(iptr->dst, REG_FTMP3);
+ i386_fchs();
+ store_reg_to_var_flt(iptr->dst, d);
+ break;
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_alu_membase_reg(I386_OR, REG_SP, src->regoff * 8, iptr->dst->regoff);
+ case ICMD_FADD: /* ..., val1, val2 ==> ..., val1 + val2 */
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- i386_alu_membase_reg(I386_OR, REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
+ FPU_SET_24BIT_MODE;
+ d = reg_of_var(iptr->dst, REG_FTMP3);
+ var_to_reg_flt(s1, src->prev, REG_FTMP1);
+ var_to_reg_flt(s2, src, REG_FTMP2);
+ i386_faddp();
+ fpu_st_offset--;
+ store_reg_to_var_flt(iptr->dst, d);
+ break;
- } else {
- if (src->regoff == iptr->dst->regoff) {
- i386_alu_reg_reg(I386_OR, src->prev->regoff, iptr->dst->regoff);
+ case ICMD_DADD: /* ..., val1, val2 ==> ..., val1 + val2 */
- } else {
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_alu_reg_reg(I386_OR, src->regoff, iptr->dst->regoff);
- }
- }
- }
+ FPU_SET_53BIT_MODE;
+ d = reg_of_var(iptr->dst, REG_FTMP3);
+ var_to_reg_flt(s1, src->prev, REG_FTMP1);
+ var_to_reg_flt(s2, src, REG_FTMP2);
+ i386_faddp();
+ fpu_st_offset--;
+ store_reg_to_var_flt(iptr->dst, d);
break;
- case ICMD_IORCONST: /* ..., value ==> ..., value | constant */
- /* val.i = constant */
+ case ICMD_FSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
- d = reg_of_var(iptr->dst, REG_ITMP1);
- if (iptr->dst->flags & INMEMORY) {
- if (src->flags & INMEMORY) {
- if (src->regoff == iptr->dst->regoff) {
- i386_alu_imm_membase(I386_OR, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
+ FPU_SET_24BIT_MODE;
+ d = reg_of_var(iptr->dst, REG_FTMP3);
+ var_to_reg_flt(s1, src->prev, REG_FTMP1);
+ var_to_reg_flt(s2, src, REG_FTMP2);
+ i386_fsubp();
+ fpu_st_offset--;
+ store_reg_to_var_flt(iptr->dst, d);
+ break;
- } else {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_imm_reg(I386_OR, iptr->val.i, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ case ICMD_DSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
- } else {
- i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_alu_imm_membase(I386_OR, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
- }
+ FPU_SET_53BIT_MODE;
+ d = reg_of_var(iptr->dst, REG_FTMP3);
+ var_to_reg_flt(s1, src->prev, REG_FTMP1);
+ var_to_reg_flt(s2, src, REG_FTMP2);
+ i386_fsubp();
+ fpu_st_offset--;
+ store_reg_to_var_flt(iptr->dst, d);
+ break;
- } else {
- if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff);
- i386_alu_imm_reg(I386_OR, iptr->val.i, iptr->dst->regoff);
+ case ICMD_FMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
- } else {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- i386_alu_imm_reg(I386_OR, iptr->val.i, iptr->dst->regoff);
- }
- }
+ FPU_SET_24BIT_MODE;
+ d = reg_of_var(iptr->dst, REG_FTMP3);
+ var_to_reg_flt(s1, src->prev, REG_FTMP1);
+ var_to_reg_flt(s2, src, REG_FTMP2);
+ i386_fmulp();
+ fpu_st_offset--;
+ ROUND_TO_SINGLE;
+ store_reg_to_var_flt(iptr->dst, d);
break;
- case ICMD_LOR: /* ..., val1, val2 ==> ..., val1 | val2 */
+ case ICMD_DMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
- d = reg_of_var(iptr->dst, REG_ITMP1);
- if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
- i386_alu_reg_membase(I386_OR, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_alu_reg_membase(I386_OR, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
+ FPU_SET_53BIT_MODE;
+ d = reg_of_var(iptr->dst, REG_FTMP3);
+ var_to_reg_flt(s1, src->prev, REG_FTMP1);
- } else if (src->prev->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
- i386_alu_reg_membase(I386_OR, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_alu_reg_membase(I386_OR, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
+/* i386_fldt_mem(subnormal_bias1); */
+/* i386_fmulp(); */
- } else {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
- i386_alu_membase_reg(I386_OR, REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_membase_reg(I386_OR, REG_SP, src->regoff * 8 + 4, REG_ITMP2);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
- }
- }
- }
- break;
+ var_to_reg_flt(s2, src, REG_FTMP2);
- case ICMD_LORCONST: /* ..., value ==> ..., value | constant */
- /* val.l = constant */
+ i386_fmulp();
+ fpu_st_offset--;
- d = reg_of_var(iptr->dst, REG_ITMP1);
- if (iptr->dst->flags & INMEMORY) {
- if (src->flags & INMEMORY) {
- if (src->regoff == iptr->dst->regoff) {
- i386_alu_imm_membase(I386_OR, iptr->val.l, REG_SP, iptr->dst->regoff * 8);
- i386_alu_imm_membase(I386_OR, iptr->val.l >> 32, REG_SP, iptr->dst->regoff * 8 + 4);
+/* i386_fldt_mem(subnormal_bias2); */
+/* i386_fmulp(); */
- } else {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
- i386_alu_imm_reg(I386_OR, iptr->val.l, REG_ITMP1);
- i386_alu_imm_reg(I386_OR, iptr->val.l >> 32, REG_ITMP2);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
- }
- }
- }
+ store_reg_to_var_flt(iptr->dst, d);
break;
- case ICMD_IXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
+ case ICMD_FDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
- d = reg_of_var(iptr->dst, REG_ITMP1);
- if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_alu_reg_membase(I386_XOR, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ FPU_SET_24BIT_MODE;
+ d = reg_of_var(iptr->dst, REG_FTMP3);
+ var_to_reg_flt(s1, src->prev, REG_FTMP1);
+ var_to_reg_flt(s2, src, REG_FTMP2);
+ i386_fdivp();
+ fpu_st_offset--;
+ ROUND_TO_SINGLE;
+ store_reg_to_var_flt(iptr->dst, d);
+ break;
- } else if (src->prev->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_reg_membase(I386_XOR, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ case ICMD_DDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
- } else {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_alu_membase_reg(I386_XOR, REG_SP, src->regoff * 8, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ FPU_SET_53BIT_MODE;
+ d = reg_of_var(iptr->dst, REG_FTMP3);
+ var_to_reg_flt(s1, src->prev, REG_FTMP1);
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_reg_reg(I386_XOR, src->prev->regoff, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_alu_reg_reg(I386_XOR, src->regoff, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+/* i386_fldt_mem(subnormal_bias1); */
+/* i386_fmulp(); */
- } else {
- i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_alu_reg_membase(I386_XOR, src->regoff, REG_SP, iptr->dst->regoff * 8);
- }
+ var_to_reg_flt(s2, src, REG_FTMP2);
- } else {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
- i386_alu_membase_reg(I386_XOR, REG_SP, src->regoff * 8, iptr->dst->regoff);
+ i386_fdivp();
+ fpu_st_offset--;
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_alu_membase_reg(I386_XOR, REG_SP, src->regoff * 8, iptr->dst->regoff);
+/* i386_fldt_mem(subnormal_bias2); */
+/* i386_fmulp(); */
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- i386_alu_membase_reg(I386_XOR, REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
+ store_reg_to_var_flt(iptr->dst, d);
+ break;
- } else {
- if (src->regoff == iptr->dst->regoff) {
- i386_alu_reg_reg(I386_XOR, src->prev->regoff, iptr->dst->regoff);
+ case ICMD_FREM: /* ..., val1, val2 ==> ..., val1 % val2 */
- } else {
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- i386_alu_reg_reg(I386_XOR, src->regoff, iptr->dst->regoff);
- }
- }
- }
+ FPU_SET_24BIT_MODE;
+ /* exchanged to skip fxch */
+ var_to_reg_flt(s2, src, REG_FTMP2);
+ var_to_reg_flt(s1, src->prev, REG_FTMP1);
+ d = reg_of_var(iptr->dst, REG_FTMP3);
+/* i386_fxch(); */
+ i386_fprem();
+ i386_wait();
+ i386_fnstsw();
+ i386_sahf();
+ i386_jcc(I386_CC_P, -(2 + 1 + 2 + 1 + 6));
+ store_reg_to_var_flt(iptr->dst, d);
+ i386_ffree_reg(0);
+ i386_fincstp();
+ fpu_st_offset--;
break;
- case ICMD_IXORCONST: /* ..., value ==> ..., value ^ constant */
- /* val.i = constant */
+ case ICMD_DREM: /* ..., val1, val2 ==> ..., val1 % val2 */
- d = reg_of_var(iptr->dst, REG_ITMP1);
- if (iptr->dst->flags & INMEMORY) {
- if (src->flags & INMEMORY) {
- if (src->regoff == iptr->dst->regoff) {
- i386_alu_imm_membase(I386_XOR, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
+ FPU_SET_53BIT_MODE;
+ /* exchanged to skip fxch */
+ var_to_reg_flt(s2, src, REG_FTMP2);
+ var_to_reg_flt(s1, src->prev, REG_FTMP1);
+ d = reg_of_var(iptr->dst, REG_FTMP3);
+/* i386_fxch(); */
+ i386_fprem();
+ i386_wait();
+ i386_fnstsw();
+ i386_sahf();
+ i386_jcc(I386_CC_P, -(2 + 1 + 2 + 1 + 6));
+ store_reg_to_var_flt(iptr->dst, d);
+ i386_ffree_reg(0);
+ i386_fincstp();
+ fpu_st_offset--;
+ break;
- } else {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_imm_reg(I386_XOR, iptr->val.i, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ case ICMD_I2F: /* ..., value ==> ..., (float) value */
+ case ICMD_I2D: /* ..., value ==> ..., (double) value */
- } else {
- i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8);
- i386_alu_imm_membase(I386_XOR, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
- }
+ d = reg_of_var(iptr->dst, REG_FTMP1);
+ if (src->flags & INMEMORY) {
+ i386_fildl_membase(REG_SP, src->regoff * 8);
+ fpu_st_offset++;
} else {
- if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff);
- i386_alu_imm_reg(I386_XOR, iptr->val.i, iptr->dst->regoff);
-
- } else {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- i386_alu_imm_reg(I386_XOR, iptr->val.i, iptr->dst->regoff);
- }
+ a = dseg_adds4(0);
+ i386_mov_imm_reg(0, REG_ITMP1);
+ dseg_adddata(mcodeptr);
+ i386_mov_reg_membase(src->regoff, REG_ITMP1, a);
+ i386_fildl_membase(REG_ITMP1, a);
+ fpu_st_offset++;
}
+ store_reg_to_var_flt(iptr->dst, d);
break;
- case ICMD_LXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
-
- d = reg_of_var(iptr->dst, REG_ITMP1);
- if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
- i386_alu_reg_membase(I386_XOR, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_alu_reg_membase(I386_XOR, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
+ case ICMD_L2F: /* ..., value ==> ..., (float) value */
+ case ICMD_L2D: /* ..., value ==> ..., (double) value */
- } else if (src->prev->regoff == iptr->dst->regoff) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
- i386_alu_reg_membase(I386_XOR, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_alu_reg_membase(I386_XOR, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
+ d = reg_of_var(iptr->dst, REG_FTMP1);
+ if (src->flags & INMEMORY) {
+ i386_fildll_membase(REG_SP, src->regoff * 8);
+ fpu_st_offset++;
- } else {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
- i386_alu_membase_reg(I386_XOR, REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_membase_reg(I386_XOR, REG_SP, src->regoff * 8 + 4, REG_ITMP2);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
- }
- }
+ } else {
+ panic("L2F: longs have to be in memory");
}
+ store_reg_to_var_flt(iptr->dst, d);
break;
+
+ case ICMD_F2I: /* ..., value ==> ..., (int) value */
- case ICMD_LXORCONST: /* ..., value ==> ..., value ^ constant */
- /* val.l = constant */
-
+ var_to_reg_flt(s1, src, REG_FTMP1);
d = reg_of_var(iptr->dst, REG_ITMP1);
- if (iptr->dst->flags & INMEMORY) {
- if (src->flags & INMEMORY) {
- if (src->regoff == iptr->dst->regoff) {
- i386_alu_imm_membase(I386_XOR, iptr->val.l, REG_SP, iptr->dst->regoff * 8);
- i386_alu_imm_membase(I386_XOR, iptr->val.l >> 32, REG_SP, iptr->dst->regoff * 8 + 4);
-
- } else {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
- i386_alu_imm_reg(I386_XOR, iptr->val.l, REG_ITMP1);
- i386_alu_imm_reg(I386_XOR, iptr->val.l >> 32, REG_ITMP2);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
- }
- }
- }
- break;
-
- case ICMD_LCMP: /* ..., val1, val2 ==> ..., val1 cmp val2 */
+ a = dseg_adds4(0x0e7f); /* Round to zero, 53-bit mode, exception masked */
+ i386_mov_imm_reg(0, REG_ITMP1);
+ dseg_adddata(mcodeptr);
+ i386_fldcw_membase(REG_ITMP1, a);
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- d = reg_of_var(iptr->dst, REG_ITMP3);
- M_CMPLT(s1, s2, REG_ITMP3);
- M_CMPLT(s2, s1, REG_ITMP1);
- M_LSUB (REG_ITMP1, REG_ITMP3, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
+ if (iptr->dst->flags & INMEMORY) {
+ i386_fistpl_membase(REG_SP, iptr->dst->regoff * 8);
+ fpu_st_offset--;
- case ICMD_IINC: /* ..., value ==> ..., value + constant */
- /* op1 = variable, val.i = constant */
+ a = dseg_adds4(0x027f); /* Round to nearest, 53-bit mode, exceptions masked */
+ i386_fldcw_membase(REG_ITMP1, a);
- var = &(locals[iptr->op1][TYPE_INT]);
- if (var->flags & INMEMORY) {
- if (iptr->val.i == 1) {
- i386_inc_membase(REG_SP, var->regoff * 8);
-
- } else if (iptr->val.i == -1) {
- i386_dec_membase(REG_SP, var->regoff * 8);
+ i386_alu_imm_membase(I386_CMP, 0x80000000, REG_SP, iptr->dst->regoff * 8);
- } else {
- i386_alu_imm_membase(I386_ADD, iptr->val.i, REG_SP, var->regoff * 8);
- }
+ a = 3;
+ CALCOFFSETBYTES(a, src->regoff * 8);
+ a += 5 + 2 + 3;
+ CALCOFFSETBYTES(a, iptr->dst->regoff * 8);
} else {
- if (iptr->val.i == 1) {
- i386_inc_reg(var->regoff);
-
- } else if (iptr->val.i == -1) {
- i386_dec_reg(var->regoff);
+ a = dseg_adds4(0);
+ i386_fistpl_membase(REG_ITMP1, a);
+ fpu_st_offset--;
+ i386_mov_membase_reg(REG_ITMP1, a, iptr->dst->regoff);
- } else {
- i386_alu_imm_reg(I386_ADD, iptr->val.i, var->regoff);
- }
- }
- break;
+ a = dseg_adds4(0x027f); /* Round to nearest, 53-bit mode, exceptions masked */
+ i386_fldcw_membase(REG_ITMP1, a);
+ i386_alu_imm_reg(I386_CMP, 0x80000000, iptr->dst->regoff);
- /* floating operations ************************************************/
+ a = 3;
+ CALCOFFSETBYTES(a, src->regoff * 8);
+ a += 5 + 2 + ((REG_RESULT == d) ? 0 : 2);
+ }
- case ICMD_FNEG: /* ..., value ==> ..., - value */
- case ICMD_DNEG: /* ..., value ==> ..., - value */
+ i386_jcc(I386_CC_NE, a);
- d = reg_of_var(iptr->dst, REG_FTMP3);
- i386_fchs();
- store_reg_to_var_flt(iptr->dst, d);
- break;
+ /* XXX: change this when we use registers */
+ i386_flds_membase(REG_SP, src->regoff * 8);
+ i386_mov_imm_reg((s4) asm_builtin_f2i, REG_ITMP2);
+ i386_call_reg(REG_ITMP2);
- case ICMD_FADD: /* ..., val1, val2 ==> ..., val1 + val2 */
- case ICMD_DADD: /* ..., val1, val2 ==> ..., val1 + val2 */
+ if (iptr->dst->flags & INMEMORY) {
+ i386_mov_reg_membase(REG_RESULT, REG_SP, iptr->dst->regoff * 8);
- d = reg_of_var(iptr->dst, REG_FTMP3);
- i386_faddp();
- store_reg_to_var_flt(iptr->dst, d);
+ } else {
+ M_INTMOVE(REG_RESULT, d);
+ }
break;
- case ICMD_FSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
- case ICMD_DSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
+ case ICMD_D2I: /* ..., value ==> ..., (int) value */
- d = reg_of_var(iptr->dst, REG_FTMP3);
- i386_fsubp();
- store_reg_to_var_flt(iptr->dst, d);
- break;
+ var_to_reg_flt(s1, src, REG_FTMP1);
+ d = reg_of_var(iptr->dst, REG_ITMP1);
- case ICMD_FMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
- case ICMD_DMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
+ a = dseg_adds4(0x0e7f); /* Round to zero, 53-bit mode, exception masked */
+ i386_mov_imm_reg(0, REG_ITMP1);
+ dseg_adddata(mcodeptr);
+ i386_fldcw_membase(REG_ITMP1, a);
- d = reg_of_var(iptr->dst, REG_FTMP3);
- i386_fmulp();
- store_reg_to_var_flt(iptr->dst, d);
- break;
+ if (iptr->dst->flags & INMEMORY) {
+ i386_fistpl_membase(REG_SP, iptr->dst->regoff * 8);
+ fpu_st_offset--;
- case ICMD_FDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
- case ICMD_DDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
+ a = dseg_adds4(0x027f); /* Round to nearest, 53-bit mode, exceptions masked */
+ i386_fldcw_membase(REG_ITMP1, a);
- d = reg_of_var(iptr->dst, REG_FTMP3);
- i386_fdivp();
- store_reg_to_var_flt(iptr->dst, d);
- break;
+ i386_alu_imm_membase(I386_CMP, 0x80000000, REG_SP, iptr->dst->regoff * 8);
- case ICMD_FREM: /* ..., val1, val2 ==> ..., val1 % val2 */
- case ICMD_DREM: /* ..., val1, val2 ==> ..., val1 % val2 */
+ a = 3;
+ CALCOFFSETBYTES(a, src->regoff * 8);
+ a += 5 + 2 + 3;
+ CALCOFFSETBYTES(a, iptr->dst->regoff * 8);
- d = reg_of_var(iptr->dst, REG_FTMP3);
- i386_fprem1();
- store_reg_to_var_flt(iptr->dst, d);
- break;
+ } else {
+ a = dseg_adds4(0);
+ i386_fistpl_membase(REG_ITMP1, a);
+ fpu_st_offset--;
+ i386_mov_membase_reg(REG_ITMP1, a, iptr->dst->regoff);
- case ICMD_I2F: /* ..., value ==> ..., (float) value */
- case ICMD_I2D: /* ..., value ==> ..., (double) value */
+ a = dseg_adds4(0x027f); /* Round to nearest, 53-bit mode, exceptions masked */
+ i386_fldcw_membase(REG_ITMP1, a);
- d = reg_of_var(iptr->dst, REG_FTMP1);
- if (src->flags & INMEMORY) {
- i386_fildl_membase(REG_SP, src->regoff * 8);
+ i386_alu_imm_reg(I386_CMP, 0x80000000, iptr->dst->regoff);
- } else {
- a = dseg_adds4(0);
- i386_mov_imm_reg(0, REG_ITMP1);
- dseg_adddata(mcodeptr);
- i386_mov_reg_membase(src->regoff, REG_ITMP1, a);
- i386_fildl_membase(REG_ITMP1, a);
+ a = 3;
+ CALCOFFSETBYTES(a, src->regoff * 8);
+ a += 5 + 2 + ((REG_RESULT == d) ? 0 : 2);
}
- store_reg_to_var_flt(iptr->dst, d);
- break;
- case ICMD_L2F: /* ..., value ==> ..., (float) value */
- case ICMD_L2D: /* ..., value ==> ..., (double) value */
+ i386_jcc(I386_CC_NE, a);
- d = reg_of_var(iptr->dst, REG_FTMP1);
- if (src->flags & INMEMORY) {
- i386_fildll_membase(REG_SP, src->regoff * 8);
+ /* XXX: change this when we use registers */
+ i386_fldl_membase(REG_SP, src->regoff * 8);
+ i386_mov_imm_reg((s4) asm_builtin_d2i, REG_ITMP2);
+ i386_call_reg(REG_ITMP2);
+
+ if (iptr->dst->flags & INMEMORY) {
+ i386_mov_reg_membase(REG_RESULT, REG_SP, iptr->dst->regoff * 8);
} else {
- panic("longs have to be in memory");
+ M_INTMOVE(REG_RESULT, d);
}
- store_reg_to_var_flt(iptr->dst, d);
break;
-
- case ICMD_F2I: /* ..., value ==> ..., (int) value */
- case ICMD_D2I:
+ case ICMD_F2L: /* ..., value ==> ..., (long) value */
+
+ var_to_reg_flt(s1, src, REG_FTMP1);
d = reg_of_var(iptr->dst, REG_ITMP1);
+
+ a = dseg_adds4(0x0e7f); /* Round to zero, 53-bit mode, exception masked */
+ i386_mov_imm_reg(0, REG_ITMP1);
+ dseg_adddata(mcodeptr);
+ i386_fldcw_membase(REG_ITMP1, a);
+
if (iptr->dst->flags & INMEMORY) {
- i386_fistl_membase(REG_SP, iptr->dst->regoff * 8);
+ i386_fistpll_membase(REG_SP, iptr->dst->regoff * 8);
+ fpu_st_offset--;
+
+ a = dseg_adds4(0x027f); /* Round to nearest, 53-bit mode, exceptions masked */
+ i386_fldcw_membase(REG_ITMP1, a);
+
+ i386_alu_imm_membase(I386_CMP, 0x80000000, REG_SP, iptr->dst->regoff * 8 + 4);
+
+ a = 6 + 4;
+ CALCOFFSETBYTES(a, iptr->dst->regoff * 8);
+ a += 3;
+ CALCOFFSETBYTES(a, src->regoff * 8);
+ a += 5 + 2;
+ a += 3;
+ CALCOFFSETBYTES(a, iptr->dst->regoff * 8);
+ a += 3;
+ CALCOFFSETBYTES(a, iptr->dst->regoff * 8 + 4);
+
+ i386_jcc(I386_CC_NE, a);
+
+ i386_alu_imm_membase(I386_CMP, 0, REG_SP, iptr->dst->regoff * 8);
+
+ a = 3;
+ CALCOFFSETBYTES(a, src->regoff * 8);
+ a += 5 + 2 + 3;
+ CALCOFFSETBYTES(a, iptr->dst->regoff * 8);
+
+ i386_jcc(I386_CC_NE, a);
+
+ /* XXX: change this when we use registers */
+ i386_flds_membase(REG_SP, src->regoff * 8);
+ i386_mov_imm_reg((s4) asm_builtin_f2l, REG_ITMP2);
+ i386_call_reg(REG_ITMP2);
+ i386_mov_reg_membase(REG_RESULT, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_reg_membase(REG_RESULT2, REG_SP, iptr->dst->regoff * 8 + 4);
} else {
- a = dseg_adds4(0);
- i386_mov_imm_reg(0, REG_ITMP1);
- dseg_adddata(mcodeptr);
- i386_fistpl_membase(REG_ITMP1, a);
- i386_mov_membase_reg(REG_ITMP1, a, iptr->dst->regoff);
+ panic("F2L: longs have to be in memory");
}
break;
- case ICMD_F2L: /* ..., value ==> ..., (long) value */
- case ICMD_D2L:
+ case ICMD_D2L: /* ..., value ==> ..., (long) value */
+ var_to_reg_flt(s1, src, REG_FTMP1);
d = reg_of_var(iptr->dst, REG_ITMP1);
+
+ a = dseg_adds4(0x0e7f); /* Round to zero, 53-bit mode, exception masked */
+ i386_mov_imm_reg(0, REG_ITMP1);
+ dseg_adddata(mcodeptr);
+ i386_fldcw_membase(REG_ITMP1, a);
+
if (iptr->dst->flags & INMEMORY) {
i386_fistpll_membase(REG_SP, iptr->dst->regoff * 8);
+ fpu_st_offset--;
+
+ a = dseg_adds4(0x027f); /* Round to nearest, 53-bit mode, exceptions masked */
+ i386_fldcw_membase(REG_ITMP1, a);
+
+ i386_alu_imm_membase(I386_CMP, 0x80000000, REG_SP, iptr->dst->regoff * 8 + 4);
+
+ a = 6 + 4;
+ CALCOFFSETBYTES(a, iptr->dst->regoff * 8);
+ a += 3;
+ CALCOFFSETBYTES(a, src->regoff * 8);
+ a += 5 + 2;
+ a += 3;
+ CALCOFFSETBYTES(a, iptr->dst->regoff * 8);
+ a += 3;
+ CALCOFFSETBYTES(a, iptr->dst->regoff * 8 + 4);
+
+ i386_jcc(I386_CC_NE, a);
+
+ i386_alu_imm_membase(I386_CMP, 0, REG_SP, iptr->dst->regoff * 8);
+
+ a = 3;
+ CALCOFFSETBYTES(a, src->regoff * 8);
+ a += 5 + 2 + 3;
+ CALCOFFSETBYTES(a, iptr->dst->regoff * 8);
+
+ i386_jcc(I386_CC_NE, a);
+
+ /* XXX: change this when we use registers */
+ i386_fldl_membase(REG_SP, src->regoff * 8);
+ i386_mov_imm_reg((s4) asm_builtin_d2l, REG_ITMP2);
+ i386_call_reg(REG_ITMP2);
+ i386_mov_reg_membase(REG_RESULT, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_reg_membase(REG_RESULT2, REG_SP, iptr->dst->regoff * 8 + 4);
} else {
- panic("longs have to be in memory");
+ panic("D2L: longs have to be in memory");
}
break;
case ICMD_F2D: /* ..., value ==> ..., (double) value */
+ var_to_reg_flt(s1, src, REG_FTMP1);
+ d = reg_of_var(iptr->dst, REG_FTMP3);
/* nothing to do */
+ store_reg_to_var_flt(iptr->dst, d);
break;
case ICMD_D2F: /* ..., value ==> ..., (float) value */
+ var_to_reg_flt(s1, src, REG_FTMP1);
+ d = reg_of_var(iptr->dst, REG_FTMP3);
/* nothing to do */
+ store_reg_to_var_flt(iptr->dst, d);
break;
case ICMD_FCMPL: /* ..., val1, val2 ==> ..., val1 fcmpl val2 */
case ICMD_DCMPL:
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ /* exchanged to skip fxch */
+ var_to_reg_flt(s2, src->prev, REG_FTMP1);
+ var_to_reg_flt(s1, src, REG_FTMP2);
+ d = reg_of_var(iptr->dst, REG_ITMP2);
i386_alu_reg_reg(I386_XOR, d, d);
- i386_fucom();
+/* i386_fxch(); */
+ i386_fucompp();
+ fpu_st_offset -= 2;
i386_fnstsw();
- i386_sahf();
- i386_jcc(I386_CC_E, 6 + 1 + 5 + 1);
- i386_jcc(I386_CC_A, 1 + 5);
- i386_inc_reg(d);
- i386_jmp(1);
+ i386_test_imm_reg(0x400, I386_EAX); /* unordered treat as GT */
+ i386_jcc(I386_CC_E, 6);
+ i386_alu_imm_reg(I386_AND, 0x000000ff, I386_EAX);
+ i386_sahf();
+ i386_jcc(I386_CC_E, 6 + 1 + 5 + 1);
+ i386_jcc(I386_CC_B, 1 + 5);
i386_dec_reg(d);
+ i386_jmp_imm(1);
+ i386_inc_reg(d);
store_reg_to_var_int(iptr->dst, d);
break;
case ICMD_FCMPG: /* ..., val1, val2 ==> ..., val1 fcmpg val2 */
case ICMD_DCMPG:
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ /* exchanged to skip fxch */
+ var_to_reg_flt(s2, src->prev, REG_FTMP1);
+ var_to_reg_flt(s1, src, REG_FTMP2);
+ d = reg_of_var(iptr->dst, REG_ITMP2);
i386_alu_reg_reg(I386_XOR, d, d);
- i386_fucom();
+/* i386_fxch(); */
+ i386_fucompp();
+ fpu_st_offset -= 2;
i386_fnstsw();
- i386_sahf();
- i386_jcc(I386_CC_E, 6 + 1 + 5 + 1);
- i386_jcc(I386_CC_A, 1 + 5);
- i386_inc_reg(d);
- i386_jmp(1);
+ i386_test_imm_reg(0x400, I386_EAX); /* unordered treat as LT */
+ i386_jcc(I386_CC_E, 3);
+ i386_movb_imm_reg(1, I386_AH);
+ i386_sahf();
+ i386_jcc(I386_CC_E, 6 + 1 + 5 + 1);
+ i386_jcc(I386_CC_B, 1 + 5);
i386_dec_reg(d);
+ i386_jmp_imm(1);
+ i386_inc_reg(d);
store_reg_to_var_int(iptr->dst, d);
break;
/* memory operations **************************************************/
- /* #define gen_bound_check \
- if (checkbounds) {\
- M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
- M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
- M_BEQZ(REG_ITMP3, 0);\
- mcode_addxboundrefs(mcodeptr);\
- }
- */
-
#define gen_bound_check \
- if (checkbounds) { \
- i386_alu_reg_membase(I386_CMP, s2, s1, OFFSET(java_arrayheader, size)); \
- i386_jcc(I386_CC_L, 0); \
- mcode_addxboundrefs(mcodeptr); \
- }
+ if (checkbounds) { \
+ i386_alu_membase_reg(I386_CMP, s1, OFFSET(java_arrayheader, size), s2); \
+ i386_jcc(I386_CC_AE, 0); \
+ mcode_addxboundrefs(mcodeptr); \
+ }
case ICMD_ARRAYLENGTH: /* ..., arrayref ==> ..., length */
var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_ITMP2);
gen_nullptr_check(s1);
i386_mov_membase_reg(s1, OFFSET(java_arrayheader, size), d);
store_reg_to_var_int(iptr->dst, d);
var_to_reg_int(s1, src->prev, REG_ITMP1);
var_to_reg_int(s2, src, REG_ITMP2);
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_ITMP1);
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
}
if (iptr->dst->flags & INMEMORY) {
- i386_mov_memindex_reg(OFFSET(java_longarray, data[0]), s1, s2, 2, REG_ITMP3);
+ i386_mov_memindex_reg(OFFSET(java_longarray, data[0]), s1, s2, 3, REG_ITMP3);
i386_mov_reg_membase(REG_ITMP3, REG_SP, iptr->dst->regoff * 8);
- i386_mov_memindex_reg(OFFSET(java_longarray, data[0]) + 4, s1, s2, 2, REG_ITMP3);
+ i386_mov_memindex_reg(OFFSET(java_longarray, data[0]) + 4, s1, s2, 3, REG_ITMP3);
i386_mov_reg_membase(REG_ITMP3, REG_SP, iptr->dst->regoff * 8 + 4);
}
break;
var_to_reg_int(s1, src->prev, REG_ITMP1);
var_to_reg_int(s2, src, REG_ITMP2);
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_ITMP1);
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
var_to_reg_int(s1, src->prev, REG_ITMP1);
var_to_reg_int(s2, src, REG_ITMP2);
- d = reg_of_var(iptr->dst, REG_FTMP3);
+ d = reg_of_var(iptr->dst, REG_FTMP1);
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
i386_flds_memindex(OFFSET(java_floatarray, data[0]), s1, s2, 2);
+ fpu_st_offset++;
store_reg_to_var_flt(iptr->dst, d);
break;
gen_bound_check;
}
i386_fldl_memindex(OFFSET(java_doublearray, data[0]), s1, s2, 3);
+ fpu_st_offset++;
store_reg_to_var_flt(iptr->dst, d);
break;
var_to_reg_int(s1, src->prev, REG_ITMP1);
var_to_reg_int(s2, src, REG_ITMP2);
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_ITMP1);
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
var_to_reg_int(s1, src->prev, REG_ITMP1);
var_to_reg_int(s2, src, REG_ITMP2);
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_ITMP1);
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
var_to_reg_int(s1, src->prev, REG_ITMP1);
var_to_reg_int(s2, src, REG_ITMP2);
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_ITMP1);
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
}
- i386_movzbl_memindex_reg(OFFSET(java_bytearray, data[0]), s1, s2, 0, d);
-/* i386_alu_reg_reg(I386_XOR, REG_ITMP3, REG_ITMP3); */
-/* i386_movb_memindex_reg(OFFSET(java_bytearray, data[0]), s1, s2, 0, REG_ITMP3); */
-/* M_INTMOVE(REG_ITMP3, d); */
+ i386_movsbl_memindex_reg(OFFSET(java_bytearray, data[0]), s1, s2, 0, d);
store_reg_to_var_int(iptr->dst, d);
break;
if (src->flags & INMEMORY) {
i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP3);
- i386_mov_reg_memindex(REG_ITMP3, OFFSET(java_longarray, data[0]), s1, s2, 2);
+ i386_mov_reg_memindex(REG_ITMP3, OFFSET(java_longarray, data[0]), s1, s2, 3);
i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP3);
- i386_mov_reg_memindex(REG_ITMP3, OFFSET(java_longarray, data[0]) + 4, s1, s2, 2);
+ i386_mov_reg_memindex(REG_ITMP3, OFFSET(java_longarray, data[0]) + 4, s1, s2, 3);
}
break;
gen_nullptr_check(s1);
gen_bound_check;
}
+ var_to_reg_flt(s3, src, REG_FTMP1);
i386_fstps_memindex(OFFSET(java_floatarray, data[0]), s1, s2, 2);
+ fpu_st_offset--;
break;
case ICMD_DASTORE: /* ..., arrayref, index, value ==> ... */
gen_nullptr_check(s1);
gen_bound_check;
}
+ var_to_reg_flt(s3, src, REG_FTMP1);
i386_fstpl_memindex(OFFSET(java_doublearray, data[0]), s1, s2, 3);
+ fpu_st_offset--;
break;
case ICMD_CASTORE: /* ..., arrayref, index, value ==> ... */
if (iptr->op1 == 0) {
gen_nullptr_check(s1);
gen_bound_check;
- }
+ }
var_to_reg_int(s3, src, REG_ITMP3);
i386_movw_reg_memindex(s3, OFFSET(java_shortarray, data[0]), s1, s2, 1);
break;
/* here it's slightly slower */
i386_mov_imm_reg(0, REG_ITMP2);
dseg_adddata(mcodeptr);
- i386_mov_membase_reg(REG_ITMP2, a, REG_ITMP3);
+ i386_mov_membase_reg(REG_ITMP2, a, REG_ITMP2);
switch (iptr->op1) {
case TYPE_INT:
+ case TYPE_ADR:
var_to_reg_int(s2, src, REG_ITMP1);
- i386_mov_reg_membase(s2, REG_ITMP3, 0);
+ i386_mov_reg_membase(s2, REG_ITMP2, 0);
break;
case TYPE_LNG:
if (src->flags & INMEMORY) {
i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
- i386_mov_reg_membase(REG_ITMP1, REG_ITMP3, 0);
- i386_mov_reg_membase(REG_ITMP2, REG_ITMP3, 0 + 4);
+ i386_mov_reg_membase(REG_ITMP1, REG_ITMP2, 0);
+ i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_ITMP2, 0 + 4);
} else {
- panic("longs have to be in memory");
+ panic("PUTSTATIC: longs have to be in memory");
}
break;
- case TYPE_ADR:
- var_to_reg_int(s2, src, REG_ITMP1);
- i386_mov_reg_membase(s2, REG_ITMP3, 0);
- break;
case TYPE_FLT:
- if (src->flags & INMEMORY) {
- i386_flds_membase(REG_SP, src->regoff * 8);
- i386_fstps_membase(REG_ITMP3, 0);
- } else {
- panic("floats have to be in memory");
- }
+ var_to_reg_flt(s2, src, REG_FTMP1);
+ i386_fstps_membase(REG_ITMP2, 0);
+ fpu_st_offset--;
break;
case TYPE_DBL:
- if (src->flags & INMEMORY) {
- i386_fldl_membase(REG_SP, src->regoff * 8);
- i386_fstpl_membase(REG_ITMP3, 0);
- } else {
- panic("doubles have to be in memory");
- }
+ var_to_reg_flt(s2, src, REG_FTMP1);
+ i386_fstpl_membase(REG_ITMP2, 0);
+ fpu_st_offset--;
break;
default: panic ("internal error");
}
/* op1 = type, val.a = field address */
a = dseg_addaddress(&(((fieldinfo *)(iptr->val.a))->value));
- i386_mov_imm_reg(0, REG_ITMP1);
+ i386_mov_imm_reg(0, REG_ITMP2);
dseg_adddata(mcodeptr);
- i386_mov_membase_reg(REG_ITMP1, a, REG_ITMP1);
+ i386_mov_membase_reg(REG_ITMP2, a, REG_ITMP2);
switch (iptr->op1) {
case TYPE_INT:
- d = reg_of_var(iptr->dst, REG_ITMP3);
- i386_mov_membase_reg(REG_ITMP1, 0, d);
+ case TYPE_ADR:
+ d = reg_of_var(iptr->dst, REG_ITMP1);
+ i386_mov_membase_reg(REG_ITMP2, 0, d);
store_reg_to_var_int(iptr->dst, d);
break;
case TYPE_LNG:
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_NULL);
if (iptr->dst->flags & INMEMORY) {
- i386_mov_membase_reg(REG_ITMP1, 0, REG_ITMP2);
- i386_mov_membase_reg(REG_ITMP1, 4, REG_ITMP3);
- i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_ITMP3, REG_SP, iptr->dst->regoff * 8 + 4);
+ i386_mov_membase_reg(REG_ITMP2, 0, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_membase_reg(REG_ITMP2, 0 + 4, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8 + 4);
} else {
- panic("longs have to be in memory");
+ panic("GETSTATIC: longs have to be in memory");
}
break;
- case TYPE_ADR:
- d = reg_of_var(iptr->dst, REG_ITMP3);
- i386_mov_membase_reg(REG_ITMP1, 0, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
case TYPE_FLT:
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (iptr->dst->flags & INMEMORY) {
- i386_flds_membase(REG_ITMP1, 0);
- i386_fstps_membase(REG_SP, iptr->dst->regoff * 8);
- } else {
- panic("floats have to be in memory");
- }
+ d = reg_of_var(iptr->dst, REG_FTMP1);
+ i386_flds_membase(REG_ITMP2, 0);
+ fpu_st_offset++;
+ store_reg_to_var_flt(iptr->dst, d);
break;
case TYPE_DBL:
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (iptr->dst->flags & INMEMORY) {
- i386_fldl_membase(REG_ITMP1, 0);
- i386_fstpl_membase(REG_SP, iptr->dst->regoff * 8);
- } else {
- panic("doubles have to be in memory");
- }
+ d = reg_of_var(iptr->dst, REG_FTMP1);
+ i386_fldl_membase(REG_ITMP2, 0);
+ fpu_st_offset++;
+ store_reg_to_var_flt(iptr->dst, d);
break;
default: panic ("internal error");
}
a = ((fieldinfo *)(iptr->val.a))->offset;
switch (iptr->op1) {
case TYPE_INT:
+ case TYPE_ADR:
var_to_reg_int(s1, src->prev, REG_ITMP1);
var_to_reg_int(s2, src, REG_ITMP2);
gen_nullptr_check(s1);
gen_nullptr_check(s1);
if (src->flags & INMEMORY) {
i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP2);
- i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP3);
i386_mov_reg_membase(REG_ITMP2, s1, a);
- i386_mov_reg_membase(REG_ITMP3, s1, a + 4);
+ i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
+ i386_mov_reg_membase(REG_ITMP2, s1, a + 4);
} else {
- panic("longs have to be in memory");
+ panic("PUTFIELD: longs have to be in memory");
}
break;
- case TYPE_ADR:
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- gen_nullptr_check(s1);
- i386_mov_reg_membase(s2, s1, a);
- break;
case TYPE_FLT:
var_to_reg_int(s1, src->prev, REG_ITMP1);
+ var_to_reg_flt(s2, src, REG_FTMP1);
gen_nullptr_check(s1);
- if (src->flags & INMEMORY) {
- i386_fstps_membase(s1, a);
- } else {
- panic("floats have to be in memory");
- }
+ i386_fstps_membase(s1, a);
+ fpu_st_offset--;
break;
case TYPE_DBL:
var_to_reg_int(s1, src->prev, REG_ITMP1);
+ var_to_reg_flt(s2, src, REG_FTMP1);
gen_nullptr_check(s1);
- if (src->flags & INMEMORY) {
- i386_fstpl_membase(s1, a);
- } else {
- panic("doubles have to be in memory");
- }
+ i386_fstpl_membase(s1, a);
+ fpu_st_offset--;
break;
default: panic ("internal error");
}
a = ((fieldinfo *)(iptr->val.a))->offset;
switch (iptr->op1) {
case TYPE_INT:
+ case TYPE_ADR:
var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(iptr->dst, REG_ITMP3);
+ d = reg_of_var(iptr->dst, REG_ITMP2);
gen_nullptr_check(s1);
i386_mov_membase_reg(s1, a, d);
store_reg_to_var_int(iptr->dst, d);
break;
case TYPE_LNG:
var_to_reg_int(s1, src, REG_ITMP1);
-/* d = reg_of_var(iptr->dst, REG_ITMP3); */
+ d = reg_of_var(iptr->dst, REG_NULL);
gen_nullptr_check(s1);
i386_mov_membase_reg(s1, a, REG_ITMP2);
- i386_mov_membase_reg(s1, a + 4, REG_ITMP3);
i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_ITMP3, REG_SP, iptr->dst->regoff * 8 + 4);
-/* store_reg_to_var_int(iptr->dst, d); */
- break;
- case TYPE_ADR:
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(iptr->dst, REG_ITMP3);
- gen_nullptr_check(s1);
- i386_mov_membase_reg(s1, a, d);
- store_reg_to_var_int(iptr->dst, d);
+ i386_mov_membase_reg(s1, a + 4, REG_ITMP2);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
break;
case TYPE_FLT:
var_to_reg_int(s1, src, REG_ITMP1);
d = reg_of_var(iptr->dst, REG_FTMP1);
gen_nullptr_check(s1);
i386_flds_membase(s1, a);
-/* store_reg_to_var_flt(iptr->dst, d); */
+ fpu_st_offset++;
+ store_reg_to_var_flt(iptr->dst, d);
break;
case TYPE_DBL:
var_to_reg_int(s1, src, REG_ITMP1);
d = reg_of_var(iptr->dst, REG_FTMP1);
gen_nullptr_check(s1);
i386_fldl_membase(s1, a);
-/* store_reg_to_var_flt(iptr->dst, d); */
+ fpu_st_offset++;
+ store_reg_to_var_flt(iptr->dst, d);
break;
default: panic ("internal error");
}
var_to_reg_int(s1, src, REG_ITMP1);
M_INTMOVE(s1, REG_ITMP1_XPTR);
- i386_mov_imm_reg(asm_handle_exception, REG_ITMP2);
- i386_call_reg(REG_ITMP2);
- i386_nop(); /* nop ensures that XPC is less than the end */
- /* of basic block */
+
+ i386_call_imm(0); /* passing exception pointer */
+ i386_pop_reg(REG_ITMP2_XPC);
+
+ i386_mov_imm_reg((s4) asm_handle_exception, I386_EDI);
+ i386_jmp_reg(I386_EDI);
ALIGNCODENOP;
break;
case ICMD_GOTO: /* ... ==> ... */
/* op1 = target JavaVM pc */
- i386_jmp(0);
+ i386_jmp_imm(0);
mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
ALIGNCODENOP;
break;
case ICMD_JSR: /* ... ==> ... */
/* op1 = target JavaVM pc */
- i386_call_imm(0);
+ i386_call_imm(0);
mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
break;
case ICMD_RET: /* ... ==> ... */
/* op1 = local variable */
- i386_ret();
+ var = &(locals[iptr->op1][TYPE_ADR]);
+ var_to_reg_int(s1, var, REG_ITMP1);
+ i386_jmp_reg(s1);
break;
case ICMD_IFNULL: /* ..., value ==> ... */
i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
} else {
- i386_alu_imm_reg(I386_CMP, 0, src->regoff);
+ i386_test_reg_reg(src->regoff, src->regoff);
}
i386_jcc(I386_CC_E, 0);
mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
} else {
- i386_alu_imm_reg(I386_CMP, 0, src->regoff);
+ i386_test_reg_reg(src->regoff, src->regoff);
}
i386_jcc(I386_CC_NE, 0);
mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
}
}
i386_test_reg_reg(REG_ITMP1, REG_ITMP1);
- i386_jcc(I386_CC_NE, 0);
+ i386_jcc(I386_CC_E, 0);
mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
break;
/* TODO: optimize as in IF_LEQ */
if (src->flags & INMEMORY) {
- int offset;
i386_alu_imm_membase(I386_CMP, iptr->val.l >> 32, REG_SP, src->regoff * 8 + 4);
i386_jcc(I386_CC_L, 0);
mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
- offset = 4 + 6;
- if (src->regoff > 0) offset++;
- if (src->regoff > 31) offset += 3;
-
- i386_jcc(I386_CC_G, offset);
+ a = 3 + 6;
+ CALCREGOFFBYTES(a, src->regoff);
+ CALCIMMEDIATEBYTES(a, iptr->val.l);
+
+ i386_jcc(I386_CC_G, a);
i386_alu_imm_membase(I386_CMP, iptr->val.l, REG_SP, src->regoff * 8);
i386_jcc(I386_CC_B, 0);
/* TODO: optimize as in IF_LEQ */
if (src->flags & INMEMORY) {
- int offset;
i386_alu_imm_membase(I386_CMP, iptr->val.l >> 32, REG_SP, src->regoff * 8 + 4);
i386_jcc(I386_CC_L, 0);
mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
- offset = 4 + 6;
- if (src->regoff > 0) offset++;
- if (src->regoff > 31) offset += 3;
+ a = 3 + 6;
+ CALCREGOFFBYTES(a, src->regoff);
+ CALCIMMEDIATEBYTES(a, iptr->val.l);
- i386_jcc(I386_CC_G, offset);
+ i386_jcc(I386_CC_G, a);
i386_alu_imm_membase(I386_CMP, iptr->val.l, REG_SP, src->regoff * 8);
i386_jcc(I386_CC_BE, 0);
/* TODO: optimize as in IF_LEQ */
if (src->flags & INMEMORY) {
- int offset;
i386_alu_imm_membase(I386_CMP, iptr->val.l >> 32, REG_SP, src->regoff * 8 + 4);
i386_jcc(I386_CC_G, 0);
mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
- offset = 4 + 6;
- if (src->regoff > 0) offset++;
- if (src->regoff > 31) offset += 3;
- if ((iptr->val.l & 0x00000000ffffffff) < -128 || (iptr->val.l & 0x00000000ffffffff) > 127) offset += 3;
+ a = 3 + 6;
+ CALCREGOFFBYTES(a, src->regoff);
+ CALCIMMEDIATEBYTES(a, iptr->val.l);
- i386_jcc(I386_CC_L, offset);
+ i386_jcc(I386_CC_L, a);
i386_alu_imm_membase(I386_CMP, iptr->val.l, REG_SP, src->regoff * 8);
i386_jcc(I386_CC_A, 0);
/* TODO: optimize as in IF_LEQ */
if (src->flags & INMEMORY) {
- int offset;
i386_alu_imm_membase(I386_CMP, iptr->val.l >> 32, REG_SP, src->regoff * 8 + 4);
i386_jcc(I386_CC_G, 0);
mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
- offset = 4 + 6;
- if (src->regoff > 0) offset++;
- if (src->regoff > 31) offset += 3;
+ a = 3 + 6;
+ CALCREGOFFBYTES(a, src->regoff);
+ CALCIMMEDIATEBYTES(a, iptr->val.l);
- i386_jcc(I386_CC_L, offset);
+ i386_jcc(I386_CC_L, a);
i386_alu_imm_membase(I386_CMP, iptr->val.l, REG_SP, src->regoff * 8);
i386_jcc(I386_CC_AE, 0);
case ICMD_IF_ICMPNE: /* ..., value, value ==> ... */
case ICMD_IF_ACMPNE: /* op1 = target JavaVM pc */
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8);
+ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8);
+
+ } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
+ i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff);
+
+ } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8);
+
+ } else {
+ i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff);
+ }
+ i386_jcc(I386_CC_NE, 0);
+ mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+ break;
+
+ case ICMD_IF_LCMPNE: /* ..., value, value ==> ... */
+ /* op1 = target JavaVM pc */
+
+ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
+ i386_alu_membase_reg(I386_XOR, REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_alu_membase_reg(I386_XOR, REG_SP, src->regoff * 8 + 4, REG_ITMP2);
+ i386_alu_reg_reg(I386_OR, REG_ITMP2, REG_ITMP1);
+ i386_test_reg_reg(REG_ITMP1, REG_ITMP1);
+ }
+ i386_jcc(I386_CC_NE, 0);
+ mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+ break;
+
+ case ICMD_IF_ICMPLT: /* ..., value, value ==> ... */
+ /* op1 = target JavaVM pc */
+
+ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8);
+
+ } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
+ i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff);
+
+ } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8);
+
+ } else {
+ i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff);
+ }
+ i386_jcc(I386_CC_L, 0);
+ mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+ break;
+
+ case ICMD_IF_LCMPLT: /* ..., value, value ==> ... */
+ /* op1 = target JavaVM pc */
+
+ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1);
+ i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1);
+ i386_jcc(I386_CC_L, 0);
+ mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+
+ a = 3 + 3 + 6;
+ CALCREGOFFBYTES(a, src->prev->regoff);
+ CALCREGOFFBYTES(a, src->regoff);
+
+ i386_jcc(I386_CC_G, a);
+
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_jcc(I386_CC_B, 0);
+ mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+ }
+ break;
+
+ case ICMD_IF_ICMPGT: /* ..., value, value ==> ... */
+ /* op1 = target JavaVM pc */
+
+ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8);
+
+ } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
+ i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff);
+
+ } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8);
+
+ } else {
+ i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff);
+ }
+ i386_jcc(I386_CC_G, 0);
+ mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+ break;
+
+ case ICMD_IF_LCMPGT: /* ..., value, value ==> ... */
+ /* op1 = target JavaVM pc */
+
+ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1);
+ i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1);
+ i386_jcc(I386_CC_G, 0);
+ mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+
+ a = 3 + 3 + 6;
+ CALCREGOFFBYTES(a, src->prev->regoff);
+ CALCREGOFFBYTES(a, src->regoff);
+
+ i386_jcc(I386_CC_L, a);
+
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_jcc(I386_CC_A, 0);
+ mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+ }
+ break;
+
+ case ICMD_IF_ICMPLE: /* ..., value, value ==> ... */
+ /* op1 = target JavaVM pc */
+
+ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8);
+
+ } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
+ i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff);
+
+ } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8);
+
+ } else {
+ i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff);
+ }
+ i386_jcc(I386_CC_LE, 0);
+ mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+ break;
+
+ case ICMD_IF_LCMPLE: /* ..., value, value ==> ... */
+ /* op1 = target JavaVM pc */
+
+ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1);
+ i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1);
+ i386_jcc(I386_CC_L, 0);
+ mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+
+ a = 3 + 3 + 6;
+ CALCREGOFFBYTES(a, src->prev->regoff);
+ CALCREGOFFBYTES(a, src->regoff);
+
+ i386_jcc(I386_CC_G, a);
+
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_jcc(I386_CC_BE, 0);
+ mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+ }
+ break;
+
+ case ICMD_IF_ICMPGE: /* ..., value, value ==> ... */
+ /* op1 = target JavaVM pc */
+
+ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8);
+
+ } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
+ i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff);
+
+ } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8);
+
+ } else {
+ i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff);
+ }
+ i386_jcc(I386_CC_GE, 0);
+ mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+ break;
+
+ case ICMD_IF_LCMPGE: /* ..., value, value ==> ... */
+ /* op1 = target JavaVM pc */
+
+ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1);
+ i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1);
+ i386_jcc(I386_CC_G, 0);
+ mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+
+ a = 3 + 3 + 6;
+ CALCREGOFFBYTES(a, src->prev->regoff);
+ CALCREGOFFBYTES(a, src->regoff);
+
+ i386_jcc(I386_CC_L, a);
+
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_jcc(I386_CC_AE, 0);
+ mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+ }
+ break;
+
+ /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST */
+
+ case ICMD_ELSE_ICONST: /* handled by IFxx_ICONST */
+ break;
+
+ case ICMD_IFEQ_ICONST: /* ..., value ==> ..., constant */
+ /* val.i = constant */
+
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ifcc_iconst(I386_CC_NE, src, iptr);
+ break;
+
+ case ICMD_IFNE_ICONST: /* ..., value ==> ..., constant */
+ /* val.i = constant */
+
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ifcc_iconst(I386_CC_E, src, iptr);
+ break;
+
+ case ICMD_IFLT_ICONST: /* ..., value ==> ..., constant */
+ /* val.i = constant */
+
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ifcc_iconst(I386_CC_GE, src, iptr);
+ break;
+
+ case ICMD_IFGE_ICONST: /* ..., value ==> ..., constant */
+ /* val.i = constant */
+
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ifcc_iconst(I386_CC_L, src, iptr);
+ break;
+
+ case ICMD_IFGT_ICONST: /* ..., value ==> ..., constant */
+ /* val.i = constant */
+
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ifcc_iconst(I386_CC_LE, src, iptr);
+ break;
+
+ case ICMD_IFLE_ICONST: /* ..., value ==> ..., constant */
+ /* val.i = constant */
+
+ d = reg_of_var(iptr->dst, REG_NULL);
+ i386_emit_ifcc_iconst(I386_CC_G, src, iptr);
+ break;
+
+
+ case ICMD_IRETURN: /* ..., retvalue ==> ... */
+ case ICMD_ARETURN:
+
+#ifdef USE_THREADS
+ if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
+ i386_mov_membase_reg(REG_SP, 8 * maxmemuse, REG_ITMP1);
+ i386_alu_imm_reg(I386_SUB, 4, REG_SP);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, 0);
+ i386_mov_imm_reg((s4) builtin_monitorexit, REG_ITMP1);
+ i386_call_reg(REG_ITMP1);
+ i386_alu_imm_reg(I386_ADD, 4, REG_SP);
+ }
+#endif
+ var_to_reg_int(s1, src, REG_RESULT);
+ M_INTMOVE(s1, REG_RESULT);
+ goto nowperformreturn;
+
+ case ICMD_LRETURN: /* ..., retvalue ==> ... */
+
+#ifdef USE_THREADS
+ if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
+ i386_mov_membase_reg(REG_SP, 8 * maxmemuse, REG_ITMP1);
+ i386_alu_imm_reg(I386_SUB, 4, REG_SP);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, 0);
+ i386_mov_imm_reg((s4) builtin_monitorexit, REG_ITMP1);
+ i386_call_reg(REG_ITMP1);
+ i386_alu_imm_reg(I386_ADD, 4, REG_SP);
+ }
+#endif
+ if (src->flags & INMEMORY) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_RESULT);
+ i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_RESULT2);
+
+ } else {
+ panic("LRETURN: longs have to be in memory");
+ }
+ goto nowperformreturn;
+
+ case ICMD_FRETURN: /* ..., retvalue ==> ... */
+
+#ifdef USE_THREADS
+ if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
+ i386_mov_membase_reg(REG_SP, 8 * maxmemuse, REG_ITMP1);
+ i386_alu_imm_reg(I386_SUB, 4, REG_SP);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, 0);
+ i386_mov_imm_reg((s4) builtin_monitorexit, REG_ITMP1);
+ i386_call_reg(REG_ITMP1);
+ i386_alu_imm_reg(I386_ADD, 4, REG_SP);
+ }
+#endif
+ var_to_reg_flt(s1, src, REG_FRESULT);
+ /* this may be an early return -- keep the offset correct for the remaining code */
+ fpu_st_offset--;
+ goto nowperformreturn;
+
+ case ICMD_DRETURN: /* ..., retvalue ==> ... */
+
+#ifdef USE_THREADS
+ if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
+ i386_mov_membase_reg(REG_SP, 8 * maxmemuse, REG_ITMP1);
+ i386_alu_imm_reg(I386_SUB, 4, REG_SP);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, 0);
+ i386_mov_imm_reg((s4) builtin_monitorexit, REG_ITMP1);
+ i386_call_reg(REG_ITMP1);
+ i386_alu_imm_reg(I386_ADD, 4, REG_SP);
+ }
+#endif
+ var_to_reg_flt(s1, src, REG_FRESULT);
+ /* this may be an early return -- keep the offset correct for the remaining code */
+ fpu_st_offset--;
+ goto nowperformreturn;
+
+ case ICMD_RETURN: /* ... ==> ... */
+
+#ifdef USE_THREADS
+ if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
+ i386_mov_membase_reg(REG_SP, 8 * maxmemuse, REG_ITMP1);
+ i386_alu_imm_reg(I386_SUB, 4, REG_SP);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, 0);
+ i386_mov_imm_reg((s4) builtin_monitorexit, REG_ITMP1);
+ i386_call_reg(REG_ITMP1);
+ i386_alu_imm_reg(I386_ADD, 4, REG_SP);
+ }
+#endif
+
+nowperformreturn:
+ {
+ int r, p;
+
+ p = parentargs_base;
+
+ /* restore saved registers */
+ for (r = savintregcnt - 1; r >= maxsavintreguse; r--) {
+ p--;
+ i386_mov_membase_reg(REG_SP, p * 8, savintregs[r]);
+ }
+ for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--) {
+ p--;
+ i386_fldl_membase(REG_SP, p * 8);
+ fpu_st_offset++;
+ if (iptr->opc == ICMD_FRETURN || iptr->opc == ICMD_DRETURN) {
+ i386_fstp_reg(savfltregs[r] + fpu_st_offset + 1);
+ } else {
+ i386_fstp_reg(savfltregs[r] + fpu_st_offset);
+ }
+ fpu_st_offset--;
+ }
+
+ /* deallocate stack */
+ if (parentargs_base) {
+ i386_alu_imm_reg(I386_ADD, parentargs_base * 8, REG_SP);
+ }
+
+ /* call trace function */
+ if (runverbose) {
+ i386_alu_imm_reg(I386_SUB, 4 + 8 + 8 + 4, REG_SP);
+
+ i386_mov_imm_membase((s4) method, REG_SP, 0);
+
+ i386_mov_reg_membase(REG_RESULT, REG_SP, 4);
+ i386_mov_reg_membase(REG_RESULT2, REG_SP, 4 + 4);
+
+ i386_fstl_membase(REG_SP, 4 + 8);
+ i386_fsts_membase(REG_SP, 4 + 8 + 8);
+
+ i386_mov_imm_reg((s4) builtin_displaymethodstop, REG_ITMP1);
+/* i386_mov_imm_reg(asm_builtin_exittrace, REG_ITMP1); */
+ i386_call_reg(REG_ITMP1);
+
+ i386_mov_membase_reg(REG_SP, 4, REG_RESULT);
+ i386_mov_membase_reg(REG_SP, 4 + 4, REG_RESULT2);
+
+ i386_alu_imm_reg(I386_ADD, 4 + 8 + 8 + 4, REG_SP);
+ }
+
+ i386_ret();
+ ALIGNCODENOP;
+ }
+ break;
+
+
+ case ICMD_TABLESWITCH: /* ..., index ==> ... */
+ {
+ s4 i, l, *s4ptr;
+ void **tptr;
+
+ tptr = (void **) iptr->target;
+
+ s4ptr = iptr->val.a;
+ l = s4ptr[1]; /* low */
+ i = s4ptr[2]; /* high */
+
+ var_to_reg_int(s1, src, REG_ITMP1);
+ M_INTMOVE(s1, REG_ITMP1);
+ if (l != 0) {
+ i386_alu_imm_reg(I386_SUB, l, REG_ITMP1);
+ }
+ i = i - l + 1;
+
+ /* range check */
+
+ i386_alu_imm_reg(I386_CMP, i - 1, REG_ITMP1);
+ i386_jcc(I386_CC_A, 0);
+
+ /* mcode_addreference(BlockPtrOfPC(s4ptr[0]), mcodeptr); */
+ mcode_addreference((basicblock *) tptr[0], mcodeptr);
+
+ /* build jump table top down and use address of lowest entry */
+
+ /* s4ptr += 3 + i; */
+ tptr += i;
+
+ while (--i >= 0) {
+ /* dseg_addtarget(BlockPtrOfPC(*--s4ptr)); */
+ dseg_addtarget((basicblock *) tptr[0]);
+ --tptr;
+ }
+
+ /* length of dataseg after last dseg_addtarget is used by load */
+
+ i386_mov_imm_reg(0, REG_ITMP2);
+ dseg_adddata(mcodeptr);
+ i386_mov_memindex_reg(-dseglen, REG_ITMP2, REG_ITMP1, 2, REG_ITMP1);
+ i386_jmp_reg(REG_ITMP1);
+ ALIGNCODENOP;
+ }
+ break;
+
+
+ case ICMD_LOOKUPSWITCH: /* ..., key ==> ... */
+ {
+ s4 i, l, val, *s4ptr;
+ void **tptr;
+
+ tptr = (void **) iptr->target;
+
+ s4ptr = iptr->val.a;
+ l = s4ptr[0]; /* default */
+ i = s4ptr[1]; /* count */
+
+ MCODECHECK((i<<2)+8);
+ var_to_reg_int(s1, src, REG_ITMP1); /* reg compare should always be faster */
+ while (--i >= 0) {
+ s4ptr += 2;
+ ++tptr;
+
+ val = s4ptr[0];
+ i386_alu_imm_reg(I386_CMP, val, s1);
+ i386_jcc(I386_CC_E, 0);
+ /* mcode_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr); */
+ mcode_addreference((basicblock *) tptr[0], mcodeptr);
+ }
+
+ i386_jmp_imm(0);
+ /* mcode_addreference(BlockPtrOfPC(l), mcodeptr); */
+
+ tptr = (void **) iptr->target;
+ mcode_addreference((basicblock *) tptr[0], mcodeptr);
+
+ ALIGNCODENOP;
+ }
+ break;
+
+
+ case ICMD_BUILTIN3: /* ..., arg1, arg2, arg3 ==> ... */
+ /* op1 = return type, val.a = function pointer*/
+ s3 = 3;
+ goto gen_method;
+
+ case ICMD_BUILTIN2: /* ..., arg1, arg2 ==> ... */
+ /* op1 = return type, val.a = function pointer*/
+ s3 = 2;
+ goto gen_method;
+
+ case ICMD_BUILTIN1: /* ..., arg1 ==> ... */
+ /* op1 = return type, val.a = function pointer*/
+ s3 = 1;
+ goto gen_method;
+
+ case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ... */
+ /* op1 = arg count, val.a = method pointer */
+
+ case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
+ /* op1 = arg count, val.a = method pointer */
+
+ case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
+ /* op1 = arg count, val.a = method pointer */
+
+ case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
+ /* op1 = arg count, val.a = method pointer */
+
+ s3 = iptr->op1;
+
+gen_method: {
+ methodinfo *m;
+ classinfo *ci;
+
+ MCODECHECK((s3 << 1) + 64);
+
+ /* copy arguments to registers or stack location */
+
+ for (; --s3 >= 0; src = src->prev) {
+ if (src->varkind == ARGVAR) {
+ continue;
+ }
+
+ if (IS_INT_LNG_TYPE(src->type)) {
+ if (s3 < intreg_argnum) {
+ panic("No integer argument registers available!");
+
+ } else {
+ if (!IS_2_WORD_TYPE(src->type)) {
+ if (src->flags & INMEMORY) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, s3 * 8);
+
+ } else {
+ i386_mov_reg_membase(src->regoff, REG_SP, s3 * 8);
+ }
+
+ } else {
+ if (src->flags & INMEMORY) {
+ M_LNGMEMMOVE(src->regoff, s3);
+
+ } else {
+ panic("copy arguments: longs have to be in memory");
+ }
+ }
+ }
+
+ } else {
+ if (s3 < fltreg_argnum) {
+ panic("No float argument registers available!");
+
+ } else {
+ var_to_reg_flt(d, src, REG_FTMP1);
+ if (src->type == TYPE_FLT) {
+ i386_fstps_membase(REG_SP, s3 * 8);
+
+ } else {
+ i386_fstpl_membase(REG_SP, s3 * 8);
+ }
+ }
+ }
+ } /* end of for */
+
+ m = iptr->val.a;
+ switch (iptr->opc) {
+ case ICMD_BUILTIN3:
+ case ICMD_BUILTIN2:
+ case ICMD_BUILTIN1:
+
+ a = (s4) m;
+ d = iptr->op1;
+
+ i386_mov_imm_reg(a, REG_ITMP1);
+ i386_call_reg(REG_ITMP1);
+ break;
+
+ case ICMD_INVOKESTATIC:
+
+ a = (s4) m->stubroutine;
+ d = m->returntype;
+
+ i386_mov_imm_reg(a, REG_ITMP2);
+ i386_call_reg(REG_ITMP2);
+ break;
+
+ case ICMD_INVOKESPECIAL:
+
+ a = (s4) m->stubroutine;
+ d = m->returntype;
+
+ i386_mov_membase_reg(REG_SP, 0, REG_ITMP1);
+ gen_nullptr_check(REG_ITMP1);
+ i386_mov_membase_reg(REG_ITMP1, 0, REG_ITMP1); /* access memory for hardware nullptr */
+
+ i386_mov_imm_reg(a, REG_ITMP2);
+ i386_call_reg(REG_ITMP2);
+ break;
+
+ case ICMD_INVOKEVIRTUAL:
+
+ d = m->returntype;
+
+ i386_mov_membase_reg(REG_SP, 0, REG_ITMP1);
+ gen_nullptr_check(REG_ITMP1);
+ i386_mov_membase_reg(REG_ITMP1, OFFSET(java_objectheader, vftbl), REG_ITMP2);
+ i386_mov_membase32_reg(REG_ITMP2, OFFSET(vftbl, table[0]) + sizeof(methodptr) * m->vftblindex, REG_ITMP1);
+
+ i386_call_reg(REG_ITMP1);
+ break;
+
+ case ICMD_INVOKEINTERFACE:
+
+ ci = m->class;
+ d = m->returntype;
+
+ i386_mov_membase_reg(REG_SP, 0, REG_ITMP1);
+ gen_nullptr_check(REG_ITMP1);
+ i386_mov_membase_reg(REG_ITMP1, OFFSET(java_objectheader, vftbl), REG_ITMP1);
+ i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, interfacetable[0]) - sizeof(methodptr) * ci->index, REG_ITMP2);
+ i386_mov_membase32_reg(REG_ITMP2, sizeof(methodptr) * (m - ci->methods), REG_ITMP1);
+
+ i386_call_reg(REG_ITMP1);
+ break;
+
+ default:
+ d = 0;
+ sprintf(logtext, "Unkown ICMD-Command: %d", iptr->opc);
+ error();
+ }
+
+ /* d contains return type */
+
+ if (d != TYPE_VOID) {
+ d = reg_of_var(iptr->dst, REG_NULL);
+
+ if (IS_INT_LNG_TYPE(iptr->dst->type)) {
+ if (IS_2_WORD_TYPE(iptr->dst->type)) {
+ if (iptr->dst->flags & INMEMORY) {
+ i386_mov_reg_membase(REG_RESULT, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_reg_membase(REG_RESULT2, REG_SP, iptr->dst->regoff * 8 + 4);
+
+ } else {
+ panic("RETURN: longs have to be in memory");
+ }
+
+ } else {
+ if (iptr->dst->flags & INMEMORY) {
+ i386_mov_reg_membase(REG_RESULT, REG_SP, iptr->dst->regoff * 8);
+
+ } else {
+ M_INTMOVE(REG_RESULT, iptr->dst->regoff);
+ }
+ }
+
+ } else {
+ /* fld from called function -- has other fpu_st_offset counter */
+ fpu_st_offset++;
+ store_reg_to_var_flt(iptr->dst, d);
+ }
+ }
+ }
+ break;
+
+
+ case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult */
+
+ /* op1: 0 == array, 1 == class */
+ /* val.a: (classinfo*) superclass */
+
+/* superclass is an interface:
+ *
+ * return (sub != NULL) &&
+ * (sub->vftbl->interfacetablelength > super->index) &&
+ * (sub->vftbl->interfacetable[-super->index] != NULL);
+ *
+ * superclass is a class:
+ *
+ * return ((sub != NULL) && (0
+ * <= (sub->vftbl->baseval - super->vftbl->baseval) <=
+ * super->vftbl->diffvall));
+ */
+
+ {
+ classinfo *super = (classinfo*) iptr->val.a;
+
+ var_to_reg_int(s1, src, REG_ITMP1);
+ d = reg_of_var(iptr->dst, REG_ITMP3);
+ if (s1 == d) {
+ M_INTMOVE(s1, REG_ITMP1);
+ s1 = REG_ITMP1;
+ }
+ i386_alu_reg_reg(I386_XOR, d, d);
+ if (iptr->op1) { /* class/interface */
+ if (super->flags & ACC_INTERFACE) { /* interface */
+ i386_test_reg_reg(s1, s1);
+
+ /* TODO: clean up this calculation */
+ a = 2;
+ CALCOFFSETBYTES(a, OFFSET(java_objectheader, vftbl));
+
+ a += 2;
+ CALCOFFSETBYTES(a, OFFSET(vftbl, interfacetablelength));
+
+ a += 2;
+ CALCOFFSETBYTES(a, super->index);
+
+ a += 3;
+ a += 6;
+
+ a += 2;
+ CALCOFFSETBYTES(a, OFFSET(vftbl, interfacetable[0]) - super->index * sizeof(methodptr*));
+
+ a += 3;
+
+ a += 6; /* jcc */
+ a += 5;
+
+ i386_jcc(I386_CC_E, a);
+
+ i386_mov_membase_reg(s1, OFFSET(java_objectheader, vftbl), REG_ITMP1);
+ i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, interfacetablelength), REG_ITMP2);
+ i386_alu_imm_reg(I386_SUB, super->index, REG_ITMP2);
+ /* TODO: test */
+ i386_alu_imm_reg(I386_CMP, 0, REG_ITMP2);
+
+ /* TODO: clean up this calculation */
+ a = 0;
+ a += 2;
+ CALCOFFSETBYTES(a, OFFSET(vftbl, interfacetable[0]) - super->index * sizeof(methodptr*));
+
+ a += 3;
+
+ a += 6; /* jcc */
+ a += 5;
+
+ i386_jcc(I386_CC_LE, a);
+ i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, interfacetable[0]) - super->index * sizeof(methodptr*), REG_ITMP1);
+ /* TODO: test */
+ i386_alu_imm_reg(I386_CMP, 0, REG_ITMP1);
+/* i386_setcc_reg(I386_CC_A, d); */
+/* i386_jcc(I386_CC_BE, 5); */
+ i386_jcc(I386_CC_E, 5);
+ i386_mov_imm_reg(1, d);
+
+
+ } else { /* class */
+ i386_test_reg_reg(s1, s1);
+
+ /* TODO: clean up this calculation */
+ a = 2;
+ CALCOFFSETBYTES(a, OFFSET(java_objectheader, vftbl));
+ a += 5;
+ a += 2;
+ CALCOFFSETBYTES(a, OFFSET(vftbl, baseval));
+ a += 2;
+ CALCOFFSETBYTES(a, OFFSET(vftbl, baseval));
+
+ a += 2;
+ CALCOFFSETBYTES(a, OFFSET(vftbl, diffval));
+
+ a += 2;
+ a += 2; /* xor */
+
+ a += 2;
+
+ a += 6; /* jcc */
+ a += 5;
+
+ i386_jcc(I386_CC_E, a);
+
+ i386_mov_membase_reg(s1, OFFSET(java_objectheader, vftbl), REG_ITMP1);
+ i386_mov_imm_reg((s4) super->vftbl, REG_ITMP2);
+ i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, baseval), REG_ITMP1);
+ i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, baseval), REG_ITMP3);
+ i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, diffval), REG_ITMP2);
+ i386_alu_reg_reg(I386_SUB, REG_ITMP3, REG_ITMP1);
+ i386_alu_reg_reg(I386_XOR, d, d);
+ i386_alu_reg_reg(I386_CMP, REG_ITMP2, REG_ITMP1);
+ i386_jcc(I386_CC_A, 5);
+ i386_mov_imm_reg(1, d);
+ }
+ }
+ else
+ panic ("internal error: no inlined array instanceof");
+ }
+ store_reg_to_var_int(iptr->dst, d);
+ break;
+
+ case ICMD_CHECKCAST: /* ..., objectref ==> ..., objectref */
+
+ /* op1: 0 == array, 1 == class */
+ /* val.a: (classinfo*) superclass */
+
+/* superclass is an interface:
+ *
+ * OK if ((sub == NULL) ||
+ * (sub->vftbl->interfacetablelength > super->index) &&
+ * (sub->vftbl->interfacetable[-super->index] != NULL));
+ *
+ * superclass is a class:
+ *
+ * OK if ((sub == NULL) || (0
+ * <= (sub->vftbl->baseval - super->vftbl->baseval) <=
+ * super->vftbl->diffvall));
+ */
+
+ {
+ classinfo *super = (classinfo*) iptr->val.a;
+
+ d = reg_of_var(iptr->dst, REG_ITMP3);
+ var_to_reg_int(s1, src, d);
+ if (iptr->op1) { /* class/interface */
+ if (super->flags & ACC_INTERFACE) { /* interface */
+ i386_test_reg_reg(s1, s1);
+
+ /* TODO: clean up this calculation */
+ a = 2;
+ CALCOFFSETBYTES(a, OFFSET(java_objectheader, vftbl));
+
+ a += 2;
+ CALCOFFSETBYTES(a, OFFSET(vftbl, interfacetablelength));
+
+ a += 2;
+ CALCOFFSETBYTES(a, super->index);
+
+ a += 3;
+ a += 6;
+
+ a += 2;
+ CALCOFFSETBYTES(a, OFFSET(vftbl, interfacetable[0]) - super->index * sizeof(methodptr*));
+
+ a += 3;
+ a += 6;
+
+ i386_jcc(I386_CC_E, a);
+
+ i386_mov_membase_reg(s1, OFFSET(java_objectheader, vftbl), REG_ITMP1);
+ i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, interfacetablelength), REG_ITMP2);
+ i386_alu_imm_reg(I386_SUB, super->index, REG_ITMP2);
+ /* TODO: test */
+ i386_alu_imm_reg(I386_CMP, 0, REG_ITMP2);
+ i386_jcc(I386_CC_LE, 0);
+ mcode_addxcastrefs(mcodeptr);
+ i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, interfacetable[0]) - super->index * sizeof(methodptr*), REG_ITMP2);
+ /* TODO: test */
+ i386_alu_imm_reg(I386_CMP, 0, REG_ITMP2);
+ i386_jcc(I386_CC_E, 0);
+ mcode_addxcastrefs(mcodeptr);
+
+ } else { /* class */
+ i386_test_reg_reg(s1, s1);
+
+ /* TODO: clean up this calculation */
+ a = 2;
+ CALCOFFSETBYTES(a, OFFSET(java_objectheader, vftbl));
+
+ a += 5;
+
+ a += 2;
+ CALCOFFSETBYTES(a, OFFSET(vftbl, baseval));
+
+ if (d != REG_ITMP3) {
+ a += 2;
+ CALCOFFSETBYTES(a, OFFSET(vftbl, baseval));
+
+ a += 2;
+ CALCOFFSETBYTES(a, OFFSET(vftbl, diffval));
+
+ a += 2;
+
+ } else {
+ a += 2;
+ CALCOFFSETBYTES(a, OFFSET(vftbl, baseval));
+
+ a += 2;
+
+ a += 5;
+
+ a += 2;
+ CALCOFFSETBYTES(a, OFFSET(vftbl, diffval));
+ }
+
+ a += 2;
+
+ a += 6;
+
+ i386_jcc(I386_CC_E, a);
+
+ i386_mov_membase_reg(s1, OFFSET(java_objectheader, vftbl), REG_ITMP1);
+ i386_mov_imm_reg((s4) super->vftbl, REG_ITMP2);
+ i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, baseval), REG_ITMP1);
+ if (d != REG_ITMP3) {
+ i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, baseval), REG_ITMP3);
+ i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, diffval), REG_ITMP2);
+ i386_alu_reg_reg(I386_SUB, REG_ITMP3, REG_ITMP1);
+
+ } else {
+ i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, baseval), REG_ITMP2);
+ i386_alu_reg_reg(I386_SUB, REG_ITMP2, REG_ITMP1);
+ i386_mov_imm_reg((s4) super->vftbl, REG_ITMP2);
+ i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, diffval), REG_ITMP2);
+ }
+ i386_alu_reg_reg(I386_CMP, REG_ITMP2, REG_ITMP1);
+ i386_jcc(I386_CC_A, 0); /* (u) REG_ITMP1 > (u) REG_ITMP2 -> jump */
+ mcode_addxcastrefs(mcodeptr);
+ }
+
+ } else
+ panic ("internal error: no inlined array checkcast");
+ }
+ M_INTMOVE(s1, d);
+ store_reg_to_var_int(iptr->dst, d);
+ break;
+
+ case ICMD_CHECKASIZE: /* ..., size ==> ..., size */
+
+ if (src->flags & INMEMORY) {
+ i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
+
+ } else {
+ i386_test_reg_reg(src->regoff, src->regoff);
+ }
+ i386_jcc(I386_CC_L, 0);
+ mcode_addxcheckarefs(mcodeptr);
+ break;
+
+ case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref */
+ /* op1 = dimension, val.a = array descriptor */
+
+ /* check for negative sizes and copy sizes to stack if necessary */
+
+ MCODECHECK((iptr->op1 << 1) + 64);
+
+ for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
+ if (src->flags & INMEMORY) {
+ i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
+
+ } else {
+ i386_test_reg_reg(src->regoff, src->regoff);
+ }
+ i386_jcc(I386_CC_L, 0);
+ mcode_addxcheckarefs(mcodeptr);
+
+ /*
+ * copy sizes to new stack location, be cause native function
+ * builtin_nmultianewarray access them as (int *)
+ */
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, -(iptr->op1 - s1) * 4);
+
+ /* copy sizes to stack (argument numbers >= INT_ARG_CNT) */
+
+ if (src->varkind != ARGVAR) {
+ if (src->flags & INMEMORY) {
+ i386_mov_membase_reg(REG_SP, (src->regoff + intreg_argnum) * 8, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, (s1 + intreg_argnum) * 8);
+
+ } else {
+ i386_mov_reg_membase(src->regoff, REG_SP, (s1 + intreg_argnum) * 8);
+ }
+ }
+ }
+ i386_alu_imm_reg(I386_SUB, iptr->op1 * 4, REG_SP);
+
+ /* a0 = dimension count */
+
+ /* save stack pointer */
+ M_INTMOVE(REG_SP, REG_ITMP1);
+
+ i386_alu_imm_reg(I386_SUB, 12, REG_SP);
+ i386_mov_imm_membase(iptr->op1, REG_SP, 0);
+
+ /* a1 = arraydescriptor */
+
+ i386_mov_imm_membase((s4) iptr->val.a, REG_SP, 4);
+
+ /* a2 = pointer to dimensions = stack pointer */
+
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, 8);
+
+ i386_mov_imm_reg((s4) (builtin_nmultianewarray), REG_ITMP1);
+ i386_call_reg(REG_ITMP1);
+ i386_alu_imm_reg(I386_ADD, 12 + iptr->op1 * 4, REG_SP);
+
+ s1 = reg_of_var(iptr->dst, REG_RESULT);
+ M_INTMOVE(REG_RESULT, s1);
+ store_reg_to_var_int(iptr->dst, s1);
+ break;
+
+
+ default: sprintf (logtext, "Unknown pseudo command: %d", iptr->opc);
+ error();
+
+
+
+ } /* switch */
+
+ } /* for instruction */
+
+ /* copy values to interface registers */
+
+ src = bptr->outstack;
+ len = bptr->outdepth;
+ MCODECHECK(64+len);
+ while (src) {
+ len--;
+ if ((src->varkind != STACKVAR)) {
+ s2 = src->type;
+ if (IS_FLT_DBL_TYPE(s2)) {
+ var_to_reg_flt(s1, src, REG_FTMP1);
+ if (!(interfaces[len][s2].flags & INMEMORY)) {
+ M_FLTMOVE(s1,interfaces[len][s2].regoff);
+
+ } else {
+ panic("double store");
+/* M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff); */
+ }
+
+ } else {
+ var_to_reg_int(s1, src, REG_ITMP1);
+ if (!IS_2_WORD_TYPE(interfaces[len][s2].type)) {
+ if (!(interfaces[len][s2].flags & INMEMORY)) {
+ M_INTMOVE(s1, interfaces[len][s2].regoff);
+
+ } else {
+ i386_mov_reg_membase(s1, REG_SP, interfaces[len][s2].regoff * 8);
+ }
+
+ } else {
+ if (interfaces[len][s2].flags & INMEMORY) {
+ M_LNGMEMMOVE(s1, interfaces[len][s2].regoff);
+
+ } else {
+ panic("copy interface registers: longs have to be in memory (end)");
+ }
+ }
+ }
+ }
+ src = src->prev;
+ }
+ } /* if (bptr -> flags >= BBREACHED) */
+ } /* for basic block */
+
+ /* bptr -> mpc = (int)((u1*) mcodeptr - mcodebase); */
+
+ {
+
+ /* generate bound check stubs */
+ u1 *xcodeptr = NULL;
+
+ for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
+ if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
+ gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
+ xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (5 + 5 + 2));
+ continue;
+ }
+
+
+ gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
+ xboundrefs->branchpos, (u1*) mcodeptr - mcodebase);
+
+ MCODECHECK(8);
+
+ i386_mov_imm_reg(0, REG_ITMP2_XPC); /* 5 bytes */
+ dseg_adddata(mcodeptr);
+ i386_mov_imm_reg(xboundrefs->branchpos - 6, REG_ITMP1); /* 5 bytes */
+ i386_alu_reg_reg(I386_ADD, REG_ITMP1, REG_ITMP2_XPC); /* 2 bytes */
+
+ if (xcodeptr != NULL) {
+ i386_jmp_imm(((u1 *) xcodeptr - (u1 *) mcodeptr) - 5);
+
+ } else {
+ xcodeptr = mcodeptr;
+
+ i386_mov_imm_reg((s4) proto_java_lang_ArrayIndexOutOfBoundsException, REG_ITMP1_XPTR);
+ i386_mov_imm_reg((s4) asm_handle_exception, I386_EDI);
+ i386_jmp_reg(I386_EDI);
+ }
+ }
+
+ /* generate negative array size check stubs */
+ xcodeptr = NULL;
+
+ for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
+ if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
+ gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
+ xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (5 + 5 + 2));
+ continue;
+ }
+
+ gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
+ xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase);
+
+ MCODECHECK(8);
+
+ i386_mov_imm_reg(0, REG_ITMP2_XPC); /* 5 bytes */
+ dseg_adddata(mcodeptr);
+ i386_mov_imm_reg(xcheckarefs->branchpos - 6, REG_ITMP1); /* 5 bytes */
+ i386_alu_reg_reg(I386_ADD, REG_ITMP1, REG_ITMP2_XPC); /* 2 bytes */
+
+ if (xcodeptr != NULL) {
+ i386_jmp_imm(((u1 *) xcodeptr - (u1 *) mcodeptr) - 5);
+
+ } else {
+ xcodeptr = mcodeptr;
+
+ i386_mov_imm_reg((s4) proto_java_lang_NegativeArraySizeException, REG_ITMP1_XPTR);
+ i386_mov_imm_reg((s4) asm_handle_exception, I386_EDI);
+ i386_jmp_reg(I386_EDI);
+ }
+ }
+
+ /* generate cast check stubs */
+ xcodeptr = NULL;
+
+ for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
+ if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
+ gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
+ xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (5 + 5 + 2));
+ continue;
+ }
+
+ gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
+ xcastrefs->branchpos, (u1*) mcodeptr - mcodebase);
+
+ MCODECHECK(8);
+
+ i386_mov_imm_reg(0, REG_ITMP2_XPC); /* 5 bytes */
+ dseg_adddata(mcodeptr);
+ i386_mov_imm_reg(xcastrefs->branchpos - 6, REG_ITMP1); /* 5 bytes */
+ i386_alu_reg_reg(I386_ADD, REG_ITMP1, REG_ITMP2_XPC); /* 2 bytes */
+
+ if (xcodeptr != NULL) {
+ i386_jmp_imm(((u1 *) xcodeptr - (u1 *) mcodeptr) - 5);
+
+ } else {
+ xcodeptr = mcodeptr;
+
+ i386_mov_imm_reg((s4) proto_java_lang_ClassCastException, REG_ITMP1_XPTR);
+ i386_mov_imm_reg((s4) asm_handle_exception, I386_EDI);
+ i386_jmp_reg(I386_EDI);
+ }
+ }
+
+ /* generate divide by zero check stubs */
+ xcodeptr = NULL;
+
+ for (; xdivrefs != NULL; xdivrefs = xdivrefs->next) {
+ if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
+ gen_resolvebranch((u1*) mcodebase + xdivrefs->branchpos,
+ xdivrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (5 + 5 + 2));
+ continue;
+ }
+
+ gen_resolvebranch((u1*) mcodebase + xdivrefs->branchpos,
+ xdivrefs->branchpos, (u1*) mcodeptr - mcodebase);
+
+ MCODECHECK(8);
+
+ i386_mov_imm_reg(0, REG_ITMP2_XPC); /* 5 bytes */
+ dseg_adddata(mcodeptr);
+ i386_mov_imm_reg(xdivrefs->branchpos - 6, REG_ITMP1); /* 5 bytes */
+ i386_alu_reg_reg(I386_ADD, REG_ITMP1, REG_ITMP2_XPC); /* 2 bytes */
+
+ if (xcodeptr != NULL) {
+ i386_jmp_imm(((u1 *) xcodeptr - (u1 *) mcodeptr) - 5);
+
+ } else {
+ xcodeptr = mcodeptr;
+
+ i386_mov_imm_reg((s4) proto_java_lang_ArithmeticException, REG_ITMP1_XPTR);
+ i386_mov_imm_reg((s4) asm_handle_exception, I386_EDI);
+ i386_jmp_reg(I386_EDI);
+ }
+ }
+
+ /* generate null pointer check stubs */
+ xcodeptr = NULL;
+
+ for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
+ if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
+ gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
+ xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (5 + 5 + 2));
+ continue;
+ }
+
+ gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
+ xnullrefs->branchpos, (u1*) mcodeptr - mcodebase);
+
+ MCODECHECK(8);
+
+ i386_mov_imm_reg(0, REG_ITMP2_XPC); /* 5 bytes */
+ dseg_adddata(mcodeptr);
+ i386_mov_imm_reg(xnullrefs->branchpos - 6, REG_ITMP1); /* 5 bytes */
+ i386_alu_reg_reg(I386_ADD, REG_ITMP1, REG_ITMP2_XPC); /* 2 bytes */
+
+ if (xcodeptr != NULL) {
+ i386_jmp_imm(((u1 *) xcodeptr - (u1 *) mcodeptr) - 5);
+
+ } else {
+ xcodeptr = mcodeptr;
+
+ i386_mov_imm_reg((s4) proto_java_lang_NullPointerException, REG_ITMP1_XPTR);
+ i386_mov_imm_reg((s4) asm_handle_exception, I386_EDI);
+ i386_jmp_reg(I386_EDI);
+ }
+ }
+ }
+
+ mcode_finish((int)((u1*) mcodeptr - mcodebase));
+}
+
+
+/* function createcompilerstub *************************************************
+
+ creates a stub routine which calls the compiler
+
+*******************************************************************************/
+
+#define COMPSTUBSIZE 12
+
+u1 *createcompilerstub(methodinfo *m)
+{
+ u1 *s = CNEW(u1, COMPSTUBSIZE); /* memory to hold the stub */
+ mcodeptr = s; /* code generation pointer */
+
+ /* code for the stub */
+ i386_mov_imm_reg((s4) m, REG_ITMP1);/* pass method pointer to compiler */
+
+ /* we use EDI cause EDX (REG_ITMP2) is used for patching */
+ i386_mov_imm_reg((s4) asm_call_jit_compiler, I386_EDI); /* load address */
+ i386_jmp_reg(I386_EDI); /* jump to compiler */
+
+#ifdef STATISTICS
+ count_cstub_len += COMPSTUBSIZE;
+#endif
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff);
+ return (u1*) s;
+}
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8);
- } else {
- i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff);
- }
- i386_jcc(I386_CC_NE, 0);
- mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
- break;
+/* function removecompilerstub *************************************************
- case ICMD_IF_LCMPNE: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
+ deletes a compilerstub from memory (simply by freeing it)
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
- i386_alu_membase_reg(I386_XOR, REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_membase_reg(I386_XOR, REG_SP, src->regoff * 8 + 4, REG_ITMP2);
- i386_alu_reg_reg(I386_OR, REG_ITMP2, REG_ITMP1);
- i386_test_reg_reg(REG_ITMP1, REG_ITMP1);
- }
- i386_jcc(I386_CC_NE, 0);
- mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
- break;
+*******************************************************************************/
- case ICMD_IF_ICMPLT: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
+void removecompilerstub(u1 *stub)
+{
+ CFREE(stub, COMPSTUBSIZE);
+}
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8);
+/* function: createnativestub **************************************************
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff);
+ creates a stub routine which calls a native method
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8);
+*******************************************************************************/
- } else {
- i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff);
- }
- i386_jcc(I386_CC_L, 0);
- mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
- break;
+#define NATIVESTUBSIZE 320
- case ICMD_IF_LCMPLT: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
+u1 *createnativestub(functionptr f, methodinfo *m)
+{
+ u1 *s = CNEW(u1, NATIVESTUBSIZE); /* memory to hold the stub */
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- int offset;
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1);
- i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1);
- i386_jcc(I386_CC_L, 0);
- mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+ u1 *tptr;
+ int i;
+ int stackframesize = 4; /* initial 4 bytes is space for jni env */
+ int stackframeoffset = 4;
- offset = 3 + 3 + 6;
- if (src->prev->regoff > 0) offset++;
- if (src->prev->regoff > 31) offset += 3;
+ int p, t;
- if (src->regoff > 0) offset++;
- if (src->regoff > 31) offset += 3;
+ mcodeptr = s; /* make macros work */
- i386_jcc(I386_CC_G, offset);
+ reg_init();
+
+ descriptor2types(m); /* set paramcount and paramtypes */
+
+ if (runverbose) {
+ i386_alu_imm_reg(I386_SUB, TRACE_ARGS_NUM * 8 + 4, REG_SP);
+
+ for (p = 0; p < m->paramcount; p++) {
+ t = m->paramtypes[p];
+ if (IS_INT_LNG_TYPE(t)) {
+ if (IS_2_WORD_TYPE(t)) {
+ i386_mov_membase_reg(REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4 + 4, REG_ITMP2);
+
+ } else if (t == TYPE_ADR) {
+ i386_mov_membase_reg(REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1);
+ i386_alu_reg_reg(I386_XOR, REG_ITMP2, REG_ITMP2);
+
+ } else {
+ i386_mov_membase_reg(REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4, REG_ITMP1);
+ i386_cltd();
+ }
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, p * 8);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, p * 8 + 4);
+
+ } else {
+ if (t == TYPE_FLT) {
+ i386_flds_membase(REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4);
+ i386_fstps_membase(REG_SP, p * 8);
+ i386_alu_reg_reg(I386_XOR, REG_ITMP2, REG_ITMP2);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, p * 8 + 4);
+
+ } else {
+ i386_fldl_membase(REG_SP, 4 + (TRACE_ARGS_NUM + p) * 8 + 4);
+ i386_fstpl_membase(REG_SP, p * 8);
+ }
+ }
+ }
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1);
- i386_jcc(I386_CC_B, 0);
- mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
- }
- break;
+
+ i386_alu_reg_reg(I386_XOR, REG_ITMP1, REG_ITMP1);
+ for (p = m->paramcount; p < TRACE_ARGS_NUM; p++) {
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, p * 8);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, p * 8 + 4);
+ }
+
+ i386_mov_imm_membase((s4) m, REG_SP, TRACE_ARGS_NUM * 8);
+
+ i386_mov_imm_reg((s4) asm_builtin_trace, REG_ITMP1);
+ i386_call_reg(REG_ITMP1);
+
+ i386_alu_imm_reg(I386_ADD, TRACE_ARGS_NUM * 8 + 4, REG_SP);
+ }
+
+ /*
+ * mark the whole fpu stack as free for native functions
+ * (only for saved register count == 0)
+ */
+ i386_ffree_reg(0);
+ i386_ffree_reg(1);
+ i386_ffree_reg(2);
+ i386_ffree_reg(3);
+ i386_ffree_reg(4);
+ i386_ffree_reg(5);
+ i386_ffree_reg(6);
+ i386_ffree_reg(7);
+
+ /*
+ * calculate stackframe size for native function
+ */
+ tptr = m->paramtypes;
+ for (i = 0; i < m->paramcount; i++) {
+ switch (*tptr++) {
+ case TYPE_INT:
+ case TYPE_FLT:
+ case TYPE_ADR:
+ stackframesize += 4;
+ break;
+
+ case TYPE_LNG:
+ case TYPE_DBL:
+ stackframesize += 8;
+ break;
+
+ default:
+ panic("unknown parameter type in native function");
+ }
+ }
+
+ i386_alu_imm_reg(I386_SUB, stackframesize, REG_SP);
+
+ tptr = m->paramtypes;
+ for (i = 0; i < m->paramcount; i++) {
+ switch (*tptr++) {
+ case TYPE_INT:
+ case TYPE_FLT:
+ case TYPE_ADR:
+ i386_mov_membase_reg(REG_SP, stackframesize + (1 * 4) + i * 8, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, stackframeoffset);
+ stackframeoffset += 4;
+ break;
+
+ case TYPE_LNG:
+ case TYPE_DBL:
+ i386_mov_membase_reg(REG_SP, stackframesize + (1 * 4) + i * 8, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, stackframesize + (1 * 4) + i * 8 + 4, REG_ITMP2);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, stackframeoffset);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, stackframeoffset + 4);
+ stackframeoffset += 8;
+ break;
+
+ default:
+ panic("unknown parameter type in native function");
+ }
+ }
+
+ i386_mov_imm_membase((s4) &env, REG_SP, 0);
+ i386_mov_imm_reg((s4) f, REG_ITMP1);
+ i386_call_reg(REG_ITMP1);
+ i386_alu_imm_reg(I386_ADD, stackframesize, REG_SP);
+
+ if (runverbose) {
+ i386_alu_imm_reg(I386_SUB, 4 + 8 + 8 + 4, REG_SP);
+
+ i386_mov_imm_membase((s4) m, REG_SP, 0);
+
+ i386_mov_reg_membase(REG_RESULT, REG_SP, 4);
+ i386_mov_reg_membase(REG_RESULT2, REG_SP, 4 + 4);
+
+ i386_fstl_membase(REG_SP, 4 + 8);
+ i386_fsts_membase(REG_SP, 4 + 8 + 8);
+
+ i386_mov_imm_reg((s4) asm_builtin_exittrace, REG_ITMP1);
+ i386_call_reg(REG_ITMP1);
+
+ i386_mov_membase_reg(REG_SP, 4, REG_RESULT);
+ i386_mov_membase_reg(REG_SP, 4 + 4, REG_RESULT2);
+
+ i386_alu_imm_reg(I386_ADD, 4 + 8 + 8 + 4, REG_SP);
+ }
- case ICMD_IF_ICMPGT: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
+ /* we can use EDI cause it's not preserved across function calls */
+ i386_mov_imm_reg((s4) &exceptionptr, I386_EDI);
+ i386_mov_membase_reg(I386_EDI, 0, I386_EDI);
+ i386_test_reg_reg(I386_EDI, I386_EDI);
+ i386_jcc(I386_CC_NE, 1);
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8);
+ i386_ret();
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff);
+ i386_mov_reg_reg(I386_EDI, REG_ITMP1_XPTR);
+ i386_mov_imm_reg((s4) &exceptionptr, I386_EDI);
+ i386_mov_imm_membase(0, I386_EDI, 0);
+ i386_mov_membase_reg(REG_SP, 0, REG_ITMP2_XPC);
+ i386_alu_imm_reg(I386_SUB, 2, REG_ITMP2_XPC);
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8);
+ i386_mov_imm_reg((s4) asm_handle_nat_exception, I386_EDI);
+ i386_jmp_reg(I386_EDI);
- } else {
- i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff);
- }
- i386_jcc(I386_CC_G, 0);
- mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
- break;
+#ifdef STATISTICS
+ count_nstub_len += NATIVESTUBSIZE;
+#endif
- case ICMD_IF_LCMPGT: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
+ return (u1*) s;
+}
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- int offset;
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1);
- i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1);
- i386_jcc(I386_CC_G, 0);
- mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+/* function: removenativestub **************************************************
- offset = 3 + 3 + 6;
- if (src->prev->regoff > 0) offset++;
- if (src->prev->regoff > 31) offset += 3;
+ removes a previously created native-stub from memory
+
+*******************************************************************************/
- if (src->regoff > 0) offset++;
- if (src->regoff > 31) offset += 3;
+void removenativestub(u1 *stub)
+{
+ CFREE(stub, NATIVESTUBSIZE);
+}
- i386_jcc(I386_CC_L, offset);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1);
- i386_jcc(I386_CC_A, 0);
- mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
- }
- break;
- case ICMD_IF_ICMPLE: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
+void i386_emit_ialu(s4 alu_op, stackptr src, instruction *iptr)
+{
+ if (iptr->dst->flags & INMEMORY) {
+ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ if (src->regoff == iptr->dst->regoff) {
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_alu_reg_membase(alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ } else if (src->prev->regoff == iptr->dst->regoff) {
i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8);
+ i386_alu_reg_membase(alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff);
+ } else {
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_alu_membase_reg(alu_op, REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ }
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8);
+ } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
+ if (src->regoff == iptr->dst->regoff) {
+ i386_alu_reg_membase(alu_op, src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
} else {
- i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff);
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_alu_reg_reg(alu_op, src->prev->regoff, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
}
- i386_jcc(I386_CC_LE, 0);
- mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
- break;
- case ICMD_IF_LCMPLE: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
+ } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ if (src->prev->regoff == iptr->dst->regoff) {
+ i386_alu_reg_membase(alu_op, src->regoff, REG_SP, iptr->dst->regoff * 8);
+
+ } else {
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_alu_reg_reg(alu_op, src->regoff, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ }
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- int offset;
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1);
- i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1);
- i386_jcc(I386_CC_L, 0);
- mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+ } else {
+ i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
+ i386_alu_reg_membase(alu_op, src->regoff, REG_SP, iptr->dst->regoff * 8);
+ }
- offset = 3 + 3 + 6;
- if (src->prev->regoff > 0) offset++;
- if (src->prev->regoff > 31) offset += 3;
+ } else {
+ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
+ i386_alu_membase_reg(alu_op, REG_SP, src->regoff * 8, iptr->dst->regoff);
- if (src->regoff > 0) offset++;
- if (src->regoff > 31) offset += 3;
+ } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
+ M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
+ i386_alu_membase_reg(alu_op, REG_SP, src->regoff * 8, iptr->dst->regoff);
- i386_jcc(I386_CC_G, offset);
+ } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ M_INTMOVE(src->regoff, iptr->dst->regoff);
+ i386_alu_membase_reg(alu_op, REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1);
- i386_jcc(I386_CC_BE, 0);
- mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
- }
- break;
+ } else {
+ if (src->regoff == iptr->dst->regoff) {
+ i386_alu_reg_reg(alu_op, src->prev->regoff, iptr->dst->regoff);
- case ICMD_IF_ICMPGE: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
+ } else {
+ M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
+ i386_alu_reg_reg(alu_op, src->regoff, iptr->dst->regoff);
+ }
+ }
+ }
+}
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_alu_reg_membase(I386_CMP, REG_ITMP1, REG_SP, src->prev->regoff * 8);
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, src->prev->regoff);
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- i386_alu_reg_membase(I386_CMP, src->regoff, REG_SP, src->prev->regoff * 8);
+void i386_emit_ialuconst(s4 alu_op, stackptr src, instruction *iptr)
+{
+ if (iptr->dst->flags & INMEMORY) {
+ if (src->flags & INMEMORY) {
+ if (src->regoff == iptr->dst->regoff) {
+ i386_alu_imm_membase(alu_op, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
} else {
- i386_alu_reg_reg(I386_CMP, src->regoff, src->prev->regoff);
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_alu_imm_reg(alu_op, iptr->val.i, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
}
- i386_jcc(I386_CC_GE, 0);
- mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
- break;
- case ICMD_IF_LCMPGE: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
+ } else {
+ i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8);
+ i386_alu_imm_membase(alu_op, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
+ }
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- int offset;
- i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1);
- i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8 + 4, REG_ITMP1);
- i386_jcc(I386_CC_G, 0);
- mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
+ } else {
+ if (src->flags & INMEMORY) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff);
+ i386_alu_imm_reg(alu_op, iptr->val.i, iptr->dst->regoff);
- offset = 3 + 3 + 6;
- if (src->prev->regoff > 0) offset++;
- if (src->prev->regoff > 31) offset += 3;
+ } else {
+ M_INTMOVE(src->regoff, iptr->dst->regoff);
+ i386_alu_imm_reg(alu_op, iptr->val.i, iptr->dst->regoff);
+ }
+ }
+}
- if (src->regoff > 0) offset++;
- if (src->regoff > 31) offset += 3;
- i386_jcc(I386_CC_L, offset);
+void i386_emit_lalu(s4 alu_op, stackptr src, instruction *iptr)
+{
+ if (iptr->dst->flags & INMEMORY) {
+ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ if (src->regoff == iptr->dst->regoff) {
i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
- i386_alu_membase_reg(I386_CMP, REG_SP, src->regoff * 8, REG_ITMP1);
- i386_jcc(I386_CC_AE, 0);
- mcode_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
- }
- break;
-
- /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST */
-
- case ICMD_ELSE_ICONST: /* handled by IFxx_ICONST */
- break;
-
- case ICMD_IFEQ_ICONST: /* ..., value ==> ..., constant */
- /* val.i = constant */
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
+ i386_alu_reg_membase(alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_alu_reg_membase(alu_op, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
- /* TWISTI: checked */
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (iptr->dst->flags & INMEMORY) {
- int offset = 0;
+ } else if (src->prev->regoff == iptr->dst->regoff) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
+ i386_alu_reg_membase(alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_alu_reg_membase(alu_op, REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
- if (src->flags & INMEMORY) {
- i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
+ } else {
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8 + 4, REG_ITMP2);
+ i386_alu_membase_reg(alu_op, REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_alu_membase_reg(alu_op, REG_SP, src->regoff * 8 + 4, REG_ITMP2);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
+ }
+ }
+ }
+}
- } else {
- i386_alu_imm_reg(I386_CMP, 0, src->regoff);
- }
- offset += 7;
- if (iptr->dst->regoff > 0) offset += 1;
- if (iptr->dst->regoff > 31) offset += 3;
-
- i386_jcc(I386_CC_NE, offset + (iptr[1].opc == ICMD_ELSE_ICONST) ? 5 + offset : 0);
- i386_mov_imm_membase(iptr->val.i, REG_SP, iptr->dst->regoff * 8);
- if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
- i386_jmp(offset);
- i386_mov_imm_membase(iptr[1].val.i, REG_SP, iptr->dst->regoff * 8);
- }
+void i386_emit_laluconst(s4 alu_op, stackptr src, instruction *iptr)
+{
+ if (iptr->dst->flags & INMEMORY) {
+ if (src->flags & INMEMORY) {
+ if (src->regoff == iptr->dst->regoff) {
+ i386_alu_imm_membase(alu_op, iptr->val.l, REG_SP, iptr->dst->regoff * 8);
+ i386_alu_imm_membase(alu_op, iptr->val.l >> 32, REG_SP, iptr->dst->regoff * 8 + 4);
} else {
- if (src->flags & INMEMORY) {
- i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_ITMP2);
+ i386_alu_imm_reg(alu_op, iptr->val.l, REG_ITMP1);
+ i386_alu_imm_reg(alu_op, iptr->val.l >> 32, REG_ITMP2);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ i386_mov_reg_membase(REG_ITMP2, REG_SP, iptr->dst->regoff * 8 + 4);
+ }
+ }
+ }
+}
- } else {
- i386_alu_imm_reg(I386_CMP, 0, src->regoff);
- }
- i386_jcc(I386_CC_NE, (iptr[1].opc == ICMD_ELSE_ICONST) ? 10 : 5);
- i386_mov_imm_reg(iptr->val.i, iptr->dst->regoff);
- if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
- i386_jmp(5);
- i386_mov_imm_reg(iptr[1].val.i, iptr->dst->regoff);
- }
+void i386_emit_ishift(s4 shift_op, stackptr src, instruction *iptr)
+{
+ if (iptr->dst->flags & INMEMORY) {
+ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ if (src->prev->regoff == iptr->dst->regoff) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
+ i386_shift_membase(shift_op, REG_SP, iptr->dst->regoff * 8);
+
+ } else {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_shift_reg(shift_op, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
}
- break;
- case ICMD_IFNE_ICONST: /* ..., value ==> ..., constant */
- /* val.i = constant */
+ } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
+ i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
+ i386_shift_membase(shift_op, REG_SP, iptr->dst->regoff * 8);
- /* TWISTI: checked */
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (iptr->dst->flags & INMEMORY) {
- int offset = 0;
+ } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ if (src->prev->regoff == iptr->dst->regoff) {
+ M_INTMOVE(src->regoff, I386_ECX);
+ i386_shift_membase(shift_op, REG_SP, iptr->dst->regoff * 8);
- if (src->flags & INMEMORY) {
- i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
+ } else {
+ M_INTMOVE(src->regoff, I386_ECX);
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, REG_ITMP1);
+ i386_shift_reg(shift_op, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ }
- } else {
- i386_alu_imm_reg(I386_CMP, 0, src->regoff);
- }
+ } else {
+ M_INTMOVE(src->regoff, I386_ECX);
+ i386_mov_reg_membase(src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
+ i386_shift_membase(shift_op, REG_SP, iptr->dst->regoff * 8);
+ }
- offset += 7;
- if (iptr->dst->regoff > 0) offset += 1;
- if (iptr->dst->regoff > 31) offset += 3;
-
- i386_jcc(I386_CC_E, offset + (iptr[1].opc == ICMD_ELSE_ICONST) ? 5 + offset : 0);
- i386_mov_imm_membase(iptr->val.i, REG_SP, iptr->dst->regoff * 8);
+ } else {
+ if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
+ i386_shift_reg(shift_op, iptr->dst->regoff);
- if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
- i386_jmp(offset);
- i386_mov_imm_membase(iptr[1].val.i, REG_SP, iptr->dst->regoff * 8);
- }
+ } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, I386_ECX);
+ M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
+ i386_shift_reg(shift_op, iptr->dst->regoff);
- } else {
- if (src->flags & INMEMORY) {
- i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
+ } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
+ M_INTMOVE(src->regoff, I386_ECX);
+ i386_mov_membase_reg(REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
+ i386_shift_reg(shift_op, iptr->dst->regoff);
- } else {
- i386_alu_imm_reg(I386_CMP, 0, src->regoff);
- }
+ } else {
+ M_INTMOVE(src->regoff, I386_ECX);
+ M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
+ i386_shift_reg(shift_op, iptr->dst->regoff);
+ }
+ }
+}
- i386_jcc(I386_CC_E, (iptr[1].opc == ICMD_ELSE_ICONST) ? 10 : 5);
- i386_mov_imm_reg(iptr->val.i, iptr->dst->regoff);
- if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
- i386_jmp(5);
- i386_mov_imm_reg(iptr[1].val.i, iptr->dst->regoff);
- }
- }
- break;
- case ICMD_IFLT_ICONST: /* ..., value ==> ..., constant */
- /* val.i = constant */
+void i386_emit_ishiftconst(s4 shift_op, stackptr src, instruction *iptr)
+{
+ if ((src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) {
+ if (src->regoff == iptr->dst->regoff) {
+ i386_shift_imm_membase(shift_op, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
- /* TWISTI: checked */
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (iptr->dst->flags & INMEMORY) {
- int offset = 0;
+ } else {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
+ i386_shift_imm_reg(shift_op, iptr->val.i, REG_ITMP1);
+ i386_mov_reg_membase(REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ }
- if (src->flags & INMEMORY) {
- i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
+ } else if ((src->flags & INMEMORY) && !(iptr->dst->flags & INMEMORY)) {
+ i386_mov_membase_reg(REG_SP, src->regoff * 8, iptr->dst->regoff);
+ i386_shift_imm_reg(shift_op, iptr->val.i, iptr->dst->regoff);
+
+ } else if (!(src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) {
+ i386_mov_reg_membase(src->regoff, REG_SP, iptr->dst->regoff * 8);
+ i386_shift_imm_membase(shift_op, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
- } else {
- i386_alu_imm_reg(I386_CMP, 0, src->regoff);
- }
+ } else {
+ M_INTMOVE(src->regoff, iptr->dst->regoff);
+ i386_shift_imm_reg(shift_op, iptr->val.i, iptr->dst->regoff);
+ }
+}
- offset += 7;
- if (iptr->dst->regoff > 0) offset += 1;
- if (iptr->dst->regoff > 31) offset += 3;
-
- i386_jcc(I386_CC_GE, offset + (iptr[1].opc == ICMD_ELSE_ICONST) ? 5 + offset : 0);
- i386_mov_imm_membase(iptr->val.i, REG_SP, iptr->dst->regoff * 8);
- if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
- i386_jmp(offset);
- i386_mov_imm_membase(iptr[1].val.i, REG_SP, iptr->dst->regoff * 8);
- }
- } else {
- if (src->flags & INMEMORY) {
- i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
+void i386_emit_ifcc_iconst(s4 if_op, stackptr src, instruction *iptr)
+{
+ if (iptr->dst->flags & INMEMORY) {
+ int offset = 0;
- } else {
- i386_alu_imm_reg(I386_CMP, 0, src->regoff);
- }
+ if (src->flags & INMEMORY) {
+ i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
- i386_jcc(I386_CC_GE, (iptr[1].opc == ICMD_ELSE_ICONST) ? 10 : 5);
- i386_mov_imm_reg(iptr->val.i, iptr->dst->regoff);
+ } else {
+ i386_test_reg_reg(src->regoff, src->regoff);
+ }
- if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
- i386_jmp(5);
- i386_mov_imm_reg(iptr[1].val.i, iptr->dst->regoff);
- }
- }
- break;
+ offset += 7;
+ CALCOFFSETBYTES(offset, iptr->dst->regoff * 8);
+
+ i386_jcc(if_op, offset + (iptr[1].opc == ICMD_ELSE_ICONST) ? 5 + offset : 0);
+ i386_mov_imm_membase(iptr->val.i, REG_SP, iptr->dst->regoff * 8);
- case ICMD_IFGE_ICONST: /* ..., value ==> ..., constant */
- /* val.i = constant */
+ if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
+ i386_jmp_imm(offset);
+ i386_mov_imm_membase(iptr[1].val.i, REG_SP, iptr->dst->regoff * 8);
+ }
- /* TWISTI: checked */
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (iptr->dst->flags & INMEMORY) {
- int offset = 0;
+ } else {
+ if (src->flags & INMEMORY) {
+ i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
- if (src->flags & INMEMORY) {
- i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
+ } else {
+ i386_test_reg_reg(src->regoff, src->regoff);
+ }
- } else {
- i386_alu_imm_reg(I386_CMP, 0, src->regoff);
- }
+ i386_jcc(if_op, (iptr[1].opc == ICMD_ELSE_ICONST) ? 10 : 5);
+ i386_mov_imm_reg(iptr->val.i, iptr->dst->regoff);
- offset += 7;
- if (iptr->dst->regoff > 0) offset += 1;
- if (iptr->dst->regoff > 31) offset += 3;
-
- i386_jcc(I386_CC_L, offset + (iptr[1].opc == ICMD_ELSE_ICONST) ? 5 + offset : 0);
- i386_mov_imm_membase(iptr->val.i, REG_SP, iptr->dst->regoff * 8);
+ if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
+ i386_jmp_imm(5);
+ i386_mov_imm_reg(iptr[1].val.i, iptr->dst->regoff);
+ }
+ }
+}
- if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
- i386_jmp(offset);
- i386_mov_imm_membase(iptr[1].val.i, REG_SP, iptr->dst->regoff * 8);
- }
- } else {
- if (src->flags & INMEMORY) {
- i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
- } else {
- i386_alu_imm_reg(I386_CMP, 0, src->regoff);
- }
+#if 1
- i386_jcc(I386_CC_L, (iptr[1].opc == ICMD_ELSE_ICONST) ? 10 : 5);
- i386_mov_imm_reg(iptr->val.i, iptr->dst->regoff);
+/*
+ * mov ops
+ */
+void i386_mov_reg_reg(s4 reg, s4 dreg) {
+ *(mcodeptr++) = (u1) 0x89;
+ i386_emit_reg((reg),(dreg));
+}
- if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
- i386_jmp(5);
- i386_mov_imm_reg(iptr[1].val.i, iptr->dst->regoff);
- }
- }
- break;
- case ICMD_IFGT_ICONST: /* ..., value ==> ..., constant */
- /* val.i = constant */
+void i386_mov_imm_reg(s4 imm, s4 reg) {
+ *(mcodeptr++) = (u1) 0xb8 + ((reg) & 0x07);
+ i386_emit_imm32((imm));
+}
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(iptr->dst, REG_ITMP3);
- s3 = iptr->val.i;
- if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
- if ((s3 == 1) && (iptr[1].val.i == 0)) {
- M_CMPLT(REG_ZERO, s1, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
- }
- if ((s3 == 0) && (iptr[1].val.i == 1)) {
- M_CMPLE(s1, REG_ZERO, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
- }
- if (s1 == d) {
- M_MOV(s1, REG_ITMP1);
- s1 = REG_ITMP1;
- }
-/* ICONST(d, iptr[1].val.i); */
- }
- if ((s3 >= 0) && (s3 <= 255)) {
- M_CMOVGT_IMM(s1, s3, d);
- }
- else {
-/* ICONST(REG_ITMP2, s3); */
- M_CMOVGT(s1, REG_ITMP2, d);
- }
- store_reg_to_var_int(iptr->dst, d);
- break;
- case ICMD_IFLE_ICONST: /* ..., value ==> ..., constant */
- /* val.i = constant */
+void i386_movb_imm_reg(s4 imm, s4 reg) {
+ *(mcodeptr++) = (u1) 0xc6;
+ i386_emit_reg(0,(reg));
+ i386_emit_imm8((imm));
+}
- /* TWISTI: checked */
- d = reg_of_var(iptr->dst, REG_ITMP3);
- if (iptr->dst->flags & INMEMORY) {
- int offset = 0;
- if (src->flags & INMEMORY) {
- i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
+void i386_mov_membase_reg(s4 basereg, s4 disp, s4 reg) {
+ *(mcodeptr++) = (u1) 0x8b;
+ i386_emit_membase((basereg),(disp),(reg));
+}
- } else {
- i386_alu_imm_reg(I386_CMP, 0, src->regoff);
- }
- offset += 7;
- if (iptr->dst->regoff > 0) offset += 1;
- if (iptr->dst->regoff > 31) offset += 3;
-
- i386_jcc(I386_CC_G, offset + (iptr[1].opc == ICMD_ELSE_ICONST) ? 5 + offset : 0);
- i386_mov_imm_membase(iptr->val.i, REG_SP, iptr->dst->regoff * 8);
+/*
+ * this one is for INVOKEVIRTUAL/INVOKEINTERFACE to have a
+ * constant membase immediate length of 32bit
+ */
+void i386_mov_membase32_reg(s4 basereg, s4 disp, s4 reg) {
+ *(mcodeptr++) = (u1) 0x8b;
+ i386_address_byte(2, (reg), (basereg));
+ i386_emit_imm32((disp));
+}
- if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
- i386_jmp(offset);
- i386_mov_imm_membase(iptr[1].val.i, REG_SP, iptr->dst->regoff * 8);
- }
- } else {
- if (src->flags & INMEMORY) {
- i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
+void i386_mov_reg_membase(s4 reg, s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0x89;
+ i386_emit_membase((basereg),(disp),(reg));
+}
- } else {
- i386_alu_imm_reg(I386_CMP, 0, src->regoff);
- }
- i386_jcc(I386_CC_G, (iptr[1].opc == ICMD_ELSE_ICONST) ? 10 : 5);
- i386_mov_imm_reg(iptr->val.i, iptr->dst->regoff);
+void i386_mov_memindex_reg(s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg) {
+ *(mcodeptr++) = (u1) 0x8b;
+ i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale));
+}
- if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
- i386_jmp(5);
- i386_mov_imm_reg(iptr[1].val.i, iptr->dst->regoff);
- }
- }
- break;
+void i386_mov_reg_memindex(s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale) {
+ *(mcodeptr++) = (u1) 0x89;
+ i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale));
+}
- case ICMD_IRETURN: /* ..., retvalue ==> ... */
- case ICMD_ARETURN:
-#ifdef USE_THREADS
- if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
- i386_mov_membase_reg(REG_SP, 8 * maxmemuse, REG_ITMP1);
- i386_alu_imm_reg(I386_SUB, 4, REG_SP);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, 0);
- i386_mov_imm_reg(builtin_monitorexit, REG_ITMP1);
- i386_call_reg(REG_ITMP1);
- i386_alu_imm_reg(I386_ADD, 4, REG_SP);
- }
-#endif
- var_to_reg_int(s1, src, REG_RESULT);
- M_INTMOVE(s1, REG_RESULT);
- goto nowperformreturn;
+void i386_movw_reg_memindex(s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale) {
+ *(mcodeptr++) = (u1) 0x66;
+ *(mcodeptr++) = (u1) 0x89;
+ i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale));
+}
- case ICMD_LRETURN: /* ..., retvalue ==> ... */
-#ifdef USE_THREADS
- if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
- i386_mov_membase_reg(REG_SP, 8 * maxmemuse, REG_ITMP1);
- i386_alu_imm_reg(I386_SUB, 4, REG_SP);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, 0);
- i386_mov_imm_reg(builtin_monitorexit, REG_ITMP1);
- i386_call_reg(REG_ITMP1);
- i386_alu_imm_reg(I386_ADD, 4, REG_SP);
- }
-#endif
- if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_RESULT);
- i386_mov_membase_reg(REG_SP, src->regoff * 8 + 4, REG_RESULT2);
+void i386_movb_reg_memindex(s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale) {
+ *(mcodeptr++) = (u1) 0x88;
+ i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale));
+}
- } else {
- panic("longs have to be in memory");
- }
- goto nowperformreturn;
- case ICMD_FRETURN: /* ..., retvalue ==> ... */
- case ICMD_DRETURN:
+void i386_mov_imm_membase(s4 imm, s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xc7;
+ i386_emit_membase((basereg),(disp),0);
+ i386_emit_imm32((imm));
+}
-#ifdef USE_THREADS
- if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
- i386_mov_membase_reg(REG_SP, 8 * maxmemuse, REG_ITMP1);
- i386_alu_imm_reg(I386_SUB, 4, REG_SP);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, 0);
- i386_mov_imm_reg(builtin_monitorexit, REG_ITMP1);
- i386_call_reg(REG_ITMP1);
- i386_alu_imm_reg(I386_ADD, 4, REG_SP);
- }
-#endif
- /* value should already be in st(0) */
- goto nowperformreturn;
- case ICMD_RETURN: /* ... ==> ... */
+void i386_movsbl_memindex_reg(s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg) {
+ *(mcodeptr++) = (u1) 0x0f;
+ *(mcodeptr++) = (u1) 0xbe;
+ i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale));
+}
-#ifdef USE_THREADS
- if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
- i386_mov_membase_reg(REG_SP, 8 * maxmemuse, REG_ITMP1);
- i386_alu_imm_reg(I386_SUB, 4, REG_SP);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, 0);
- i386_mov_imm_reg(builtin_monitorexit, REG_ITMP1);
- i386_call_reg(REG_ITMP1);
- i386_alu_imm_reg(I386_ADD, 4, REG_SP);
- }
-#endif
-nowperformreturn:
- {
- int r, p;
-
- p = parentargs_base;
-
- /* restore return address */
+void i386_movswl_memindex_reg(s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg) {
+ *(mcodeptr++) = (u1) 0x0f;
+ *(mcodeptr++) = (u1) 0xbf;
+ i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale));
+}
- if (!isleafmethod) {
- /* p--; M_LLD (REG_RA, REG_SP, 8 * p); -- do we really need this on i386 */
- }
- /* restore saved registers */
+void i386_movzwl_memindex_reg(s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg) {
+ *(mcodeptr++) = (u1) 0x0f;
+ *(mcodeptr++) = (u1) 0xb7;
+ i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale));
+}
- for (r = savintregcnt - 1; r >= maxsavintreguse; r--) {
- p--; i386_mov_membase_reg(REG_SP, p * 8, savintregs[r]);
- }
- for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--) {
- p--; M_DLD(savfltregs[r], REG_SP, 8 * p);
- }
- /* deallocate stack */
- if (parentargs_base) {
- i386_alu_imm_reg(I386_ADD, parentargs_base * 8, REG_SP);
- }
+/*
+ * alu operations
+ */
+void i386_alu_reg_reg(s4 opc, s4 reg, s4 dreg) {
+ *(mcodeptr++) = (((u1) (opc)) << 3) + 1;
+ i386_emit_reg((reg),(dreg));
+}
- /* call trace function */
- if (runverbose) {
- M_LDA (REG_SP, REG_SP, -24);
- M_AST(REG_RA, REG_SP, 0);
- M_LST(REG_RESULT, REG_SP, 8);
- M_DST(REG_FRESULT, REG_SP,16);
- a = dseg_addaddress (method);
- M_ALD(argintregs[0], REG_PV, a);
- M_MOV(REG_RESULT, argintregs[1]);
- M_FLTMOVE(REG_FRESULT, argfltregs[2]);
- a = dseg_addaddress ((void*) (builtin_displaymethodstop));
- M_ALD(REG_PV, REG_PV, a);
- M_JSR (REG_RA, REG_PV);
- s1 = (int)((u1*) mcodeptr - mcodebase);
- if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
- else {
- s4 ml=-s1, mh=0;
- while (ml<-32768) { ml+=65536; mh--; }
- M_LDA (REG_PV, REG_RA, ml );
- M_LDAH (REG_PV, REG_PV, mh );
- }
- M_DLD(REG_FRESULT, REG_SP,16);
- M_LLD(REG_RESULT, REG_SP, 8);
- M_ALD(REG_RA, REG_SP, 0);
- M_LDA (REG_SP, REG_SP, 24);
- }
+void i386_alu_reg_membase(s4 opc, s4 reg, s4 basereg, s4 disp) {
+ *(mcodeptr++) = (((u1) (opc)) << 3) + 1;
+ i386_emit_membase((basereg),(disp),(reg));
+}
- i386_ret();
- ALIGNCODENOP;
- }
- break;
+void i386_alu_membase_reg(s4 opc, s4 basereg, s4 disp, s4 reg) {
+ *(mcodeptr++) = (((u1) (opc)) << 3) + 3;
+ i386_emit_membase((basereg),(disp),(reg));
+}
- case ICMD_TABLESWITCH: /* ..., index ==> ... */
- {
- s4 i, l, *s4ptr;
- void **tptr;
- tptr = (void **) iptr->target;
+void i386_alu_imm_reg(s4 opc, s4 imm, s4 dreg) {
+ if (i386_is_imm8(imm)) {
+ *(mcodeptr++) = (u1) 0x83;
+ i386_emit_reg((opc),(dreg));
+ i386_emit_imm8((imm));
+ } else {
+ *(mcodeptr++) = (u1) 0x81;
+ i386_emit_reg((opc),(dreg));
+ i386_emit_imm32((imm));
+ }
+}
- s4ptr = iptr->val.a;
- l = s4ptr[1]; /* low */
- i = s4ptr[2]; /* high */
- var_to_reg_int(s1, src, REG_ITMP1);
- if (l == 0) {
- M_INTMOVE(s1, REG_ITMP1);
- } else if (l <= 32768) {
- i386_alu_imm_reg(I386_SUB, l, REG_ITMP1);
- }
- i = i - l + 1;
+void i386_alu_imm_membase(s4 opc, s4 imm, s4 basereg, s4 disp) {
+ if (i386_is_imm8(imm)) {
+ *(mcodeptr++) = (u1) 0x83;
+ i386_emit_membase((basereg),(disp),(opc));
+ i386_emit_imm8((imm));
+ } else {
+ *(mcodeptr++) = (u1) 0x81;
+ i386_emit_membase((basereg),(disp),(opc));
+ i386_emit_imm32((imm));
+ }
+}
- /* range check */
- i386_alu_imm_reg(I386_CMP, i - 1, REG_ITMP1);
- i386_jcc(I386_CC_A, 0);
+void i386_test_reg_reg(s4 reg, s4 dreg) {
+ *(mcodeptr++) = (u1) 0x85;
+ i386_emit_reg((reg),(dreg));
+}
- /* mcode_addreference(BlockPtrOfPC(s4ptr[0]), mcodeptr); */
- mcode_addreference((basicblock *) tptr[0], mcodeptr);
- /* build jump table top down and use address of lowest entry */
+void i386_test_imm_reg(s4 imm, s4 reg) {
+ *(mcodeptr++) = (u1) 0xf7;
+ i386_emit_reg(0,(reg));
+ i386_emit_imm32((imm));
+}
- /* s4ptr += 3 + i; */
- tptr += i;
- while (--i >= 0) {
- /* dseg_addtarget(BlockPtrOfPC(*--s4ptr)); */
- dseg_addtarget((basicblock *) tptr[0]);
- --tptr;
- }
- /* length of dataseg after last dseg_addtarget is used by load */
+/*
+ * inc, dec operations
+ */
+void i386_inc_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0x40 + ((reg) & 0x07);
+}
- i386_mov_imm_reg(0, REG_ITMP2);
- dseg_adddata(mcodeptr);
- i386_mov_memindex_reg(-dseglen, REG_ITMP2, REG_ITMP1, 2, REG_ITMP3);
- i386_jmp_reg(REG_ITMP3);
- ALIGNCODENOP;
- }
- break;
+void i386_inc_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xff;
+ i386_emit_membase((basereg),(disp),0);
+}
- case ICMD_LOOKUPSWITCH: /* ..., key ==> ... */
- {
- s4 i, l, val, *s4ptr;
- void **tptr;
- tptr = (void **) iptr->target;
+void i386_dec_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0x48 + ((reg) & 0x07);
+}
- s4ptr = iptr->val.a;
- l = s4ptr[0]; /* default */
- i = s4ptr[1]; /* count */
-
- MCODECHECK((i<<2)+8);
- var_to_reg_int(s1, src, REG_ITMP1); /* reg compare should always be faster */
- while (--i >= 0) {
- s4ptr += 2;
- ++tptr;
+
+void i386_dec_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xff;
+ i386_emit_membase((basereg),(disp),1);
+}
- val = s4ptr[0];
- i386_alu_imm_reg(I386_CMP, val, s1);
- i386_jcc(I386_CC_E, 0);
- /* mcode_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr); */
- mcode_addreference((basicblock *) tptr[0], mcodeptr);
- }
- i386_jmp(0);
- /* mcode_addreference(BlockPtrOfPC(l), mcodeptr); */
-
- tptr = (void **) iptr->target;
- mcode_addreference((basicblock *) tptr[0], mcodeptr);
- ALIGNCODENOP;
- }
- break;
+void i386_cltd() {
+ *(mcodeptr++) = (u1) 0x99;
+}
- case ICMD_BUILTIN3: /* ..., arg1, arg2, arg3 ==> ... */
- /* op1 = return type, val.a = function pointer*/
- s3 = 3;
- goto gen_method;
- case ICMD_BUILTIN2: /* ..., arg1, arg2 ==> ... */
- /* op1 = return type, val.a = function pointer*/
- s3 = 2;
- goto gen_method;
+void i386_imul_reg_reg(s4 reg, s4 dreg) {
+ *(mcodeptr++) = (u1) 0x0f;
+ *(mcodeptr++) = (u1) 0xaf;
+ i386_emit_reg((dreg),(reg));
+}
- case ICMD_BUILTIN1: /* ..., arg1 ==> ... */
- /* op1 = return type, val.a = function pointer*/
- s3 = 1;
- goto gen_method;
- case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ... */
- /* op1 = arg count, val.a = method pointer */
+void i386_imul_membase_reg(s4 basereg, s4 disp, s4 dreg) {
+ *(mcodeptr++) = (u1) 0x0f;
+ *(mcodeptr++) = (u1) 0xaf;
+ i386_emit_membase((basereg),(disp),(dreg));
+}
- case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
- /* op1 = arg count, val.a = method pointer */
- case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
- /* op1 = arg count, val.a = method pointer */
+void i386_imul_imm_reg(s4 imm, s4 dreg) {
+ if (i386_is_imm8((imm))) {
+ *(mcodeptr++) = (u1) 0x6b;
+ i386_emit_reg(0,(dreg));
+ i386_emit_imm8((imm));
+ } else {
+ *(mcodeptr++) = (u1) 0x69;
+ i386_emit_reg(0,(dreg));
+ i386_emit_imm32((imm));
+ }
+}
- case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
- /* op1 = arg count, val.a = method pointer */
- s3 = iptr->op1;
+void i386_imul_imm_reg_reg(s4 imm, s4 reg, s4 dreg) {
+ if (i386_is_imm8((imm))) {
+ *(mcodeptr++) = (u1) 0x6b;
+ i386_emit_reg((dreg),(reg));
+ i386_emit_imm8((imm));
+ } else {
+ *(mcodeptr++) = (u1) 0x69;
+ i386_emit_reg((dreg),(reg));
+ i386_emit_imm32((imm));
+ }
+}
-gen_method: {
- methodinfo *m;
- classinfo *ci;
- MCODECHECK((s3 << 1) + 64);
+void i386_imul_imm_membase_reg(s4 imm, s4 basereg, s4 disp, s4 dreg) {
+ if (i386_is_imm8((imm))) {
+ *(mcodeptr++) = (u1) 0x6b;
+ i386_emit_membase((basereg),(disp),(dreg));
+ i386_emit_imm8((imm));
+ } else {
+ *(mcodeptr++) = (u1) 0x69;
+ i386_emit_membase((basereg),(disp),(dreg));
+ i386_emit_imm32((imm));
+ }
+}
- /* copy arguments to registers or stack location */
- for (; --s3 >= 0; src = src->prev) {
- if (src->varkind == ARGVAR) {
- continue;
- }
+void i386_mul_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xf7;
+ i386_emit_membase((basereg),(disp),4);
+}
- if (IS_INT_LNG_TYPE(src->type)) {
- if (s3 < intreg_argnum) {
- panic("No integer argument registers available!");
- } else {
- if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, s3 * 8);
+void i386_idiv_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xf7;
+ i386_emit_reg(7,(reg));
+}
- } else {
- i386_mov_reg_membase(src->regoff, REG_SP, s3 * 4);
- }
- }
- } else {
- if (s3 < fltreg_argnum) {
- panic("No float argument registers available!");
- } else {
- var_to_reg_flt(d, src, REG_FTMP1);
- M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
- }
- }
- } /* end of for */
+void i386_ret() {
+ *(mcodeptr++) = (u1) 0xc3;
+}
- m = iptr->val.a;
- switch (iptr->opc) {
- case ICMD_BUILTIN3:
- case ICMD_BUILTIN2:
- case ICMD_BUILTIN1:
- a = (s4) m;
- d = iptr->op1;
- i386_mov_imm_reg(a, REG_ITMP1);
- i386_call_reg(REG_ITMP1);
- break;
- case ICMD_INVOKESTATIC:
- case ICMD_INVOKESPECIAL:
+/*
+ * shift ops
+ */
+void i386_shift_reg(s4 opc, s4 reg) {
+ *(mcodeptr++) = (u1) 0xd3;
+ i386_emit_reg((opc),(reg));
+}
- a = (s4) m->stubroutine;
- d = m->returntype;
- i386_mov_imm_reg(a, REG_ITMP2);
- i386_call_reg(REG_ITMP2);
- break;
- case ICMD_INVOKEVIRTUAL:
+void i386_shift_membase(s4 opc, s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xd3;
+ i386_emit_membase((basereg),(disp),(opc));
+}
- i386_mov_membase_reg(REG_SP, 0, REG_ITMP2);
- gen_nullptr_check(REG_ITMP2);
- i386_mov_membase_reg(REG_ITMP2, OFFSET(java_objectheader, vftbl), REG_ITMP3);
- i386_mov_membase32_reg(REG_ITMP3, OFFSET(vftbl, table[0]) + sizeof(methodptr) * m->vftblindex, REG_ITMP1);
- d = m->returntype;
- i386_call_reg(REG_ITMP1);
- break;
+void i386_shift_imm_reg(s4 opc, s4 imm, s4 dreg) {
+ if ((imm) == 1) {
+ *(mcodeptr++) = (u1) 0xd1;
+ i386_emit_reg((opc),(dreg));
+ } else {
+ *(mcodeptr++) = (u1) 0xc1;
+ i386_emit_reg((opc),(dreg));
+ i386_emit_imm8((imm));
+ }
+}
- case ICMD_INVOKEINTERFACE:
- ci = m->class;
- i386_mov_membase_reg(REG_SP, 0, REG_ITMP2);
- gen_nullptr_check(REG_ITMP2);
- i386_mov_membase_reg(REG_ITMP2, OFFSET(java_objectheader, vftbl), REG_ITMP3);
- i386_mov_membase_reg(REG_ITMP3, OFFSET(vftbl, interfacetable[0]) - sizeof(methodptr) * ci->index, REG_ITMP3);
- i386_mov_membase32_reg(REG_ITMP3, sizeof(methodptr) * (m - ci->methods), REG_ITMP1);
+void i386_shift_imm_membase(s4 opc, s4 imm, s4 basereg, s4 disp) {
+ if ((imm) == 1) {
+ *(mcodeptr++) = (u1) 0xd1;
+ i386_emit_membase((basereg),(disp),(opc));
+ } else {
+ *(mcodeptr++) = (u1) 0xc1;
+ i386_emit_membase((basereg),(disp),(opc));
+ i386_emit_imm8((imm));
+ }
+}
- d = m->returntype;
- i386_call_reg(REG_ITMP1);
- break;
- default:
- d = 0;
- sprintf (logtext, "Unkown ICMD-Command: %d", iptr->opc);
- error ();
- }
+void i386_shld_reg_reg(s4 reg, s4 dreg) {
+ *(mcodeptr++) = (u1) 0x0f;
+ *(mcodeptr++) = (u1) 0xa5;
+ i386_emit_reg((reg),(dreg));
+}
- /* d contains return type */
- if (d != TYPE_VOID) {
- d = reg_of_var(iptr->dst, REG_ITMP3);
+void i386_shld_imm_reg_reg(s4 imm, s4 reg, s4 dreg) {
+ *(mcodeptr++) = (u1) 0x0f;
+ *(mcodeptr++) = (u1) 0xa4;
+ i386_emit_reg((reg),(dreg));
+ i386_emit_imm8((imm));
+}
- if (IS_INT_LNG_TYPE(iptr->dst->type)) {
- if (IS_2_WORD_TYPE(iptr->dst->type)) {
- if (iptr->dst->flags & INMEMORY) {
- i386_mov_reg_membase(REG_RESULT, REG_SP, iptr->dst->regoff * 8);
- i386_mov_reg_membase(REG_RESULT2, REG_SP, iptr->dst->regoff * 8 + 4);
- } else {
- panic("longs have to be in memory");
- }
+void i386_shld_reg_membase(s4 reg, s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0x0f;
+ *(mcodeptr++) = (u1) 0xa5;
+ i386_emit_membase((basereg),(disp),(reg));
+}
- } else {
- if (iptr->dst->flags & INMEMORY) {
- i386_mov_reg_membase(REG_RESULT, REG_SP, iptr->dst->regoff * 8);
- } else {
- M_INTMOVE(REG_RESULT, iptr->dst->regoff);
- }
- }
+void i386_shrd_reg_reg(s4 reg, s4 dreg) {
+ *(mcodeptr++) = (u1) 0x0f;
+ *(mcodeptr++) = (u1) 0xad;
+ i386_emit_reg((reg),(dreg));
+}
- } else {
- /* nothing to do for float/double */
- }
- }
- }
- break;
+void i386_shrd_imm_reg_reg(s4 imm, s4 reg, s4 dreg) {
+ *(mcodeptr++) = (u1) 0x0f;
+ *(mcodeptr++) = (u1) 0xac;
+ i386_emit_reg((reg),(dreg));
+ i386_emit_imm8((imm));
+}
- case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult */
- /* op1: 0 == array, 1 == class */
- /* val.a: (classinfo*) superclass */
+void i386_shrd_reg_membase(s4 reg, s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0x0f;
+ *(mcodeptr++) = (u1) 0xad;
+ i386_emit_membase((basereg),(disp),(reg));
+}
-/* superclass is an interface:
- *
- * return (sub != NULL) &&
- * (sub->vftbl->interfacetablelength > super->index) &&
- * (sub->vftbl->interfacetable[-super->index] != NULL);
- *
- * superclass is a class:
- *
- * return ((sub != NULL) && (0
- * <= (sub->vftbl->baseval - super->vftbl->baseval) <=
- * super->vftbl->diffvall));
+
+
+/*
+ * jump operations
*/
+void i386_jmp_imm(s4 imm) {
+ *(mcodeptr++) = (u1) 0xe9;
+ i386_emit_imm32((imm));
+}
- {
- classinfo *super = (classinfo*) iptr->val.a;
-
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(iptr->dst, REG_ITMP3);
-/* if (s1 == d) { */
-/* M_MOV(s1, REG_ITMP1); */
-/* s1 = REG_ITMP1; */
-/* } */
- if (iptr->op1) { /* class/interface */
- if (super->flags & ACC_INTERFACE) { /* interface */
- int offset = 0;
- i386_alu_imm_reg(I386_CMP, 0, s1);
- /* TODO: clean up this calculation */
- offset += 2;
- CALCOFFSETBYTES(OFFSET(java_objectheader, vftbl));
+void i386_jmp_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xff;
+ i386_emit_reg(4,(reg));
+}
- offset += 2;
- CALCOFFSETBYTES(OFFSET(vftbl, interfacetablelength));
-
- offset += 2;
- CALCOFFSETBYTES(-super->index);
-
- offset += 3;
- offset += 6;
- offset += 2;
- CALCOFFSETBYTES(OFFSET(vftbl, interfacetable[0]) - super->index * sizeof(methodptr*));
+void i386_jcc(s4 opc, s4 imm) {
+ *(mcodeptr++) = (u1) 0x0f;
+ *(mcodeptr++) = (u1) (0x80 + i386_jcc_map[(opc)]);
+ i386_emit_imm32((imm));
+}
- offset += 3;
- offset += 3;
- i386_jcc(I386_CC_E, offset);
- i386_mov_membase_reg(s1, OFFSET(java_objectheader, vftbl), REG_ITMP1);
- i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, interfacetablelength), REG_ITMP2);
- i386_alu_imm_reg(I386_SUB, super->index, REG_ITMP2);
- i386_alu_imm_reg(I386_CMP, 0, REG_ITMP2);
+/*
+ * conditional set operations
+ */
+void i386_setcc_reg(s4 opc, s4 reg) {
+ *(mcodeptr++) = (u1) 0x0f;
+ *(mcodeptr++) = (u1) (0x90 + i386_jcc_map[(opc)]);
+ i386_emit_reg(0,(reg));
+}
- /* TODO: clean up this calculation */
- offset = 0;
- offset += 2;
- CALCOFFSETBYTES(OFFSET(vftbl, interfacetable[0]) - super->index * sizeof(methodptr*));
- offset += 3;
- offset += 3;
+void i386_setcc_membase(s4 opc, s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0x0f;
+ *(mcodeptr++) = (u1) (0x90 + i386_jcc_map[(opc)]);
+ i386_emit_membase((basereg),(disp),0);
+}
- offset += 6; /* jcc */
- offset += 5;
- i386_jcc(I386_CC_LE, offset);
- i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, interfacetable[0]) - super->index * sizeof(methodptr*), REG_ITMP1);
- i386_alu_reg_reg(I386_XOR, d, d);
- i386_alu_imm_reg(I386_CMP, 0, REG_ITMP1);
-/* i386_setcc_reg(I386_CC_A, d); */
- i386_jcc(I386_CC_BE, 5);
- i386_mov_imm_reg(1, d);
-
- } else { /* class */
- int offset = 0;
- i386_alu_imm_reg(I386_CMP, 0, s1);
+void i386_neg_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xf7;
+ i386_emit_reg(3,(reg));
+}
- /* TODO: clean up this calculation */
- offset += 2;
- CALCOFFSETBYTES(OFFSET(java_objectheader, vftbl));
- offset += 5;
+void i386_neg_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xf7;
+ i386_emit_membase((basereg),(disp),3);
+}
- offset += 2;
- CALCOFFSETBYTES(OFFSET(vftbl, baseval));
-
- offset += 2;
- CALCOFFSETBYTES(OFFSET(vftbl, baseval));
-
- offset += 2;
- CALCOFFSETBYTES(OFFSET(vftbl, diffval));
-
- offset += 2;
- offset += 2;
- offset += 2;
- offset += 6; /* jcc */
- offset += 5;
- i386_jcc(I386_CC_E, offset);
+void i386_push_imm(s4 imm) {
+ *(mcodeptr++) = (u1) 0x68;
+ i386_emit_imm32((imm));
+}
- i386_mov_membase_reg(s1, OFFSET(java_objectheader, vftbl), REG_ITMP1);
- i386_mov_imm_reg((void *) super->vftbl, REG_ITMP2);
- i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, baseval), REG_ITMP1);
- i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, baseval), REG_ITMP3);
- i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, diffval), REG_ITMP2);
- i386_alu_reg_reg(I386_SUB, REG_ITMP3, REG_ITMP1);
- i386_alu_reg_reg(I386_XOR, d, d);
- i386_alu_reg_reg(I386_CMP, REG_ITMP2, REG_ITMP1);
-/* i386_setcc_reg(I386_CC_BE, d); */
- i386_jcc(I386_CC_A, 5);
- i386_mov_imm_reg(1, d);
-
- }
- }
- else
- panic ("internal error: no inlined array instanceof");
- }
- store_reg_to_var_int(iptr->dst, d);
- break;
- case ICMD_CHECKCAST: /* ..., objectref ==> ..., objectref */
+void i386_pop_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0x58 + (0x07 & (reg));
+}
- /* op1: 0 == array, 1 == class */
- /* val.a: (classinfo*) superclass */
-/* superclass is an interface:
- *
- * OK if ((sub == NULL) ||
- * (sub->vftbl->interfacetablelength > super->index) &&
- * (sub->vftbl->interfacetable[-super->index] != NULL));
- *
- * superclass is a class:
- *
- * OK if ((sub == NULL) || (0
- * <= (sub->vftbl->baseval - super->vftbl->baseval) <=
- * super->vftbl->diffvall));
+void i386_nop() {
+ *(mcodeptr++) = (u1) 0x90;
+}
+
+
+/*
+ * call instructions
*/
+void i386_call_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xff;
+ i386_emit_reg(2,(reg));
+}
- {
- classinfo *super = (classinfo*) iptr->val.a;
-
- d = reg_of_var(iptr->dst, REG_ITMP3);
- var_to_reg_int(s1, src, d);
- if (iptr->op1) { /* class/interface */
- if (super->flags & ACC_INTERFACE) { /* interface */
- int offset = 0;
- i386_alu_imm_reg(I386_CMP, 0, s1);
- /* TODO: clean up this calculation */
- offset += 2;
- CALCOFFSETBYTES(OFFSET(java_objectheader, vftbl));
+void i386_call_imm(s4 imm) {
+ *(mcodeptr++) = (u1) 0xe8;
+ i386_emit_imm32((imm));
+}
- offset += 2;
- CALCOFFSETBYTES(OFFSET(vftbl, interfacetablelength));
- offset += 2;
- CALCOFFSETBYTES(-super->index);
- offset += 3;
- offset += 6;
+/*
+ * floating point instructions
+ */
+void i386_fld1() {
+ *(mcodeptr++) = (u1) 0xd9;
+ *(mcodeptr++) = (u1) 0xe8;
+}
- offset += 2;
- CALCOFFSETBYTES(OFFSET(vftbl, interfacetable[0]) - super->index * sizeof(methodptr*));
- offset += 3;
- offset += 6;
+void i386_fldz() {
+ *(mcodeptr++) = (u1) 0xd9;
+ *(mcodeptr++) = (u1) 0xee;
+}
- i386_jcc(I386_CC_E, offset);
- i386_mov_membase_reg(s1, OFFSET(java_objectheader, vftbl), REG_ITMP1);
- i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, interfacetablelength), REG_ITMP2);
- i386_alu_imm_reg(I386_SUB, super->index, REG_ITMP2);
- i386_alu_imm_reg(I386_CMP, 0, REG_ITMP2);
- i386_jcc(I386_CC_LE, 0);
- mcode_addxcastrefs(mcodeptr);
- i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, interfacetable[0]) - super->index * sizeof(methodptr*), REG_ITMP2);
- i386_alu_imm_reg(I386_CMP, 0, REG_ITMP2);
- i386_jcc(I386_CC_E, 0);
- mcode_addxcastrefs(mcodeptr);
+void i386_fld_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xd9;
+ *(mcodeptr++) = (u1) 0xc0 + (0x07 & (reg));
+}
- } else { /* class */
- int offset = 0;
- i386_alu_imm_reg(I386_CMP, 0, s1);
- /* TODO: clean up this calculation */
- offset += 2;
- CALCOFFSETBYTES(OFFSET(java_objectheader, vftbl));
+void i386_flds_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xd9;
+ i386_emit_membase((basereg),(disp),0);
+}
- offset += 5;
- offset += 2;
- CALCOFFSETBYTES(OFFSET(vftbl, baseval));
+void i386_fldl_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xdd;
+ i386_emit_membase((basereg),(disp),0);
+}
- if (d != REG_ITMP3) {
- offset += 2;
- CALCOFFSETBYTES(OFFSET(vftbl, baseval));
-
- offset += 2;
- CALCOFFSETBYTES(OFFSET(vftbl, diffval));
- offset += 2;
-
- } else {
- offset += 2;
- CALCOFFSETBYTES(OFFSET(vftbl, baseval));
+void i386_fldt_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xdb;
+ i386_emit_membase((basereg),(disp),5);
+}
- offset += 2;
- offset += 5;
+void i386_flds_memindex(s4 disp, s4 basereg, s4 indexreg, s4 scale) {
+ *(mcodeptr++) = (u1) 0xd9;
+ i386_emit_memindex(0,(disp),(basereg),(indexreg),(scale));
+}
- offset += 2;
- CALCOFFSETBYTES(OFFSET(vftbl, diffval));
- }
- offset += 2;
+void i386_fldl_memindex(s4 disp, s4 basereg, s4 indexreg, s4 scale) {
+ *(mcodeptr++) = (u1) 0xdd;
+ i386_emit_memindex(0,(disp),(basereg),(indexreg),(scale));
+}
- offset += 6;
- i386_jcc(I386_CC_E, offset);
- i386_mov_membase_reg(s1, OFFSET(java_objectheader, vftbl), REG_ITMP1);
- i386_mov_imm_reg((void *) super->vftbl, REG_ITMP2);
- i386_mov_membase_reg(REG_ITMP1, OFFSET(vftbl, baseval), REG_ITMP1);
- if (d != REG_ITMP3) {
- i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, baseval), REG_ITMP3);
- i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, diffval), REG_ITMP2);
- i386_alu_reg_reg(I386_SUB, REG_ITMP3, REG_ITMP1);
- } else {
- i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, baseval), REG_ITMP2);
- i386_alu_reg_reg(I386_SUB, REG_ITMP2, REG_ITMP1);
- i386_mov_imm_reg((void *) super->vftbl, REG_ITMP2);
- i386_mov_membase_reg(REG_ITMP2, OFFSET(vftbl, diffval), REG_ITMP2);
- }
- i386_alu_reg_reg(I386_CMP, REG_ITMP2, REG_ITMP1);
- i386_jcc(I386_CC_B, 0);
- mcode_addxcastrefs(mcodeptr);
- }
- }
- else
- panic ("internal error: no inlined array checkcast");
- }
- M_INTMOVE(s1, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
+void i386_fildl_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xdb;
+ i386_emit_membase((basereg),(disp),0);
+}
+
+
+void i386_fildll_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xdf;
+ i386_emit_membase((basereg),(disp),5);
+}
+
- case ICMD_CHECKASIZE: /* ..., size ==> ..., size */
- if (src->flags & INMEMORY) {
- i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
-
- } else {
- i386_alu_imm_reg(I386_CMP, 0, src->regoff);
- }
- i386_jcc(I386_CC_L, 0);
- mcode_addxcheckarefs(mcodeptr);
- break;
- case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref */
- /* op1 = dimension, val.a = array descriptor */
+void i386_fst_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xdd;
+ *(mcodeptr++) = (u1) 0xd0 + (0x07 & (reg));
+}
- /* check for negative sizes and copy sizes to stack if necessary */
- MCODECHECK((iptr->op1 << 1) + 64);
+void i386_fsts_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xd9;
+ i386_emit_membase((basereg),(disp),2);
+}
- for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
- if (src->flags & INMEMORY) {
- i386_alu_imm_membase(I386_CMP, 0, REG_SP, src->regoff * 8);
- } else {
- i386_alu_imm_reg(I386_CMP, 0, src->regoff);
- }
- i386_jcc(I386_CC_LE, 0);
- mcode_addxcheckarefs(mcodeptr);
+void i386_fstl_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xdd;
+ i386_emit_membase((basereg),(disp),2);
+}
- /*
- * copy sizes to new stack location, be cause native function
- * builtin_nmultianewarray access them as (int *)
- */
- i386_mov_membase_reg(REG_SP, src->regoff * 8, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, -(iptr->op1 - s1) * 4);
- /* copy sizes to stack (argument numbers >= INT_ARG_CNT) */
+void i386_fsts_memindex(s4 disp, s4 basereg, s4 indexreg, s4 scale) {
+ *(mcodeptr++) = (u1) 0xd9;
+ i386_emit_memindex(2,(disp),(basereg),(indexreg),(scale));
+}
- if (src->varkind != ARGVAR) {
- if (src->flags & INMEMORY) {
- i386_mov_membase_reg(REG_SP, (src->regoff + intreg_argnum) * 8, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, (s1 + intreg_argnum) * 8);
- } else {
- i386_mov_reg_membase(src->regoff, REG_SP, (s1 + intreg_argnum) * 8);
- }
- }
- }
- i386_alu_imm_reg(I386_SUB, iptr->op1 * 4, REG_SP);
+void i386_fstl_memindex(s4 disp, s4 basereg, s4 indexreg, s4 scale) {
+ *(mcodeptr++) = (u1) 0xdd;
+ i386_emit_memindex(2,(disp),(basereg),(indexreg),(scale));
+}
- /* a0 = dimension count */
- /* save stack pointer */
- M_INTMOVE(REG_SP, REG_ITMP1);
+void i386_fstp_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xdd;
+ *(mcodeptr++) = (u1) 0xd8 + (0x07 & (reg));
+}
- i386_alu_imm_reg(I386_SUB, 12, REG_SP);
- i386_mov_imm_membase(iptr->op1, REG_SP, 0);
- /* a1 = arraydescriptor */
+void i386_fstps_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xd9;
+ i386_emit_membase((basereg),(disp),3);
+}
- i386_mov_imm_membase(iptr->val.a, REG_SP, 4);
- /* a2 = pointer to dimensions = stack pointer */
+void i386_fstpl_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xdd;
+ i386_emit_membase((basereg),(disp),3);
+}
- i386_mov_reg_membase(REG_ITMP1, REG_SP, 8);
- i386_mov_imm_reg((void*) (builtin_nmultianewarray), REG_ITMP1);
- i386_call_reg(REG_ITMP1);
- i386_alu_imm_reg(I386_ADD, 12 + iptr->op1 * 4, REG_SP);
+void i386_fstpt_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xdb;
+ i386_emit_membase((basereg),(disp),7);
+}
- s1 = reg_of_var(iptr->dst, REG_RESULT);
- M_INTMOVE(REG_RESULT, s1);
- store_reg_to_var_int(iptr->dst, s1);
- break;
+void i386_fstps_memindex(s4 disp, s4 basereg, s4 indexreg, s4 scale) {
+ *(mcodeptr++) = (u1) 0xd9;
+ i386_emit_memindex(3,(disp),(basereg),(indexreg),(scale));
+}
- default: sprintf (logtext, "Unknown pseudo command: %d", iptr->opc);
- error();
-
-
- } /* switch */
-
- } /* for instruction */
-
- /* copy values to interface registers */
+void i386_fstpl_memindex(s4 disp, s4 basereg, s4 indexreg, s4 scale) {
+ *(mcodeptr++) = (u1) 0xdd;
+ i386_emit_memindex(3,(disp),(basereg),(indexreg),(scale));
+}
- src = bptr->outstack;
- len = bptr->outdepth;
- MCODECHECK(64+len);
- while (src) {
- len--;
- if ((src->varkind != STACKVAR)) {
- s2 = src->type;
- if (IS_FLT_DBL_TYPE(s2)) {
- var_to_reg_flt(s1, src, REG_FTMP1);
- if (!(interfaces[len][s2].flags & INMEMORY)) {
- M_FLTMOVE(s1,interfaces[len][s2].regoff);
- }
- else {
- M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
- }
- }
- else {
- var_to_reg_int(s1, src, REG_ITMP1);
- if (!(interfaces[len][s2].flags & INMEMORY)) {
- M_INTMOVE(s1,interfaces[len][s2].regoff);
- }
- else {
- M_LST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
- }
- }
- }
- src = src->prev;
- }
- } /* if (bptr -> flags >= BBREACHED) */
- } /* for basic block */
- /* bptr -> mpc = (int)((u1*) mcodeptr - mcodebase); */
+void i386_fistl_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xdb;
+ i386_emit_membase((basereg),(disp),2);
+}
- {
- /* generate bound check stubs */
- s4 *xcodeptr = NULL;
-
- for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
- if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
- gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
- xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (5 + 3));
- continue;
- }
+void i386_fistpl_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xdb;
+ i386_emit_membase((basereg),(disp),3);
+}
- gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
- xboundrefs->branchpos, (u1*) mcodeptr - mcodebase);
+void i386_fistpll_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xdf;
+ i386_emit_membase((basereg),(disp),7);
+}
- MCODECHECK(8);
- i386_mov_imm_reg(0, REG_ITMP2_XPC); /* 5 bytes */
- dseg_adddata(mcodeptr);
- i386_alu_imm_reg(I386_ADD, xboundrefs->branchpos - 4, REG_ITMP2_XPC); /* 3 bytes */
+void i386_fchs() {
+ *(mcodeptr++) = (u1) 0xd9;
+ *(mcodeptr++) = (u1) 0xe0;
+}
- if (xcodeptr != NULL) {
- i386_jmp((xcodeptr - mcodeptr) - 1);
- } else {
- xcodeptr = mcodeptr;
+void i386_faddp() {
+ *(mcodeptr++) = (u1) 0xde;
+ *(mcodeptr++) = (u1) 0xc1;
+}
- i386_mov_imm_reg(proto_java_lang_ArrayIndexOutOfBoundsException, REG_ITMP1_XPTR);
- i386_mov_imm_reg(asm_handle_exception, REG_ITMP3);
- i386_jmp_reg(REG_ITMP3);
- }
- }
- /* generate negative array size check stubs */
- xcodeptr = NULL;
-
- for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
- if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
- gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
- xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (5 + 3));
- continue;
- }
+void i386_fadd_reg_st(s4 reg) {
+ *(mcodeptr++) = (u1) 0xd8;
+ *(mcodeptr++) = (u1) 0xc0 + (0x0f & (reg));
+}
- gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
- xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase);
- MCODECHECK(8);
+void i386_fadd_st_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xdc;
+ *(mcodeptr++) = (u1) 0xc0 + (0x0f & (reg));
+}
- i386_mov_imm_reg(0, REG_ITMP2_XPC); /* 5 bytes */
- dseg_adddata(mcodeptr);
- i386_alu_imm_reg(I386_ADD, xcheckarefs->branchpos - 4, REG_ITMP2_XPC); /* 3 bytes */
- if (xcodeptr != NULL) {
- i386_jmp((xcodeptr - mcodeptr) - 1);
+void i386_faddp_st_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xde;
+ *(mcodeptr++) = (u1) 0xc0 + (0x0f & (reg));
+}
- } else {
- xcodeptr = mcodeptr;
- i386_mov_imm_reg(proto_java_lang_NegativeArraySizeException, REG_ITMP1_XPTR);
- i386_mov_imm_reg(asm_handle_exception, REG_ITMP3);
- i386_jmp_reg(REG_ITMP3);
- }
- }
+void i386_fadds_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xd8;
+ i386_emit_membase((basereg),(disp),0);
+}
- /* generate cast check stubs */
- xcodeptr = NULL;
-
- for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
- if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
- gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
- xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (5 + 3));
- continue;
- }
- gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
- xcastrefs->branchpos, (u1*) mcodeptr - mcodebase);
+void i386_faddl_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xdc;
+ i386_emit_membase((basereg),(disp),0);
+}
- MCODECHECK(8);
- i386_mov_imm_reg(0, REG_ITMP2_XPC); /* 5 bytes */
- dseg_adddata(mcodeptr);
- i386_alu_imm_reg(I386_ADD, xcastrefs->branchpos - 4, REG_ITMP2_XPC); /* 3 bytes (max. 6 bytes) */
+void i386_fsub_reg_st(s4 reg) {
+ *(mcodeptr++) = (u1) 0xd8;
+ *(mcodeptr++) = (u1) 0xe0 + (0x07 & (reg));
+}
- if (xcodeptr != NULL) {
- i386_jmp(((u1 *) xcodeptr - (u1 *) mcodeptr) - 4);
-
- } else {
- xcodeptr = mcodeptr;
- i386_mov_imm_reg(proto_java_lang_ClassCastException, REG_ITMP1_XPTR);
- i386_mov_imm_reg(asm_handle_exception, REG_ITMP3);
- i386_jmp_reg(REG_ITMP3);
- }
- }
+void i386_fsub_st_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xdc;
+ *(mcodeptr++) = (u1) 0xe8 + (0x07 & (reg));
+}
-#ifdef SOFTNULLPTRCHECK
- /* generate cast check stubs */
- xcodeptr = NULL;
-
- for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
- if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
- gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
- xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
- continue;
- }
+void i386_fsubp_st_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xde;
+ *(mcodeptr++) = (u1) 0xe8 + (0x07 & (reg));
+}
- gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
- xnullrefs->branchpos, (u1*) mcodeptr - mcodebase);
- MCODECHECK(8);
+void i386_fsubp() {
+ *(mcodeptr++) = (u1) 0xde;
+ *(mcodeptr++) = (u1) 0xe9;
+}
- i386_mov_imm_reg(0, REG_ITMP2_XPC); /* 5 bytes */
- dseg_adddata(mcodeptr);
- i386_alu_imm_reg(I386_ADD, xnullrefs->branchpos - 4, REG_ITMP2_XPC); /* 3 bytes */
- if (xcodeptr != NULL) {
- i386_jmp((xcodeptr - mcodeptr) - 1);
-
- } else {
- xcodeptr = mcodeptr;
+void i386_fsubs_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xd8;
+ i386_emit_membase((basereg),(disp),4);
+}
- i386_mov_imm_reg(proto_java_lang_NullPointerException, REG_ITMP1_XPTR);
- i386_mov_imm_reg(asm_handle_exception, REG_ITMP3);
- i386_jmp_reg(REG_ITMP3);
- }
- }
-#endif
- }
+void i386_fsubl_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xdc;
+ i386_emit_membase((basereg),(disp),4);
+}
- mcode_finish((int)((u1*) mcodeptr - mcodebase));
+
+void i386_fmul_reg_st(s4 reg) {
+ *(mcodeptr++) = (u1) 0xd8;
+ *(mcodeptr++) = (u1) 0xc8 + (0x07 & (reg));
}
-/* function createcompilerstub *************************************************
+void i386_fmul_st_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xdc;
+ *(mcodeptr++) = (u1) 0xc8 + (0x07 & (reg));
+}
- creates a stub routine which calls the compiler
-
-*******************************************************************************/
-#define COMPSTUBSIZE 3
+void i386_fmulp() {
+ *(mcodeptr++) = (u1) 0xde;
+ *(mcodeptr++) = (u1) 0xc9;
+}
-u1 *createcompilerstub (methodinfo *m)
-{
- u8 *s = CNEW (u8, COMPSTUBSIZE); /* memory to hold the stub */
- s4 *p = (s4*) s; /* code generation pointer */
- s4 *mcodeptr = p; /* make macros work */
-
- /* code for the stub */
- i386_mov_imm_reg(m, I386_EAX); /* pass method pointer to compiler */
- i386_mov_imm_reg(asm_call_jit_compiler, REG_ITMP2); /* load address */
- i386_jmp_reg(REG_ITMP2); /* jump to compiler */
+void i386_fmulp_st_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xde;
+ *(mcodeptr++) = (u1) 0xc8 + (0x07 & (reg));
+}
-#ifdef STATISTICS
- count_cstub_len += COMPSTUBSIZE * 8;
-#endif
- return (u1*) s;
+void i386_fmuls_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xd8;
+ i386_emit_membase((basereg),(disp),1);
}
-/* function removecompilerstub *************************************************
+void i386_fmull_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xdc;
+ i386_emit_membase((basereg),(disp),1);
+}
- deletes a compilerstub from memory (simply by freeing it)
-*******************************************************************************/
+void i386_fdiv_reg_st(s4 reg) {
+ *(mcodeptr++) = (u1) 0xd8;
+ *(mcodeptr++) = (u1) 0xf0 + (0x07 & (reg));
+}
-void removecompilerstub (u1 *stub)
-{
- CFREE (stub, COMPSTUBSIZE * 8);
+
+void i386_fdiv_st_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xdc;
+ *(mcodeptr++) = (u1) 0xf8 + (0x07 & (reg));
}
-/* function: createnativestub **************************************************
- creates a stub routine which calls a native method
+void i386_fdivp() {
+ *(mcodeptr++) = (u1) 0xde;
+ *(mcodeptr++) = (u1) 0xf9;
+}
-*******************************************************************************/
-#define NATIVESTUBSIZE 18
+void i386_fdivp_st_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xde;
+ *(mcodeptr++) = (u1) 0xf8 + (0x07 & (reg));
+}
-u1 *createnativestub (functionptr f, methodinfo *m)
-{
- u8 *s = CNEW (u8, NATIVESTUBSIZE); /* memory to hold the stub */
- s4 *p = (s4*) s; /* code generation pointer */
- /* TWISTI: get rid of those 2nd defines */
- s4 *mcodeptr = p;
-
- reg_init();
+void i386_fxch() {
+ *(mcodeptr++) = (u1) 0xd9;
+ *(mcodeptr++) = (u1) 0xc9;
+}
- /* TWISTI */
-/* M_MOV (argintregs[4],argintregs[5]); */
-/* M_FMOV (argfltregs[4],argfltregs[5]); */
-/* M_MOV (argintregs[3],argintregs[4]); */
-/* M_FMOV (argfltregs[3],argfltregs[4]); */
+void i386_fxch_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xd9;
+ *(mcodeptr++) = (u1) 0xc8 + (0x07 & (reg));
+}
+
-/* M_MOV (argintregs[2],argintregs[3]); */
-/* M_FMOV (argfltregs[2],argfltregs[3]); */
+void i386_fprem() {
+ *(mcodeptr++) = (u1) 0xd9;
+ *(mcodeptr++) = (u1) 0xf8;
+}
-/* M_MOV (argintregs[1],argintregs[2]); */
-/* M_FMOV (argfltregs[1],argfltregs[2]); */
-/* M_MOV (argintregs[0],argintregs[1]); */
-/* M_FMOV (argfltregs[0],argfltregs[1]); */
+void i386_fprem1() {
+ *(mcodeptr++) = (u1) 0xd9;
+ *(mcodeptr++) = (u1) 0xf5;
+}
-/* M_ALD (argintregs[0], REG_PV, 17*8); /* load adress of jni_environement */
-/* M_LDA (REG_SP, REG_SP, -8); /* build up stackframe */
-/* M_AST (REG_RA, REG_SP, 0); /* store return address */
+void i386_fucom() {
+ *(mcodeptr++) = (u1) 0xdd;
+ *(mcodeptr++) = (u1) 0xe1;
+}
-/* M_ALD (REG_PV, REG_PV, 14*8); /* load adress of native method */
-/* M_JSR (REG_RA, REG_PV); /* call native method */
- i386_alu_imm_reg(I386_SUB, 24, REG_SP); /* 20 = 5 * 4 (5 params * 4 bytes) */
+void i386_fucom_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xdd;
+ *(mcodeptr++) = (u1) 0xe0 + (0x07 & (reg));
+}
- i386_mov_membase_reg(REG_SP, 24 + 4, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, 4);
- i386_mov_membase_reg(REG_SP, 32 + 4, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, 8);
+void i386_fucomp_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xdd;
+ *(mcodeptr++) = (u1) 0xe8 + (0x07 & (reg));
+}
- i386_mov_membase_reg(REG_SP, 40 + 4, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, 12);
- i386_mov_membase_reg(REG_SP, 48 + 4, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, 16);
+void i386_fucompp() {
+ *(mcodeptr++) = (u1) 0xda;
+ *(mcodeptr++) = (u1) 0xe9;
+}
- i386_mov_membase_reg(REG_SP, 56 + 4, REG_ITMP1);
- i386_mov_reg_membase(REG_ITMP1, REG_SP, 20);
- i386_mov_imm_membase(&env, REG_SP, 0);
+void i386_fnstsw() {
+ *(mcodeptr++) = (u1) 0xdf;
+ *(mcodeptr++) = (u1) 0xe0;
+}
- i386_mov_imm_reg(f, REG_ITMP1);
- i386_call_reg(REG_ITMP1);
- i386_alu_imm_reg(I386_ADD, 24, REG_SP);
+void i386_sahf() {
+ *(mcodeptr++) = (u1) 0x9e;
+}
-/* M_LDA (REG_PV, REG_RA, -15*4); /* recompute pv from ra */
-/* M_ALD (REG_ITMP3, REG_PV, 15*8); /* get address of exceptionptr */
-/* M_ALD (REG_RA, REG_SP, 0); /* load return address */
-/* M_ALD (REG_ITMP1, REG_ITMP3, 0); /* load exception into reg. itmp1 */
+void i386_finit() {
+ *(mcodeptr++) = (u1) 0x9b;
+ *(mcodeptr++) = (u1) 0xdb;
+ *(mcodeptr++) = (u1) 0xe3;
+}
-/* M_LDA (REG_SP, REG_SP, 8); /* remove stackframe */
-/* M_BNEZ (REG_ITMP1, 1); /* if no exception then return */
-/* M_RET (REG_ZERO, REG_RA); /* return to caller */
- i386_ret();
+void i386_fldcw_mem(s4 mem) {
+ *(mcodeptr++) = (u1) 0xd9;
+ i386_emit_mem(5,(mem));
+}
-/* M_AST (REG_ZERO, REG_ITMP3, 0); /* store NULL into exceptionptr */
-/* M_LDA (REG_ITMP2, REG_RA, -4); /* move fault address into reg. itmp2 */
-/* M_ALD (REG_ITMP3, REG_PV,16*8); /* load asm exception handler address */
-/* M_JMP (REG_ZERO, REG_ITMP3); /* jump to asm exception handler */
+void i386_fldcw_membase(s4 basereg, s4 disp) {
+ *(mcodeptr++) = (u1) 0xd9;
+ i386_emit_membase((basereg),(disp),5);
+}
- /* TWISTI */
-/* s[14] = (u8) f; /* address of native method */
-/* s[15] = (u8) (&exceptionptr); /* address of exceptionptr */
-/* s[16] = (u8) (asm_handle_nat_exception); /* addr of asm exception handler */
-/* s[17] = (u8) (&env); /* addr of jni_environement */
- s[14] = (u4) f; /* address of native method */
- s[15] = (u8) (&exceptionptr); /* address of exceptionptr */
- s[16] = (u8) (asm_handle_nat_exception); /* addr of asm exception handler */
- s[17] = (u8) (&env); /* addr of jni_environement */
+void i386_wait() {
+ *(mcodeptr++) = (u1) 0x9b;
+}
-#ifdef STATISTICS
- count_nstub_len += NATIVESTUBSIZE * 8;
-#endif
- return (u1*) s;
+void i386_ffree_reg(s4 reg) {
+ *(mcodeptr++) = (u1) 0xdd;
+ *(mcodeptr++) = (u1) 0xc0 + (0x07 & (reg));
}
-/* function: removenativestub **************************************************
- removes a previously created native-stub from memory
-
-*******************************************************************************/
+void i386_fdecstp() {
+ *(mcodeptr++) = (u1) 0xd9;
+ *(mcodeptr++) = (u1) 0xf6;
+}
-void removenativestub (u1 *stub)
-{
- CFREE (stub, NATIVESTUBSIZE * 8);
+
+void i386_fincstp() {
+ *(mcodeptr++) = (u1) 0xd9;
+ *(mcodeptr++) = (u1) 0xf7;
}
+#endif
/*
* These are local overrides for various environment variables in Emacs.
projects / cacao.git / blobdiff