ldih/l

[calu.git] / dt / dt.qsf

diff --git a/dt/dt.qsf b/dt/dt.qsf
index 65a9c20b895628a7f87909690872d9d55f63db5f..1a461c3c0af95d206ecd4ba536d1f1b25f5218a4 100644 (file)
--- a/dt/dt.qsf
+++ b/dt/dt.qsf
@@ -55,13 +55,15 @@ set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_RO
 set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
 set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
 set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
-set_global_assignment -name MISC_FILE /homes/burban/dt/dt.dpf
-set_location_assignment PIN_166 -to bus_tx
+set_location_assignment PIN_178 -to bus_tx
 set_location_assignment PIN_152 -to sys_clk
 set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
 
-set_global_assignment -name MISC_FILE /homes/c0726283/calu/dt/dt.dpf
-set_location_assignment PIN_42 -to sys_res
+set_global_assignment -name VHDL_FILE ../cpu/src/rom.vhd
+set_global_assignment -name VHDL_FILE ../cpu/src/rom_b.vhd
+set_global_assignment -name VHDL_FILE ../cpu/src/extension_7seg_pkg.vhd
+set_global_assignment -name VHDL_FILE ../cpu/src/extension_7seg_b.vhd
+set_global_assignment -name VHDL_FILE ../cpu/src/extension_7seg.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/rs232_rx_arc.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/rs232_rx.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/writeback_stage_b.vhd
@@ -102,4 +104,22 @@ set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/shift_op_b.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/or_op_b.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/and_op_b.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/add_op_b.vhd
+
+set_global_assignment -name SMART_RECOMPILE ON
+set_global_assignment -name ENABLE_DRC_SETTINGS ON
+set_global_assignment -name ENABLE_CLOCK_LATENCY ON
+set_global_assignment -name ENABLE_RECOVERY_REMOVAL_ANALYSIS ON
+set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE SPEED
+set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
+set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION ON
+set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM
+set_global_assignment -name AUTO_PACKED_REGISTERS_CYCLONE NORMAL
+set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
+set_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP ON
+set_global_assignment -name MUX_RESTRUCTURE OFF
+set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
+set_location_assignment PIN_153 -to bus_rx
+set_location_assignment PIN_42 -to sys_res_unsync
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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