Update the FAM10 microcode to current versions.

[coreboot.git] / documentation / LinuxBIOS-AMD64.tex

diff --git a/documentation/LinuxBIOS-AMD64.tex b/documentation/LinuxBIOS-AMD64.tex
index 40feb21be333958c6b74d15f7ddcce340a46a1f7..316d37be2b3511ce84a9fd388c7824532bbdcf24 100644 (file)
--- a/documentation/LinuxBIOS-AMD64.tex
+++ b/documentation/LinuxBIOS-AMD64.tex
@@ -148,7 +148,7 @@ Once the source tree is checked out, it can be updated with:
 
 { \small
 \begin{verbatim}
-% cvs update ­Pd
+% cvs update -Pd
 \end{verbatim}
 }
 
@@ -330,7 +330,7 @@ If an option contains a string, this string has to be protected with
 quotation marks: 
 
 \begin{verbatim}
-        default CC="gcc ­m32"
+        default CC="gcc -m32"
 \end{verbatim}
 
 \item \begin{verbatim}option\end{verbatim}
@@ -374,7 +374,7 @@ path to a static elf binary (i.e Linux kernel or etherboot)
 romimage "normal"
         option USE_FALLBACK_IMAGE=0
         option ROM_IMAGE_SIZE=0x10000
-        option LINUXBIOS_EXTRA_VERSION=".0Normal"
+        option COREBOOT_EXTRA_VERSION=".0Normal"
         mainboard amd/solo
         payload /suse/stepan/tg3ide_
         disk.zelf
@@ -407,7 +407,7 @@ option on how to set them.
 \item \begin{verbatim}CC\end{verbatim}
 
 Target C Compiler. Default is \texttt{\$(CROSS\_COMPILE)gcc}. Set to
-\texttt{gcc ­m32} for compiling AMD64 LinuxBIOS images on an AMD64 
+\texttt{gcc -m32} for compiling AMD64 LinuxBIOS images on an AMD64 
 machine.
 
 \item \begin{verbatim}CONFIG_CHIP_CONFIGURE \end{verbatim}
@@ -446,9 +446,9 @@ Export CMOS option table. Default is \texttt{0}. Set to \texttt{1} if
 your mainboard has CMOS memory and you want to use it to store
 LinuxBIOS parameters (Loglevel, serial line speed, ...)
 
-\item \begin{verbatim}CONFIG_ROM_STREAM\end{verbatim}
+\item \begin{verbatim}CONFIG_ROM_PAYLOAD\end{verbatim}
 
-Boot image is located in ROM (as opposed to \texttt{CONFIG\_IDE\_STREAM}, which
+Boot image is located in ROM (as opposed to \texttt{CONFIG\_IDE\_PAYLOAD}, which
 will boot from an IDE disk)
 
 \item \begin{verbatim}HAVE_FALLBACK_BOOT\end{verbatim}
@@ -471,7 +471,7 @@ Set to \texttt{1} to build a fallback image. Defaults to \texttt{0}
 
 Default image size. Defaults to \texttt{65535} bytes.
 
-\item \begin{verbatim}LINUXBIOS_EXTRA_VERSION\end{verbatim}
+\item \begin{verbatim}COREBOOT_EXTRA_VERSION\end{verbatim}
 
 LinuxBIOS extra version. This option has an empty string as default. Set
 to any string to add an extra version string to your LinuxBIOS build.
@@ -552,12 +552,12 @@ do:
 \begin{verbatim}
 makerule ./auto.E
         depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
-        action "./romcc -E -mcpu=k8 -O2 ­I$(TOP)/src -I. $(CPPFLAGS) \
+        action "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) \
                $(MAINBOARD)/auto.c -o $@"
 end
 makerule ./auto.inc
         depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
-        action "./romcc    -mcpu=k8 -O2 ­I$(TOP)/src -I. $(CPPFLAGS) \
+        action "./romcc    -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) \
                 $(MAINBOARD)/auto.c -o $@"
 end
 \end{verbatim}
@@ -724,7 +724,7 @@ the case, the \texttt{superio} section will be a subsection of the
 Example:
 
 \begin{verbatim}
-superio NSC/pc87360 link 1
+superio nsc/pc87360 link 1
         pnp 2e.0
         pnp 2e.1
         pnp 2e.2