copyleft: gplv3 added and set repo to public

[calu.git] / cpu / src / rs232_rx.vhd

diff --git a/cpu/src/rs232_rx.vhd b/cpu/src/rs232_rx.vhd
index 6f83cebb8eca8f0835435ba75d4df3d8d2154fe2..7bd6d74e696443c856bf2cc982217e27e6fa5097 100755 (executable)
--- a/cpu/src/rs232_rx.vhd
+++ b/cpu/src/rs232_rx.vhd
@@ -1,13 +1,23 @@
----------------------------------------------------------------------------------
--- Filename : rs232_rx.vhd
--- ========== 
--- 
--- Beschreibung : Empfang von Daten ueber die RS232 Schnittstelle
--- ==============
+--   `Deep Thought', a softcore CPU implemented on a FPGA
 --
--- Autoren : Martin Perner, Schwarz Manfred
--- =========
-----------------------------------------------------------------------------------
+--  Copyright (C) 2010 Markus Hofstaetter <markus.manrow@gmx.at>
+--  Copyright (C) 2010 Martin Perner <e0725782@student.tuwien.ac.at>
+--  Copyright (C) 2010 Stefan Rebernig <stefan.rebernig@gmail.com>
+--  Copyright (C) 2010 Manfred Schwarz <e0725898@student.tuwien.ac.at>
+--  Copyright (C) 2010 Bernhard Urban <lewurm@gmail.com>
+--
+--  This program is free software: you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation, either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 library IEEE;
 use IEEE.std_logic_1164.all;
@@ -20,7 +30,8 @@ use work.extension_uart_pkg.all;
 entity rs232_rx is
        generic (
                -- active reset value
-               RESET_VALUE : std_logic
+               RESET_VALUE : std_logic;
+               SYNC_STAGES : integer range 2 to integer'high
                );
 
        port(
@@ -29,7 +40,7 @@ entity rs232_rx is
                sys_res_n : in std_logic;
 
                --Bus
-               bus_rx : in std_logic;
+               bus_rx_unsync : in std_logic;
 
                --To sendlogic
                new_rx_data : out std_logic;