port map (
clk,
- instr_w_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0),
+ im_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0),
instr_r_addr_nxt(PHYS_INSTR_ADDR_WIDTH-1 downto 0),
- instr_we,
- instr_wr_data,
+ new_im_data_in,
+ im_data,
instr_rd_data
);
end process;
+led2 <= rom_ram;
+
end behav;