stw.2

[calu.git] / cpu / src / decoder_b.vhd

diff --git a/cpu/src/decoder_b.vhd b/cpu/src/decoder_b.vhd
index b0ae0dd787eba34a5effccd7011d6ec2684fafa0..8f97d9fdfdc49aff7fb0e292eaa86d2ddc03c5c4 100644 (file)
--- a/cpu/src/decoder_b.vhd
+++ b/cpu/src/decoder_b.vhd
@@ -31,6 +31,7 @@ begin
        instr_s.signext := '0';
        instr_s.bp := '0';
        instr_s.op_detail := (others => '0');
+       instr_s.displacement := (others => '0');
 
        instr_s.op_group := ADDSUB_OP;
 
@@ -218,12 +219,15 @@ begin
                instr_s.signext := instruction(2);
                instr_s.high_low := instruction(1);
 
+               instr_s.op_group := LDST_OP;
+               instr_s.op_detail(NO_PSW_OPT) := '1';
+
                if (instr_s.opcode = "11010") then
                        if (instr_s.signext = '1' and instr_s.immediate(11) = '1') then
                                instr_s.immediate(31 downto 16) := (others => '1');
                        end if;
-                       instr_s.immediate(14 downto 0) := instruction(14 downto 0);
-                       instr_s.immediate(WORD_WIDTH-1 downto 15) := (others => '0');
+                       instr_s.immediate(11 downto 0) := instruction(14 downto 3);
+                       instr_s.immediate(WORD_WIDTH-1 downto 12) := (others => '0');
                        instr_s.op_detail(IMM_OPT) := '1';
                end if;
        end if;
@@ -256,9 +260,11 @@ begin
        if (instr_s.opcode = "01111" or instr_s.opcode = "10001" or instr_s.opcode = "10011" or instr_s.opcode = "10101") then
 
        --when "01111" =>               --stw
-               instr_s.reg_src1_addr := instruction(22 downto 19);     -- register value
-               instr_s.reg_src2_addr := instruction(18 downto 15);     -- mem addr
-               instr_s.immediate(14 downto 0) := instruction(14 downto 0);
+               instr_s.reg_src2_addr := instruction(22 downto 19);     -- register value
+               instr_s.reg_src1_addr := instruction(18 downto 15);     -- mem addr
+               instr_s.displacement(14 downto 0) := instruction(14 downto 0);
+               instr_s.op_detail(NO_PSW_OPT) := '1';
+               instr_s.op_group := LDST_OP;
        end if;
 
 --     when "10001" =>         --sth
@@ -311,6 +317,9 @@ begin
 
                        instr_s.op_detail(IMM_OPT) := '1';
                end if;
+               instr_s.op_detail(NO_DST_OPT) := '1';
+               instr_s.op_group := ADDSUB_OP;
+               instr_s.op_detail(SUB_OPT) := '1';
 
        end if;