bootrom: removed 'ABC' output on UART

[calu.git] / cpu / src / decode_stage_b.vhd

diff --git a/cpu/src/decode_stage_b.vhd b/cpu/src/decode_stage_b.vhd
index 60cc287c509d231900a6aaad0ccaa16a4e3f9d6a..e57460946e55d1213020a75dbcd5fb8234011ed3 100644 (file)
--- a/cpu/src/decode_stage_b.vhd
+++ b/cpu/src/decode_stage_b.vhd
@@ -163,7 +163,7 @@ begin
        rtw_rec_nxt.reg1_addr <= instr_spl.reg_src1_addr;
        rtw_rec_nxt.reg2_addr <= instr_spl.reg_src2_addr;
 
-       if (instr_spl.op_detail(IMM_OPT) = '1') then
+       if (instr_spl.op_detail(IMM_OPT) = '1') then -- or instr_spl.op_group = LDST_OP
                rtw_rec_nxt.immediate <= instr_spl.immediate;
                rtw_rec_nxt.imm_set <= '1';
        end if;
@@ -180,7 +180,7 @@ end process;
 
 
 -- async process: calculates branch prediction
-br_pred: process(instr_spl, prog_cnt)
+br_pred: process(instr_spl, prog_cnt, reset)
 
 begin
 
@@ -188,10 +188,18 @@ begin
        branch_prediction_bit <= '0';
 
        if ((instr_spl.opcode = "10110" or instr_spl.opcode = "10111") and instr_spl.bp = '1') then
-               branch_prediction_res <= std_logic_vector(unsigned(instr_spl.immediate) + unsigned(prog_cnt));  --both 32 bit
+               if instr_spl.int = '0' then             
+                       branch_prediction_res <= std_logic_vector(unsigned(instr_spl.immediate) + unsigned(prog_cnt));  --both 32 bit
+               else 
+                       branch_prediction_res <= instr_spl.immediate;
+               end if;
                branch_prediction_bit <= '1';
        end if;
 
+       if reset = RESET_VALUE then
+               branch_prediction_bit <= '0';
+       end if;
+
 end process;
 
 end behav;