static branch incl prediction rc1

[calu.git] / cpu / src / common_pkg.vhd

diff --git a/cpu/src/common_pkg.vhd b/cpu/src/common_pkg.vhd
index 1dca19632fab15a7625d759cf73a44a7c598eb4d..23791653dacc5a17bebf2f18faf9ae34a4bdfcd3 100755 (executable)
--- a/cpu/src/common_pkg.vhd
+++ b/cpu/src/common_pkg.vhd
@@ -25,7 +25,7 @@ package common_pkg is
        constant INSTR_ADDR_WIDTH       : INTEGER := 32;
        constant PHYS_INSTR_ADDR_WIDTH  : INTEGER := 11;
        constant REG_ADDR_WIDTH         : INTEGER := 4;
-       constant DATA_ADDR_WIDTH        : INTEGER := 32;
+       constant DATA_ADDR_WIDTH        : INTEGER := 11;
        constant PHYS_DATA_ADDR_WIDTH   : INTEGER := 32;
        
        constant NUM_OP_OPT_WIDTH       : INTEGER := 6;
@@ -34,6 +34,7 @@ package common_pkg is
        
        subtype instruction_word_t is std_logic_vector(WORD_WIDTH-1 downto 0);
        subtype instruction_addr_t is std_logic_vector(INSTR_ADDR_WIDTH-1 downto 0);
+       subtype instr_addr_t is instruction_addr_t;
        
        subtype gp_addr_t       is std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
        subtype data_ram_word_t is std_logic_vector(WORD_WIDTH-1 downto 0);
@@ -49,16 +50,18 @@ package common_pkg is
        constant IMM_OPT : integer := 0; -- no sharing
        
        constant SUB_OPT : integer := 1;
-       constant LOG_OPT : integer := 1;
+       constant ARITH_OPT : integer := 1;
        
        constant CARRY_OPT : integer := 2;
-       
-       constant LEFT_OPT : integer := 3;
+
+       constant RIGHT_OPT : integer := 3;
+       constant JMP_REG_OPT : integer := 3;
+       constant ST_OPT  : integer := 3;
        
        constant NO_PSW_OPT : integer := 4;--no sharing
        constant NO_DST_OPT : integer := 5; --no sharing
        
-       type op_info_t is (ADDSUB_OP,AND_OP,OR_OP, XOR_OP,SHIFT_OP);
+       type op_info_t is (ADDSUB_OP,AND_OP,OR_OP, XOR_OP,SHIFT_OP, LDST_OP, JMP_OP, JMP_ST_OP);
        subtype op_opt_t is std_logic_vector(NUM_OP_OPT_WIDTH-1 downto 0);
        
        
@@ -73,13 +76,15 @@ package common_pkg is
                reg_src2_addr : std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
 
                immediate : std_logic_vector(WORD_WIDTH-1 downto 0);
-               displacement : std_logic_vector(DISPL_WIDTH-1 downto 0);
+
+               displacement : gp_register_t;
 
                jmptype : std_logic_vector(1 downto 0);
 
-               carry, sreg_update, high_low, fill, signext, bp, arith, left_right : std_logic;
+               high_low, fill, signext, bp: std_logic;
 
-               op_detail : op_pot_t;
+               op_detail : op_opt_t;
+               op_group : op_info_t;
 
        end record;
 
@@ -90,6 +95,9 @@ package common_pkg is
                rtw_reg1 : std_logic;
                rtw_reg2 : std_logic;
                immediate : gp_register_t;
+               imm_set : std_logic;
+               reg1_addr : gp_addr_t;
+               reg2_addr : gp_addr_t;
 
        end record;
 
@@ -98,6 +106,9 @@ package common_pkg is
                op_group : op_info_t;
                op_detail : op_opt_t;
                brpr : std_logic;
+
+               displacement : gp_register_t;
+               prog_cnt     : instr_addr_t;
                
                src1 : gp_register_t;
                src2 : gp_register_t;
@@ -109,7 +120,18 @@ package common_pkg is
                
        end record;
 
-       
+       type writeback_rec is record
+--             result : in gp_register_t;      --reg  (alu result or jumpaddr)
+--             result_addr : in gp_addr_t;     --reg
+               address : word_t;               --ureg 
+--             alu_jmp : in std_logic;         --reg
+--             br_pred : in std_logic;         --reg
+--             write_en : in std_logic;        --reg  (register file)
+               dmem_en : std_logic;            --ureg (jump addr in mem or in address)
+               dmem_write_en : std_logic;      --ureg
+               hword : std_logic;              --ureg
+               byte_s : std_logic;
+       end record;
        
        
        function inc(value : in std_logic_vector; constant by : in integer := 1) return std_logic_vector;