static branch incl prediction rc1
[calu.git] / cpu / sim / testcore.do
index da92a48b390eaa2b7cc894f55eb8d925ef31251c..c1a219cedeff711b68e9914ae739123b41a890e3 100644 (file)
@@ -14,6 +14,37 @@ vcom -work work ../src/fetch_stage.vhd
 vcom -work work ../src/fetch_stage_b.vhd
 vcom -work work ../src/decode_stage.vhd
 vcom -work work ../src/decode_stage_b.vhd
+
+vcom -work work ../src/alu_pkg.vhd
+vcom -work work ../src/extension_pkg.vhd
+vcom -work work ../src/gpm_pkg.vhd
+
+vcom -work work ../src/exec_op.vhd
+vcom -work work ../src/exec_op/add_op_b.vhd
+vcom -work work ../src/exec_op/and_op_b.vhd
+vcom -work work ../src/exec_op/or_op_b.vhd
+vcom -work work ../src/exec_op/xor_op_b.vhd
+vcom -work work ../src/exec_op/shift_op_b.vhd
+
+vcom -work work ../src/alu.vhd
+vcom -work work ../src/alu_b.vhd
+vcom -work work ../src/extension_pkg.vhd
+vcom -work work ../src/gpm_pkg.vhd
+
+#vcom -work work ../src/gpm.vhd
+#vcom -work work ../src/gpm_b.vhd
+
+vcom -work work ../src/extension_pkg.vhd
+vcom -work work ../src/extension.vhd
+vcom -work work ../src/extension_b.vhd
+
+vcom -work work ../src/execute_stage.vhd
+vcom -work work ../src/execute_stage_b.vhd
+
+
+vcom -work work ../src/writeback_stage.vhd
+vcom -work work ../src/writeback_stage_b.vhd
+
 vcom -work work ../src/pipeline_tb.vhd
 
 vsim work.pipeline_conf_beh -t ns
@@ -30,9 +61,12 @@ add wave  -radix hexadecimal /pipeline_tb/decode_st/instr_spl
 add wave  -radix hexadecimal /pipeline_tb/decode_st/to_next_stage
 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg1_mem_data
 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg2_mem_data
+add wave  -radix hexadecimal /pipeline_tb/decode_st/rtw_rec_nxt
 add wave  -radix hexadecimal /pipeline_tb/decode_st/rtw_rec
 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_w_addr
 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_wr_data
 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_we
 
-run 500000 ns
+add wave  -radix hexadecimal /pipeline_tb/exec_st/gpmp_inst/psw
+
+run 5000 ns