stack op

[calu.git] / cpu / sim / testcore.do

diff --git a/cpu/sim/testcore.do b/cpu/sim/testcore.do
index 0b2647ea5bdaef865ad65abcd3af61fb465a8257..4ba2fbb1e4264f909f82083250c2d38448183c25 100644 (file)
--- a/cpu/sim/testcore.do
+++ b/cpu/sim/testcore.do
@@ -9,8 +9,8 @@ vcom -work work ../src/r2_w_ram_b.vhd
 vcom -work work ../src/rom.vhd
 vcom -work work ../src/rom_b.vhd
 vcom -work work ../src/common_pkg.vhd
-vcom -work work ../src/core_pkg.vhd
 vcom -work work ../src/extension_pkg.vhd
+vcom -work work ../src/core_pkg.vhd
 vcom -work work ../src/extension_uart_pkg.vhd
 vcom -work work ../src/extension_uart.vhd
 vcom -work work ../src/extension_uart_b.vhd
@@ -87,6 +87,10 @@ add wave  -radix hexadecimal /pipeline_tb/writeback_st/data_ram_read
 add wave  -radix hexadecimal /pipeline_tb/dmem_wr_en_pin
 add wave  -radix hexadecimal /pipeline_tb/writeback_st/dmem_we
 add wave  -radix hexadecimal /pipeline_tb/writeback_st/data_addr
+
+add wave  -radix hexadecimal /pipeline_tb/tx_pin
+add wave  -radix hexadecimal /pipeline_tb/rx_pin
+
 add wave  -radix decimal     /pipeline_tb/cycle_cnt
 
 run 10000 ns