.fill 42, 0
prog_eof:
-.fill 1, 0xE701FFFC;ldw r0, 0-4(r3)
-.fill 1, 0xEB00000A;ret+
+.ifill ldw r0, 0-4(r3);0xE701FFFC
+.ifill ret+
prog_mul:
-.fill 1, 0xE1998020;subi r3, r3, 4
-.fill 1, 0xe7318000;ldw r6, 0(r3)
-.fill 1, 0xe739fffc;ldw r7, 0-4(r3)
-.fill 1, 0xed400004;ldis r8, 0
-.fill 1, 0xe1038000;mov r0, r7
-.fill 1, 0xe2800008;andx r0, 1
-.fill 1, 0x00443001;adddnz r8, r8, r6
-.fill 1, 0x01bb8008;subinz r7, r7, 1
-.fill 1, 0x113b8000;addizs r7, r7, 0
+.ifill subi r3, r3, 4;0xE1998020
+.ifill ldw r6, 0(r3);0xe7318000
+.ifill ldw r7, 0-4(r3);0xe739fffc
+.ifill ldis r8, 0;0xed400004
+.ifill mov r0, r7;0xe1038000
+.ifill andx r0, 1;0xe2800008
+.ifill adddnz r8, r8, r6;0x00443001
+.ifill subinz r7, r7, 1;0x01bb8008
+.ifill addizs r7, r7, 0;0x113b8000
;loop:
-.fill 1, 0x00443001;adddnz r8, r8, r6
-.fill 1, 0x00443001;adddnz r8, r8, r6
-.fill 1, 0xe1bb8010;subi r7, r7, 2
-.fill 1, 0x0b7ffe83;brnz+ loop
-.fill 1, 0xe7c1fffc;stw r8, 0-4(r3)
+.ifill adddnz r8, r8, r6;0x00443001
+.ifill adddnz r8, r8, r6;0x00443001
+.ifill subi r7, r7, 2;0xe1bb8010
+.fill 0x0b7ffe83;brnz+ loop
+.ifill stw r8, 0-4(r3);0xe7c1fffc
prog_consts:
-.fill 1, 0xed300004;ldis r6, CONST
-.fill 1, 0xe7b18000;stw r6, 0(r3)
-.fill 1, 0xe1198020;addi r3, r3, 4
+.fill 0xed300004;ldis r6, CONST
+.ifill stw r6, 0(r3);0xe7b18000
+.ifill addi r3, r3, 4;0xe1198020
prog_add:
-.fill 1, 0xe1998020;subi r3, r3, 4
-.fill 1, 0xe7318000;ldw r6, 0(r3)
-.fill 1, 0xe739fffc;ldw r7, 0-4(r3)
-.fill 1, 0xe03bb000;add r7, r7, r6
-.fill 1, 0xe7b9fffc;stw r7, 0-4(r3)
+.ifill subi r3, r3, 4;0xe1998020
+.ifill ldw r6, 0(r3);0xe7318000
+.ifill ldw r7, 0-4(r3);0xe739fffc
+.ifill add r7, r7, r6;0xe03bb000
+.ifill stw r7, 0-4(r3);0xe7b9fffc
prog_sub:
-.fill 1, 0xe1998020;subi r3, r3, 4
-.fill 1, 0xe7318000;ldw r6, 0(r3)
-.fill 1, 0xe739fffc;ldw r7, 0-4(r3)
-.fill 1, 0xe0bbb000;sub r7, r7, r6
-.fill 1, 0xe7b9fffc;stw r7, 0-4(r3)
+.ifill subi r3, r3, 4;0xe1998020
+.ifill ldw r6, 0(r3);0xe7318000
+.ifill ldw r7, 0-4(r3);0xe739fffc
+.ifill sub r7, r7, r6;0xe0bbb000
+.ifill stw r7, 0-4(r3);0xe7b9fffc
prog_lessthan:
-.fill 1, 0xe1998020;subi r3, r3, 4
-.fill 1, 0xe7318000;ldw r6, 0(r3)
-.fill 1, 0xe739fffc;ldw r7, 0-4(r3)
-.fill 1, 0xed400004;ldis r8, 0
-.fill 1, 0xec3b0000;cmp r7, r6
-.fill 1, 0xbd4007fc;ldislt r8, 0xFF
-.fill 1, 0xe7c1fffc;stw r8, 0-4(r3)
+.ifill subi r3, r3, 4;0xe1998020
+.ifill ldw r6, 0(r3);0xe7318000
+.ifill ldw r7, 0-4(r3);0xe739fffc
+.ifill cmp r7, r6;0xec3b0000
+.ifill stwlt r14, 0-4(r3);
+.ifill stwge r15, 0-4(r3);
prog_dup:
-.fill 1, 0xe731fffc;ldw r6, 0-4(r3)
-.fill 1, 0xe7b18000;stw r6, 0(r3)
-.fill 1, 0xe1198020;addi r3, r3, 4
+.ifill ldw r6, 0-4(r3);0xe731fffc
+.ifill stw r6, 0(r3);0xe7b18000
+.ifill addi r3, r3, 4;0xe1198020
prog_jmp:
-.fill 1, 0xe1998020;subi r3, r3, 4
-.fill 1, 0xe7318000;ldw r6, 0(r3)
-.fill 1, 0xecb00000;cmpi r6,0
+.ifill subi r3, r3, 4;0xe1998020
+.ifill ldw r6, 0(r3);0xe7318000
+.ifill cmpi r6,0;0xecb00000
;static calced
-.fill 1, 0xbb000103;breq- vm_next
-.fill 1, 0xeb000003;br+ #CONST
+.fill 1, 0x1b000103;breq- vm_next
+.fill 1, 0xeb000003;br+ CONST
prog_imm:
.fill 1, 0xed400000;ldil r6, CONST
.fill 1, 0xed400002;ldih r6, CONST
-.fill 1, 0xe7b18000;stw r6, 0(r3)
-.fill 1, 0xe1198020;addi r3, r3, 4
+.ifill stw r6, 0(r3);0xe7b18000
+.ifill addi r3, r3, 4;0xe1198020
prog_pop:
-.fill 1, 0xe1998020;subi r3, r3, 4
+.ifill subi r3, r3, 4;0xe1998020
prog_xch:
-.fill 1, 0xe731fffc;ldw r6, 0-4(r3)
-.fill 1, 0xe739fff8;ldw r7, 0-8(r3)
-.fill 1, 0xe7b1fff8;stw r6, 0-8(r3)
-.fill 1, 0xe7b9fffc;stw r7, 0-4(r3)
+.ifill ldw r6, 0-4(r3);0xe731fffc
+.ifill ldw r7, 0-8(r3);0xe739fff8
+.ifill stw r6, 0-8(r3);0xe7b1fff8
+.ifill stw r7, 0-4(r3);0xe7b9fffc
prog_not:
-.fill 1, 0xe731fffc;ldw r6, 0-4(r3)
-.fill 1, 0xe4b7fffa;not r6
-.fill 1, 0xe7b1fffc;stw r6, 0-4(r3)
+.ifill ldw r6, 0-4(r3);0xe731fffc
+.ifill not r6;0xe4b7fffa
+.ifill stw r6, 0-4(r3);0xe7b1fffc
.text
main:
ldih r3, instrtable@hi
;set address to defer table
- ldil r9, instrtable@lo
- ldih r9, instrtable@hi
+ ldil r9, defertable@lo
+ ldih r9, defertable@hi
;call jit compiler
ldil r3, stack@lo
ldih r3, stack@hi
+ ;make r15 a 0-register
+ ldis r15, 0
+ ;make r14 a 8-bit -1-register
+ ldis r14, 0xFF
+
;call jit'ed prog
call+ prog_start
;r9 ... address to actual entry in defer table
;r10... address to defer table
+ ldil r15, prog_consts@lo
+ ldih r15, prog_consts@hi
+
;backup defer table address
mov r10, r9
;decrement address to input by 1
;generate branch
sub r11, r6, r8
+ lrs r11, r11, 2
;set the upper 16 bit 0
andx r11, 0xFFFF
;shift to the position of imm in br
;case 0 1 2 3 4 5 6 7 8 9
;48-57
vm_consts:
- ;load address of program
- ldil r4, prog_consts@lo
- ldih r4, prog_consts@hi
-
;program instruction (3)
- ldw r0, 0(r4)
+ ldw r0, 0(r15)
;the first instr. loads r6 with the number
;thus we shall emulate this
;store this 'dynamic' instruction
stx r0, 0(r2)
- ldw r0, 4(r4)
+ ldw r0, 4(r15)
stx r0, 4(r2)
- ldw r0, 8(r4)
+ ldw r0, 8(r15)
stx r0, 8(r2)
;increment address
ldil r4, prog_lessthan@lo
ldih r4, prog_lessthan@hi
- ;program instruction (7)
+ ;program instruction (6)
ldw r0, 0(r4)
stx r0, 0(r2)
ldw r0, 4(r4)
stx r0, 16(r2)
ldw r0, 20(r4)
stx r0, 20(r2)
- ldw r0, 24(r4)
- stx r0, 24(r2)
;increment address
- addi r2, r2, 28
+ addi r2, r2, 24
br+ vm_loop
stx r0, 12(r2)
;r8 has now the current base
- ldw r8, 0(r3)
+ ;ldw r8, 0-4(r3)
;we add the offset to this instruction
- addi r8, r8, 12
+ addi r8, r2, 16
;we know calculate the jump destination
;generate negativ offset
ldis r7, 0xFF00
- add r6, r3, r7
+ ;r6 is now the 'real' negativ number
+ or r6, r6, r7
+ ;todo: testing showed (at least once) we are off by 2 instr.
+ ;addi r6, r6, 2
+ ;multiply by to get the offset
+ lls r6, r6, 2
+ ;generate address in table
+ add r6, r3, r6
;r0 now has the target address
+ ;todo: 0-4?
ldw r0, 0(r6)
;we calc the offset
- sub r8, r8, r0
+ sub r8, r0, r8
+ ;we shift 2 bits out, because rel. br takes instr.
+ ;count and not address amount ...
+ lrs r8, r8, 2
;set the upper 16 bit 0
andx r8, 0xFFFF
;shift to the position of imm in br
stw r8, 4(r9)
;todo: check if -1 is needed
- subi r6, r6, 1
+ ;subi r6, r6, 1
;multiply with 2 to get offset right
lls r6, r6, 2
;add to current base
projects / calu.git / blobdiff