.ifill subi r3, r3, 4;0xe1998020
.ifill ldw r6, 0(r3);0xe7318000
.ifill ldw r7, 0-4(r3);0xe739fffc
-.ifill ldis r8, 0;0xed400004
.ifill cmp r7, r6;0xec3b0000
-.ifill ldislt r8, 0xFF;0xbd4007fc
-.ifill stw r8, 0-4(r3);0xe7c1fffc
+.ifill stwlt r14, 0-4(r3);
+.ifill stwge r15, 0-4(r3);
prog_dup:
.ifill ldw r6, 0-4(r3);0xe731fffc
ldil r3, stack@lo
ldih r3, stack@hi
+ ;make r15 a 0-register
+ ldis r15, 0
+ ;make r14 a 8-bit -1-register
+ ldis r14, 0xFF
+
;call jit'ed prog
call+ prog_start
;r9 ... address to actual entry in defer table
;r10... address to defer table
+ ;load address of program
+ ldil r13, prog_dup@lo
+ ldih r13, prog_dup@hi
+
+ ;load address of program
+ ldil r14, prog_mul@lo
+ ldih r14, prog_mul@hi
+
+ ldil r15, prog_consts@lo
+ ldih r15, prog_consts@hi
+
;backup defer table address
mov r10, r9
;decrement address to input by 1
;case *
;42
vm_mul:
- ;load address of program
- ldil r4, prog_mul@lo
- ldih r4, prog_mul@hi
-
;program instruction (14)
- ldw r0, 0(r4)
+ ldw r0, 0(r14)
stx r0, 0(r2)
- ldw r0, 4(r4)
+ ldw r0, 4(r14)
stx r0, 4(r2)
- ldw r0, 8(r4)
+ ldw r0, 8(r14)
stx r0, 8(r2)
- ldw r0, 12(r4)
+ ldw r0, 12(r14)
stx r0, 12(r2)
- ldw r0, 16(r4)
+ ldw r0, 16(r14)
stx r0, 16(r2)
- ldw r0, 20(r4)
+ ldw r0, 20(r14)
stx r0, 20(r2)
- ldw r0, 24(r4)
+ ldw r0, 24(r14)
stx r0, 24(r2)
- ldw r0, 28(r4)
+ ldw r0, 28(r14)
stx r0, 28(r2)
- ldw r0, 32(r4)
+ ldw r0, 32(r14)
stx r0, 32(r2)
- ldw r0, 36(r4)
+ ldw r0, 36(r14)
stx r0, 36(r2)
- ldw r0, 40(r4)
+ ldw r0, 40(r14)
stx r0, 40(r2)
- ldw r0, 44(r4)
+ ldw r0, 44(r14)
stx r0, 44(r2)
- ldw r0, 48(r4)
+ ldw r0, 48(r14)
stx r0, 48(r2)
- ldw r0, 52(r4)
+ ldw r0, 52(r14)
stx r0, 52(r2)
;increment address
;case 0 1 2 3 4 5 6 7 8 9
;48-57
vm_consts:
- ;load address of program
- ldil r4, prog_consts@lo
- ldih r4, prog_consts@hi
-
;program instruction (3)
- ldw r0, 0(r4)
+ ldw r0, 0(r15)
;the first instr. loads r6 with the number
;thus we shall emulate this
;store this 'dynamic' instruction
stx r0, 0(r2)
- ldw r0, 4(r4)
+ ldw r0, 4(r15)
stx r0, 4(r2)
- ldw r0, 8(r4)
+ ldw r0, 8(r15)
stx r0, 8(r2)
;increment address
ldil r4, prog_lessthan@lo
ldih r4, prog_lessthan@hi
- ;program instruction (7)
+ ;program instruction (6)
ldw r0, 0(r4)
stx r0, 0(r2)
ldw r0, 4(r4)
stx r0, 16(r2)
ldw r0, 20(r4)
stx r0, 20(r2)
- ldw r0, 24(r4)
- stx r0, 24(r2)
;increment address
- addi r2, r2, 28
+ addi r2, r2, 24
br+ vm_loop
;case D
;68
vm_dup:
- ;load address of program
- ldil r4, prog_dup@lo
- ldih r4, prog_dup@hi
;program instruction (3)
- ldw r0, 0(r4)
+ ldw r0, 0(r13)
stx r0, 0(r2)
- ldw r0, 4(r4)
+ ldw r0, 4(r13)
stx r0, 4(r2)
- ldw r0, 8(r4)
+ ldw r0, 8(r13)
stx r0, 8(r2)
;increment address