progs: bench tools bei deepjit.s geadded

[calu.git] / 2_isa / data.ptex

diff --git a/2_isa/data.ptex b/2_isa/data.ptex
index e86d52f40a03fae4757d5c6abf1f82c4110428a0..7e45733a769be8355a8ea02cdcf3b58814f180e9 100644 (file)
--- a/2_isa/data.ptex
+++ b/2_isa/data.ptex
@@ -12,12 +12,15 @@ ins ('32', 'stackop', 'pop/push/disc/fetch from/to stack', '4 | 5 | 4 | 2 | 17',
 #ins ('32', 'fetch', 'get top-element from stack', '4 | 5 | 4 |  19', 'Conditions | OpCode | Register Destination | - ');
 
 
-ins ('32', 'mov\{p,s\}f', 'Move from PSW/Stack', '4 | 5 | 4 | 1 | 18',
-'Conditions | OpCode (01100) | Register Destination| st | - ');
+ins ('32', 'mov\\textit{special}from', 'Move from PSW/Stack', '4 | 5 | 4 | 1 | 18',
+'Conditions | OpCode (01100) | Register Destination| st | - ',
+'','','',
+'movpf-move from PSW-3/1|movsf-move from Stack Pointer-3/0');
 
-ins ('32', 'mov\{p,s\}t', 'Move to PSW/Stack', '4 | 5 | 4 | 1 | 18',
+ins ('32', 'mov\\textit{special}to', 'Move to PSW/Stack', '4 | 5 | 4 | 1 | 18',
 'Conditions | OpCode (01101) | Register Source | st | - ',
-'This instruction will set PSW or Stack to the value stored in the source register. When the move is to PSW the flags will be set like they are set in the source register.');
+'This instruction will set PSW or Stack to the value stored in the source register. When the move is to PSW the flags will be set like they are set in the source register.','','',
+'movpt-move to PSW-3/1|movst-move to Stack Pointer-3/0');
 
 ins ('32', 'ldw', 'Load word; needs to be aligned to 32bit', '4 | 5 | 4 | 4 | 15',
 'Conditions | OpCode (01110) | Register Destination|Register Address| displacement ');
@@ -30,14 +33,14 @@ ins ('32', 'ldi', 'Load immediate', '4 | 5 | 4 | 16 | 1 | 1 | 1',
 'Conditions | OpCode (11010) | Register Destination| Immediate | S | h/l | - ');
 
 ins ('32', 'stw', 'store word; needs to be aligned to 32bit', '4 | 5 | 4 | 4 | 15',
-'Conditions | OpCode (01111) | Register Destination|Register Address| displacement ');
+'Conditions | OpCode (01111) | Register Source|Register Address| displacement ');
 ins ('32', 'sth', 'store half word; needs to be aligned to 16bit', '4 | 5 | 4 | 4 | 15',
-'Conditions | OpCode (10001) | Register Destination|Register Address| displacement ');
+'Conditions | OpCode (10001) | Register Source|Register Address| displacement ');
 ins ('32', 'stb', 'store byte, 8bit', '4 | 5 | 4 | 4 | 15',
-'Conditions | OpCode (10011) | Register Destination|Register Address| displacement ');
+'Conditions | OpCode (10011) | Register Source|Register Address| displacement ');
 
 ins ('32', 'ldx', 'Load from program space', '4 | 5 | 4 | 4 | 15',
 'Conditions | OpCode (10100) | Register Destination|Register Address| displacement ');
 
 ins ('32', 'stx', 'Store to program space', '4 | 5 | 4 | 4 | 15',
-'Conditions | OpCode (10101) | Register Destination|Register Address| displacement ');
+'Conditions | OpCode (10101) | Register Source|Register Address| displacement ');