+#endif
+#if (defined(__MACH__) && defined(__APPLE__))
+/* DirectHW is available here: http://www.coreboot.org/DirectHW */
+#include <DirectHW/DirectHW.h>
+#endif
+
+#ifdef PCI_SUPPORT
+#include <pci/pci.h>
+#endif
+
+#if defined(__FreeBSD__)
+#include <sys/types.h>
+#include <machine/cpufunc.h>
+#define OUTB(x, y) do { u_int tmp = (y); outb(tmp, (x)); } while (0)
+#define OUTW(x, y) do { u_int tmp = (y); outw(tmp, (x)); } while (0)
+#define OUTL(x, y) do { u_int tmp = (y); outl(tmp, (x)); } while (0)
+#define INB(x) __extension__ ({ u_int tmp = (x); inb(tmp); })
+#define INW(x) __extension__ ({ u_int tmp = (x); inw(tmp); })
+#define INL(x) __extension__ ({ u_int tmp = (x); inl(tmp); })
+#else
+#define OUTB outb
+#define OUTW outw
+#define OUTL outl
+#define INB inb
+#define INW inw
+#define INL inl
+#endif
+
+#if defined(__NetBSD__) && (defined(__i386__) || defined(__x86_64__))
+#include <sys/types.h>
+#include <machine/sysarch.h>
+#if defined(__i386__)
+#define iopl i386_iopl
+#elif defined(__x86_64__)
+#define iopl x86_64_iopl
+#endif
+
+static __inline__ void
+outb(uint8_t value, uint16_t port)
+{
+ __asm__ __volatile__ ("outb %b0,%w1": :"a" (value), "Nd" (port));
+}
+
+static __inline__ void
+outw(uint16_t value, uint16_t port)
+{
+ __asm__ __volatile__ ("outw %w0,%w1": :"a" (value), "Nd" (port));
+}
+
+static __inline__ void
+outl(uint32_t value, uint16_t port)
+{
+ __asm__ __volatile__ ("outl %0,%w1": :"a" (value), "Nd" (port));
+}
+
+static __inline__ uint8_t inb(uint16_t port)
+{
+ uint8_t value;
+ __asm__ __volatile__ ("inb %w1,%0":"=a" (value):"Nd" (port));
+ return value;
+}
+
+static __inline__ uint16_t inw(uint16_t port)
+{
+ uint16_t value;
+ __asm__ __volatile__ ("inw %w1,%0":"=a" (value):"Nd" (port));
+ return value;
+}
+
+static __inline__ uint32_t inl(uint16_t port)
+{
+ uint32_t value;
+ __asm__ __volatile__ ("inl %1,%0":"=a" (value):"Nd" (port));
+ return value;
+}
+#endif