+ control_quirk();
+
+ printf( "===========================\n"
+ "===========================\n"
+ "done head (vor sync): 0x%08X\n", ACCESS_LE(hcca_oh0.done_head));
+ sync_before_read(&hcca_oh0, 256);
+ printf("done head (nach sync): 0x%08X\n", ACCESS_LE(hcca_oh0.done_head));
+ printf("HCCA->frame_no after %d seconds: %d\n", 0, ACCESS_LE(hcca_oh0.frame_no));
+ printf("HCCA->frame_no WITHOUT conversion macro: %d\n", hcca_oh0.frame_no);
+ if(!first) {
+ first = 1;
+ udelay(1000000);
+ sync_before_read(&hcca_oh0, 256);
+ printf("HCCA->frame_no after %d seconds: %d\n", 1, ACCESS_LE(hcca_oh0.frame_no));
+ printf("HCCA->frame_no WITHOUT conversion macro: %d\n", hcca_oh0.frame_no);
+ }
+
+ struct general_td *tmptd = allocate_general_td(td->actlen);
+ (void) memcpy((void*) (phys_to_virt(ACCESS_LE(tmptd->cbp))), td->buffer, td->actlen); /* throws dsi exception after some time :X */
+
+ tmptd->flags &= ACCESS_LE(~OHCI_TD_DIRECTION_PID_MASK);
+ switch(td->pid) {
+ case USB_PID_SETUP:
+ printf("pid_setup\n");
+ tmptd->flags |= ACCESS_LE(OHCI_TD_DIRECTION_PID_SETUP);
+ break;
+ case USB_PID_OUT:
+ printf("pid_out\n");
+ tmptd->flags |= ACCESS_LE(OHCI_TD_DIRECTION_PID_OUT);
+ break;
+ case USB_PID_IN:
+ printf("pid_in\n");
+ tmptd->flags |= ACCESS_LE(OHCI_TD_DIRECTION_PID_IN);
+ break;
+ }
+ tmptd->flags |= ACCESS_LE((td->togl) ? OHCI_TD_TOGGLE_1 : OHCI_TD_TOGGLE_0);
+
+ printf("tmptd hexump (before):\n");
+ hexdump(tmptd, sizeof(struct general_td));
+ printf("tmptd-cbp hexump (before):\n");
+ hexdump((void*) (phys_to_virt(ACCESS_LE(tmptd->cbp))), td->actlen);
+
+ sync_after_write((void*) ACCESS_LE(tmptd->cbp), td->actlen);
+ sync_after_write(tmptd, sizeof(struct general_td));
+
+ struct endpoint_descriptor *dummyconfig = allocate_endpoint();
+
+ u32 current2 = read32(OHCI0_HC_CTRL_CURRENT_ED);
+ printf("current2: 0x%08X\n", current2);
+
+#define ED_MASK2 ~0 /*((u32)~0x0f) */
+#define ED_MASK ((u32)~0x0f)
+ printf("tmpdt & ED_MASK: 0x%08X\n", virt_to_phys((void*) ((u32)tmptd & ED_MASK)));
+ dummyconfig->tailp = dummyconfig->headp = ACCESS_LE(virt_to_phys((void*) ((u32)tmptd & ED_MASK)));
+
+ dummyconfig->flags |= ACCESS_LE(OHCI_ENDPOINT_LOW_SPEED |
+ OHCI_ENDPOINT_SET_DEVICE_ADDRESS(td->devaddress) |
+ OHCI_ENDPOINT_SET_ENDPOINT_NUMBER(td->endpoint) |
+ OHCI_ENDPOINT_SET_MAX_PACKET_SIZE(td->maxp));
+
+ sync_after_write(dummyconfig, 64);
+ write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(dummyconfig));
+
+ printf("OHCI_CTRL_CLE: 0x%08X\n", read32(OHCI0_HC_CONTROL)&OHCI_CTRL_CLE);
+ printf("OHCI_CLF: 0x%08X\n", read32(OHCI0_HC_COMMAND_STATUS)&OHCI_CLF);
+ set32(OHCI0_HC_CONTROL, OHCI_CTRL_CLE);
+ write32(OHCI0_HC_COMMAND_STATUS, OHCI_CLF);
+
+ printf("+++++++++++++++++++++++++++++\n");
+ /* spin until the controller is done with the control list */
+ u32 current = read32(OHCI0_HC_CTRL_CURRENT_ED);
+ printf("current: 0x%08X\n", current);
+ while(!current) {
+ udelay(10);
+ current = read32(OHCI0_HC_CTRL_CURRENT_ED);
+ }
+
+ udelay(2000);
+ udelay(2000);
+ udelay(2000);
+ current = read32(OHCI0_HC_CTRL_CURRENT_ED);
+ printf("current: 0x%08X\n", current);
+ printf("+++++++++++++++++++++++++++++\n");
+ udelay(2000);
+ udelay(2000);
+ udelay(2000);
+ udelay(2000);
+ udelay(2000);
+ udelay(2000);
+ udelay(2000);
+ udelay(2000);
+
+ sync_before_read(tmptd, sizeof(struct general_td));
+ printf("tmptd hexump (after):\n");
+ hexdump(tmptd, sizeof(struct general_td));
+
+ sync_before_read((void*) ACCESS_LE(tmptd->cbp), td->actlen);
+ printf("tmptd-cbp hexump (after):\n");
+ hexdump((void*) (phys_to_virt(ACCESS_LE(tmptd->cbp))), td->actlen);
+
+ printf("done head (vor sync): 0x%08X\n", ACCESS_LE(hcca_oh0.done_head));
+ sync_before_read(&hcca_oh0, 256);
+ printf("done head (nach sync): 0x%08X\n", ACCESS_LE(hcca_oh0.done_head));
+
+ free(tmptd);