- x86_64_movsbq_reg_reg(cd, src->regoff, d);
- }
- store_reg_to_var_int(iptr->dst, d);
- break;
-
- case ICMD_INT2CHAR: /* ..., value ==> ..., value */
-
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- if (src->flags & INMEMORY) {
- x86_64_movzwq_membase_reg(cd, REG_SP, src->regoff * 8, d);
-
- } else {
- x86_64_movzwq_reg_reg(cd, src->regoff, d);
- }
- store_reg_to_var_int(iptr->dst, d);
- break;
-
- case ICMD_INT2SHORT: /* ..., value ==> ..., value */
-
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- if (src->flags & INMEMORY) {
- x86_64_movswq_membase_reg(cd, REG_SP, src->regoff * 8, d);
-
- } else {
- x86_64_movswq_reg_reg(cd, src->regoff, d);
- }
- store_reg_to_var_int(iptr->dst, d);
- break;
-
-
- case ICMD_IADD: /* ..., val1, val2 ==> ..., val1 + val2 */
-
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ialu(cd, X86_64_ADD, src, iptr);
- break;
-
- case ICMD_IADDCONST: /* ..., value ==> ..., value + constant */
- /* val.i = constant */
-
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ialuconst(cd, X86_64_ADD, src, iptr);
- break;
-
- case ICMD_LADD: /* ..., val1, val2 ==> ..., val1 + val2 */
-
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_lalu(cd, X86_64_ADD, src, iptr);
- break;
-
- case ICMD_LADDCONST: /* ..., value ==> ..., value + constant */
- /* val.l = constant */
-
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_laluconst(cd, X86_64_ADD, src, iptr);
- break;
-
- case ICMD_ISUB: /* ..., val1, val2 ==> ..., val1 - val2 */
-
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->prev->regoff == iptr->dst->regoff) {
- x86_64_movl_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_alul_reg_membase(cd, X86_64_SUB, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_alul_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->prev->regoff, REG_ITMP1);
- x86_64_alul_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->prev->regoff == iptr->dst->regoff) {
- x86_64_alul_reg_membase(cd, X86_64_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_alul_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1);
- x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else {
- x86_64_movl_reg_membase(cd, src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
- x86_64_alul_reg_membase(cd, X86_64_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, d);
- x86_64_alul_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, d);
-
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->prev->regoff, d);
- x86_64_alul_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, d);
-
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- /* workaround for reg alloc */
- if (src->regoff == iptr->dst->regoff) {
- x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_alul_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1);
- M_INTMOVE(REG_ITMP1, d);
-
- } else {
- x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, d);
- x86_64_alul_reg_reg(cd, X86_64_SUB, src->regoff, d);
- }
-
- } else {
- /* workaround for reg alloc */
- if (src->regoff == iptr->dst->regoff) {
- M_INTMOVE(src->prev->regoff, REG_ITMP1);
- x86_64_alul_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1);
- M_INTMOVE(REG_ITMP1, d);
-
- } else {
- M_INTMOVE(src->prev->regoff, d);
- x86_64_alul_reg_reg(cd, X86_64_SUB, src->regoff, d);
- }
- }
- }
- break;
-
- case ICMD_ISUBCONST: /* ..., value ==> ..., value + constant */
- /* val.i = constant */
-
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ialuconst(cd, X86_64_SUB, src, iptr);
- break;
-
- case ICMD_LSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
-
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->prev->regoff == iptr->dst->regoff) {
- x86_64_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_alu_reg_membase(cd, X86_64_SUB, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_alu_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->prev->regoff, REG_ITMP1);
- x86_64_alu_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->prev->regoff == iptr->dst->regoff) {
- x86_64_alu_reg_membase(cd, X86_64_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_alu_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1);
- x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else {
- x86_64_mov_reg_membase(cd, src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
- x86_64_alu_reg_membase(cd, X86_64_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8);
- }
-
- } else {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, d);
- x86_64_alu_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, d);
-
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->prev->regoff, d);
- x86_64_alu_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, d);
-
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- /* workaround for reg alloc */
- if (src->regoff == iptr->dst->regoff) {
- x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_alu_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1);
- M_INTMOVE(REG_ITMP1, d);
-
- } else {
- x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, d);
- x86_64_alu_reg_reg(cd, X86_64_SUB, src->regoff, d);
- }
-
- } else {
- /* workaround for reg alloc */
- if (src->regoff == iptr->dst->regoff) {
- M_INTMOVE(src->prev->regoff, REG_ITMP1);
- x86_64_alu_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1);
- M_INTMOVE(REG_ITMP1, d);
-
- } else {
- M_INTMOVE(src->prev->regoff, d);
- x86_64_alu_reg_reg(cd, X86_64_SUB, src->regoff, d);
- }
- }