+/* gen_nullptr_check(objreg) */
+
+#define gen_nullptr_check(objreg) \
+ if (checknull) { \
+ M_BEQZ((objreg), 0); \
+ codegen_addxnullrefs(cd, mcodeptr); \
+ M_NOP; \
+ }
+
+#define gen_bound_check \
+ if (checkbounds) { \
+ M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size)); \
+ M_CMPULT(s2, REG_ITMP3, REG_ITMP3); \
+ M_BEQZ(REG_ITMP3, 0); \
+ codegen_addxboundrefs(cd, mcodeptr, s2); \
+ M_NOP; \
+ }
+
+
+/* MCODECHECK(icnt) */
+
+#define MCODECHECK(icnt) \
+ if ((mcodeptr + (icnt)) > cd->mcodeend) \
+ mcodeptr = codegen_increase(cd, (u1 *) mcodeptr)
+
+
+#define ALIGNCODENOP \
+ if ((int) ((long) mcodeptr & 7)) { \
+ M_NOP; \
+ }
+
+
+/* M_INTMOVE:
+ generates an integer-move from register a to b.
+ if a and b are the same int-register, no code will be generated.
+*/
+
+#define M_INTMOVE(a,b) if (a != b) { M_MOV(a, b); }
+
+
+/* M_FLTMOVE:
+ generates a floating-point-move from register a to b.
+ if a and b are the same float-register, no code will be generated
+*/
+
+#define M_FLTMOVE(a,b) if (a != b) { M_DMOV(a, b); }
+
+#define M_TFLTMOVE(t,a,b) \
+ {if(a!=b) \
+ if ((t)==TYPE_DBL) \
+ {M_DMOV(a,b);} \
+ else {M_FMOV(a,b);} \
+ }
+
+#define M_TFLD(t,a,b,disp) \
+ if ((t)==TYPE_DBL) \
+ {M_DLD(a,b,disp);} \
+ else \
+ {M_FLD(a,b,disp);}
+
+#define M_TFST(t,a,b,disp) \
+ if ((t)==TYPE_DBL) \
+ {M_DST(a,b,disp);} \
+ else \
+ {M_FST(a,b,disp);}
+
+#define M_CCFLTMOVE(t1,t2,a,b) \
+ if ((t1)==(t2)) \
+ {M_TFLTMOVE(t1,a,b);} \
+ else \
+ if ((t1)==TYPE_DBL) \
+ {M_CVTDF(a,b);} \
+ else \
+ {M_CVTFD(a,b);}
+
+#define M_CCFLD(t1,t2,a,b,disp) \
+ if ((t1)==(t2)) \
+ {M_DLD(a,b,disp);} \
+ else { \
+ M_DLD(REG_FTMP1,b,disp); \
+ if ((t1)==TYPE_DBL) \
+ {M_CVTDF(REG_FTMP1,a);} \
+ else \
+ {M_CVTFD(REG_FTMP1,a);} \
+ }
+
+#define M_CCFST(t1,t2,a,b,disp) \
+ if ((t1)==(t2)) \
+ {M_DST(a,b,disp);} \
+ else { \
+ if ((t1)==TYPE_DBL) \
+ {M_CVTDF(a,REG_FTMP1);} \
+ else \
+ {M_CVTFD(a,REG_FTMP1);} \
+ M_DST(REG_FTMP1,b,disp); \
+ }
+
+
+/* var_to_reg_xxx:
+ this function generates code to fetch data from a pseudo-register
+ into a real register.
+ If the pseudo-register has actually been assigned to a real
+ register, no code will be emitted, since following operations
+ can use this register directly.
+
+ v: pseudoregister to be fetched from
+ tempregnum: temporary register to be used if v is actually spilled to ram
+
+ return: the register number, where the operand can be found after
+ fetching (this wil be either tempregnum or the register
+ number allready given to v)
+*/