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* src/vm/jit/i386/asmpart.S: Made position independent.
[cacao.git]
/
src
/
vm
/
jit
/
i386
/
md-atomic.hpp
diff --git
a/src/vm/jit/i386/md-atomic.hpp
b/src/vm/jit/i386/md-atomic.hpp
index 9109b9c5faa8bf748407c34df3a1055b6b297d1a..f1e875234a12b5b8fdaf505409d91e93ec623af7 100644
(file)
--- a/
src/vm/jit/i386/md-atomic.hpp
+++ b/
src/vm/jit/i386/md-atomic.hpp
@@
-1,6
+1,6
@@
/* src/vm/jit/i386/atomic.hpp - i386 atomic instructions
/* src/vm/jit/i386/atomic.hpp - i386 atomic instructions
- Copyright (C) 2008
+ Copyright (C) 2008
, 2010
CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
This file is part of CACAO.
CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
This file is part of CACAO.
@@
-32,6
+32,7
@@
#include "threads/atomic.hpp"
#include "threads/atomic.hpp"
+namespace Atomic_md {
/**
* An atomic compare and swap for 32-bit integer values.
/**
* An atomic compare and swap for 32-bit integer values.
@@
-42,13
+43,14
@@
*
* @return value of the memory location before the store
*/
*
* @return value of the memory location before the store
*/
-inline
static uint32_t Atomic_compare_and_swap_32
(volatile uint32_t *p, uint32_t oldval, uint32_t newval)
+inline
uint32_t compare_and_swap
(volatile uint32_t *p, uint32_t oldval, uint32_t newval)
{
uint32_t result;
__asm__ __volatile__ ("lock; cmpxchgl %2, %1"
: "=a" (result), "=m" (*p)
{
uint32_t result;
__asm__ __volatile__ ("lock; cmpxchgl %2, %1"
: "=a" (result), "=m" (*p)
- : "r" (newval), "m" (*p), "0" (oldval));
+ : "r" (newval), "m" (*p), "0" (oldval)
+ : "cc");
return result;
}
return result;
}
@@
-63,39
+65,41
@@
inline static uint32_t Atomic_compare_and_swap_32(volatile uint32_t *p, uint32_t
*
* @return value of the memory location before the store
*/
*
* @return value of the memory location before the store
*/
-inline
static uint64_t Atomic_compare_and_swap_64
(volatile uint64_t *p, uint64_t oldval, uint64_t newval)
+inline
uint64_t compare_and_swap
(volatile uint64_t *p, uint64_t oldval, uint64_t newval)
{
{
-#warning Should we use cmpxchg8b or a generic version?
- return Atomic_generic_compare_and_swap_64(p, oldval, newval);
+ return Atomic::generic_compare_and_swap(p, oldval, newval);
}
/**
}
/**
- * An atomic compare and swap for pointer values.
- *
- * @param p Pointer to memory address.
- * @param oldval Old value to be expected.
- * @param newval New value to be stored.
- *
- * @return value of the memory location before the store
+ * A memory barrier.
*/
*/
-inline
static void* Atomic_compare_and_swap_ptr(volatile void** p, void* oldval, void* newval
)
+inline
void memory_barrier(void
)
{
{
-
return (void*) Atomic_compare_and_swap_32((volatile uint32_t*) p, (uint32_t) oldval, (uint32_t) newval
);
+
__asm__ __volatile__ ("lock; add $0, 0(%%esp)" : : : "memory"
);
}
/**
}
/**
- * A memory barrier.
+ * A
write
memory barrier.
*/
*/
-inline
static void Atomic
_memory_barrier(void)
+inline
void write
_memory_barrier(void)
{
{
- __asm__ __volatile__ ("
lock; add $0, 0(%%esp)" : : : "memory"
);
+ __asm__ __volatile__ ("
" : : : "memory"
);
}
}
-#define STORE_ORDER_BARRIER() __asm__ __volatile__ ("" : : : "memory");
-#define MEMORY_BARRIER_AFTER_ATOMIC() /* nothing */
+/**
+ * An instruction barrier.
+ */
+inline void instruction_barrier(void)
+{
+ // We need the "memory" constraint here because compare_and_swap does not
+ // have it.
+ __asm__ __volatile__ ("" : : : "memory");
+}
+
+}
#endif // _MD_ATOMIC_HPP
#endif // _MD_ATOMIC_HPP