-#define var_to_reg_flt(regnr,v,tempnr) \
- if ((v)->type == TYPE_FLT) { \
- if ((v)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- i386_flds_membase(cd, REG_SP, (v)->regoff * 4); \
- fpu_st_offset++; \
- regnr = tempnr; \
- } else { \
- i386_fld_reg(cd, (v)->regoff + fpu_st_offset); \
- fpu_st_offset++; \
- regnr = (v)->regoff; \
- } \
- } else { \
- if ((v)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- i386_fldl_membase(cd, REG_SP, (v)->regoff * 4); \
- fpu_st_offset++; \
- regnr = tempnr; \
- } else { \
- i386_fld_reg(cd, (v)->regoff + fpu_st_offset); \
- fpu_st_offset++; \
- regnr = (v)->regoff; \
- } \
- }
-
-#define NEW_var_to_reg_flt(regnr,v,tempnr) \
- if ((v)->type == TYPE_FLT) { \
- if ((v)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- i386_flds_membase(cd, REG_SP, (v)->regoff * 4); \
- fpu_st_offset++; \
- regnr = tempnr; \
- } else { \
- regnr = (v)->regoff; \
- } \
- } else { \
- if ((v)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- i386_fldl_membase(cd, REG_SP, (v)->regoff * 4); \
- fpu_st_offset++; \
- regnr = tempnr; \
- } else { \
- regnr = (v)->regoff; \
- } \
- }
-
-
-/* store_reg_to_var_xxx:
- This function generates the code to store the result of an operation
- back into a spilled pseudo-variable.
- If the pseudo-variable has not been spilled in the first place, this
- function will generate nothing.
-
- v ............ Pseudovariable
- tempregnum ... Number of the temporary registers as returned by
- reg_of_var.
-*/
-
-#define store_reg_to_var_int(sptr, tempregnum) \
- if ((sptr)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- i386_mov_reg_membase(cd, tempregnum, REG_SP, (sptr)->regoff * 4); \
- }
-
-
-#define store_reg_to_var_flt(sptr, tempregnum) \
- if ((sptr)->type == TYPE_FLT) { \
- if ((sptr)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- i386_fstps_membase(cd, REG_SP, (sptr)->regoff * 4); \
- fpu_st_offset--; \
- } else { \
-/* i386_fxch_reg((sptr)->regoff);*/ \
- i386_fstp_reg(cd, (sptr)->regoff + fpu_st_offset); \
- fpu_st_offset--; \
- } \
- } else { \
- if ((sptr)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- i386_fstpl_membase(cd, REG_SP, (sptr)->regoff * 4); \
- fpu_st_offset--; \
- } else { \
-/* i386_fxch_reg((sptr)->regoff);*/ \
- i386_fstp_reg(cd, (sptr)->regoff + fpu_st_offset); \
- fpu_st_offset--; \
- } \
- }
-
-
-#define M_COPY(from,to) \
- d = reg_of_var(rd, to, REG_ITMP1); \
- if ((from->regoff != to->regoff) || \
- ((from->flags ^ to->flags) & INMEMORY)) { \
- if (IS_FLT_DBL_TYPE(from->type)) { \
- var_to_reg_flt(s1, from, d); \
- /*M_FLTMOVE(s1, d);*/ \
- store_reg_to_var_flt(to, d); \
- } else { \
- if (!IS_2_WORD_TYPE(from->type)) { \
- if (to->flags & INMEMORY) { \
- if (from->flags & INMEMORY) { \
- i386_mov_membase_reg(cd, REG_SP, from->regoff * 4, REG_ITMP1); \
- i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, to->regoff * 4); \
- } else { \
- i386_mov_reg_membase(cd, from->regoff, REG_SP, to->regoff * 4); \
- } \
- } else { \
- if (from->flags & INMEMORY) { \
- i386_mov_membase_reg(cd, REG_SP, from->regoff * 4, to->regoff); \
- } else { \
- i386_mov_reg_reg(cd, from->regoff, to->regoff); \
- } \
- } \
- } else { \
- M_LNGMEMMOVE(from->regoff, to->regoff); \
- } \
- } \
- }