-#define var_to_reg_flt(regnr,v,tempnr) \
- if ((v)->type == TYPE_FLT) { \
- if ((v)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- i386_flds_membase(cd, REG_SP, (v)->regoff * 4); \
- fpu_st_offset++; \
- regnr = tempnr; \
- } else { \
- i386_fld_reg(cd, (v)->regoff + fpu_st_offset); \
- fpu_st_offset++; \
- regnr = (v)->regoff; \
- } \
- } else { \
- if ((v)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- i386_fldl_membase(cd, REG_SP, (v)->regoff * 4); \
- fpu_st_offset++; \
- regnr = tempnr; \
- } else { \
- i386_fld_reg(cd, (v)->regoff + fpu_st_offset); \
- fpu_st_offset++; \
- regnr = (v)->regoff; \
- } \
- }
-
-#define NEW_var_to_reg_flt(regnr,v,tempnr) \
- if ((v)->type == TYPE_FLT) { \
- if ((v)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- i386_flds_membase(cd, REG_SP, (v)->regoff * 4); \
- fpu_st_offset++; \
- regnr = tempnr; \
- } else { \
- regnr = (v)->regoff; \
- } \
- } else { \
- if ((v)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- i386_fldl_membase(cd, REG_SP, (v)->regoff * 4); \
- fpu_st_offset++; \
- regnr = tempnr; \
- } else { \
- regnr = (v)->regoff; \
- } \
- }
-
-
-/* store_reg_to_var_xxx:
- This function generates the code to store the result of an operation
- back into a spilled pseudo-variable.
- If the pseudo-variable has not been spilled in the first place, this
- function will generate nothing.
-
- v ............ Pseudovariable
- tempregnum ... Number of the temporary registers as returned by
- reg_of_var.
-*/
-
-#define store_reg_to_var_int(sptr, tempregnum) \
- if ((sptr)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- M_IST(tempregnum, REG_SP, (sptr)->regoff * 4); \
- }
-
-
-#define store_reg_to_var_lng(sptr, tempregnum) \
- if ((sptr)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- M_LST(tempregnum, REG_SP, (sptr)->regoff * 4); \
- }
-
-
-#define store_reg_to_var_flt(sptr, tempregnum) \
- if ((sptr)->type == TYPE_FLT) { \
- if ((sptr)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- i386_fstps_membase(cd, REG_SP, (sptr)->regoff * 4); \
- fpu_st_offset--; \
- } else { \
-/* i386_fxch_reg((sptr)->regoff);*/ \
- i386_fstp_reg(cd, (sptr)->regoff + fpu_st_offset); \
- fpu_st_offset--; \
- } \
- } else { \
- if ((sptr)->flags & INMEMORY) { \
- COUNT_SPILLS; \
- i386_fstpl_membase(cd, REG_SP, (sptr)->regoff * 4); \
- fpu_st_offset--; \
- } else { \
-/* i386_fxch_reg((sptr)->regoff);*/ \
- i386_fstp_reg(cd, (sptr)->regoff + fpu_st_offset); \
- fpu_st_offset--; \
- } \
- }
-
-
-#define M_COPY(from,to) \
- d = reg_of_var(rd, to, REG_ITMP1); \
- if ((from->regoff != to->regoff) || \
- ((from->flags ^ to->flags) & INMEMORY)) { \
- if (IS_FLT_DBL_TYPE(from->type)) { \
- var_to_reg_flt(s1, from, d); \
- /*M_FLTMOVE(s1, d);*/ \
- store_reg_to_var_flt(to, d); \
- } else { \
- if (!IS_2_WORD_TYPE(from->type)) { \
- if (to->flags & INMEMORY) { \
- if (from->flags & INMEMORY) { \
- i386_mov_membase_reg(cd, REG_SP, from->regoff * 4, REG_ITMP1); \
- i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, to->regoff * 4); \
- } else { \
- i386_mov_reg_membase(cd, from->regoff, REG_SP, to->regoff * 4); \
- } \
- } else { \
- if (from->flags & INMEMORY) { \
- i386_mov_membase_reg(cd, REG_SP, from->regoff * 4, to->regoff); \
- } else { \
- i386_mov_reg_reg(cd, from->regoff, to->regoff); \
- } \
- } \
- } else { \
- M_LNGMEMMOVE(from->regoff, to->regoff); \
- } \
- } \
- }
-
-/* macros to create code ******************************************************/
-
-typedef enum {
- REG_AL = 0,
- REG_CL = 1,
- REG_DL = 2,
- REG_BL = 3,
- REG_AH = 4,
- REG_CH = 5,
- REG_DH = 6,
- REG_BH = 7,
- REG_NREGB
-} I386_RegB_No;
-
-
-/* opcodes for alu instructions */
-
-typedef enum {
- ALU_ADD = 0,
- ALU_OR = 1,
- ALU_ADC = 2,
- ALU_SBB = 3,
- ALU_AND = 4,
- ALU_SUB = 5,
- ALU_XOR = 6,
- ALU_CMP = 7,
- ALU_NALU
-} I386_ALU_Opcode;
-
-typedef enum {
- I386_ROL = 0,
- I386_ROR = 1,
- I386_RCL = 2,
- I386_RCR = 3,
- I386_SHL = 4,
- I386_SHR = 5,
- I386_SAR = 7,
- I386_NSHIFT = 8
-} I386_Shift_Opcode;
-
-typedef enum {
- I386_CC_O = 0,
- I386_CC_NO = 1,
- I386_CC_B = 2, I386_CC_C = 2, I386_CC_NAE = 2,
- I386_CC_BE = 6, I386_CC_NA = 6,
- I386_CC_AE = 3, I386_CC_NB = 3, I386_CC_NC = 3,
- I386_CC_E = 4, I386_CC_Z = 4,
- I386_CC_NE = 5, I386_CC_NZ = 5,
- I386_CC_A = 7, I386_CC_NBE = 7,
- I386_CC_S = 8, I386_CC_LZ = 8,
- I386_CC_NS = 9, I386_CC_GEZ = 9,
- I386_CC_P = 0x0a, I386_CC_PE = 0x0a,
- I386_CC_NP = 0x0b, I386_CC_PO = 0x0b,
- I386_CC_L = 0x0c, I386_CC_NGE = 0x0c,
- I386_CC_GE = 0x0d, I386_CC_NL = 0x0d,
- I386_CC_LE = 0x0e, I386_CC_NG = 0x0e,
- I386_CC_G = 0x0f, I386_CC_NLE = 0x0f,
- I386_NCC
-} I386_CC;
-
-
-/* modrm and stuff */
-
-#define i386_address_byte(mod,reg,rm) \
- *(cd->mcodeptr++) = ((((mod) & 0x03) << 6) | (((reg) & 0x07) << 3) | (((rm) & 0x07)));
-
-
-#define i386_emit_reg(reg,rm) \
- i386_address_byte(3,(reg),(rm));
-
-
-#define i386_is_imm8(imm) \
- (((int)(imm) >= -128 && (int)(imm) <= 127))
-
-
-#define i386_emit_imm8(imm) \
- *(cd->mcodeptr++) = (u1) ((imm) & 0xff);
-
-
-#define i386_emit_imm16(imm) \
- do { \
- imm_union imb; \
- imb.i = (int) (imm); \
- *(cd->mcodeptr++) = imb.b[0]; \
- *(cd->mcodeptr++) = imb.b[1]; \
- } while (0)